From ed56fb1d775bb872c976eb6768a2cd739abea435 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Thu, 22 Jul 2010 11:19:17 +0900 Subject: [PATCH] sh: Update lowlevel_init.S of rsk7203 Update data address size and fix typo of register. Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/rsk7203/lowlevel_init.S | 85 +++++++++++++++------------ 1 file changed, 48 insertions(+), 37 deletions(-) diff --git a/board/renesas/rsk7203/lowlevel_init.S b/board/renesas/rsk7203/lowlevel_init.S index 7b9ecd89c3..30ef5abedd 100644 --- a/board/renesas/rsk7203/lowlevel_init.S +++ b/board/renesas/rsk7203/lowlevel_init.S @@ -73,7 +73,7 @@ init_bsc_cs0: write32 CMNCR_A, CMNCR_D - write32 SC0BCR_A, SC0BCR_D + write32 CS0BCR_A, CS0BCR_D write32 CS0WCR_A, CS0WCR_D @@ -122,63 +122,82 @@ repeat0: CCR1_A: .long CCR1 CCR1_D: .long 0x0000090B PCCRL4_A: .long 0xFFFE3910 -PCCRL4_D0: .long 0x00000000 +PCCRL4_D0: .word 0x0000 +.align 2 PECRL4_A: .long 0xFFFE3A10 -PECRL4_D0: .long 0x00000000 +PECRL4_D0: .word 0x0000 +.align 2 PECRL3_A: .long 0xFFFE3A12 -PECRL3_D: .long 0x00000000 +PECRL3_D: .word 0x0000 +.align 2 PEIORL_A: .long 0xFFFE3A06 -PEIORL_D0: .long 0x00001C00 -PEIORL_D1: .long 0x00001C02 +PEIORL_D0: .word 0x1C00 +PEIORL_D1: .word 0x1C02 PCIORL_A: .long 0xFFFE3906 -PCIORL_D: .long 0x00004000 +PCIORL_D: .word 0x4000 +.align 2 PFCRH2_A: .long 0xFFFE3A8C -PFCRH2_D: .long 0x00000000 +PFCRH2_D: .word 0x0000 +.align 2 PFCRH3_A: .long 0xFFFE3A8A -PFCRH3_D: .long 0x00000000 +PFCRH3_D: .word 0x0000 +.align 2 PFCRH1_A: .long 0xFFFE3A8E -PFCRH1_D: .long 0x00000000 +PFCRH1_D: .word 0x0000 +.align 2 PFIORH_A: .long 0xFFFE3A84 -PFIORH_D: .long 0x00000729 +PFIORH_D: .word 0x0729 +.align 2 PECRL1_A: .long 0xFFFE3A16 -PECRL1_D0: .long 0x00000033 +PECRL1_D0: .word 0x0033 +.align 2 WTCSR_A: .long 0xFFFE0000 -WTCSR_D0: .long 0x0000A518 -WTCSR_D1: .long 0x0000A51D +WTCSR_D0: .word 0xA518 +WTCSR_D1: .word 0xA51D WTCNT_A: .long 0xFFFE0002 -WTCNT_D: .long 0x00005A84 +WTCNT_D: .word 0x5A84 +.align 2 FRQCR_A: .long 0xFFFE0010 -FRQCR_D: .long 0x00000104 +FRQCR_D: .word 0x0104 +.align 2 -PCCRL4_D1: .long 0x00000010 -PECRL1_D1: .long 0x00000133 +PCCRL4_D1: .word 0x0010 +PECRL1_D1: .word 0x0133 CMNCR_A: .long 0xFFFC0000 CMNCR_D: .long 0x00001810 -SC0BCR_A: .long 0xFFFC0004 -SC0BCR_D: .long 0x10000400 +CS0BCR_A: .long 0xFFFC0004 +CS0BCR_D: .long 0x10000400 CS0WCR_A: .long 0xFFFC0028 CS0WCR_D: .long 0x00000B41 -PECRL4_D1: .long 0x00000100 +PECRL4_D1: .word 0x0100 +.align 2 CS1WCR_A: .long 0xFFFC002C CS1WCR_D: .long 0x00000B01 -PCCRL4_D2: .long 0x00000011 +PCCRL4_D2: .word 0x0011 +.align 2 PCCRL3_A: .long 0xFFFE3912 -PCCRL3_D: .long 0x00000011 +PCCRL3_D: .word 0x0011 +.align 2 PCCRL2_A: .long 0xFFFE3914 -PCCRL2_D: .long 0x00001111 +PCCRL2_D: .word 0x1111 +.align 2 PCCRL1_A: .long 0xFFFE3916 -PCCRL1_D: .long 0x00001010 +PCCRL1_D: .word 0x1010 PDCRL4_A: .long 0xFFFE3990 -PDCRL4_D: .long 0x00000011 +PDCRL4_D: .word 0x0011 +.align 2 PDCRL3_A: .long 0xFFFE3992 -PDCRL3_D: .long 0x00000011 +PDCRL3_D: .word 0x00011 +.align 2 PDCRL2_A: .long 0xFFFE3994 -PDCRL2_D: .long 0x00001111 +PDCRL2_D: .word 0x1111 +.align 2 PDCRL1_A: .long 0xFFFE3996 -PDCRL1_D: .long 0x00001000 +PDCRL1_D: .word 0x1000 +.align 2 CS3BCR_A: .long 0xFFFC0010 CS3BCR_D: .long 0x00004400 CS3WCR_A: .long 0xFFFC0034 @@ -190,13 +209,5 @@ RTCOR_D: .long 0xA55A0041 RTCSR_A: .long 0xFFFC0050 RTCSR_D: .long 0xa55a0010 -STBCR3_A: .long 0xFFFE0408 -STBCR3_D: .long 0x00000000 -STBCR4_A: .long 0xFFFE040C -STBCR4_D: .long 0x00000008 -STBCR5_A: .long 0xFFFE0410 -STBCR5_D: .long 0x00000000 -STBCR6_A: .long 0xFFFE0414 -STBCR6_D: .long 0x00000002 SDRAM_MODE: .long 0xFFFC5040 REPEAT_D: .long 0x00009C40 -- 2.30.2