From e9be4d78618af2e0d5592d9556cf0bba210cfd1a Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Tue, 18 Jul 2017 14:48:21 +0800 Subject: [PATCH] PCI: dwc: designware: Test PCIE_ATU_ENABLE bit specifically The ATU CTRL2 register is 32 bits, and bits other than the enable bit may be set. To check whether the ATU is enabled or not, we should test the enable bit specifically. Signed-off-by: Jisheng Zhang Signed-off-by: Bjorn Helgaas Acked-by: Joao Pinto Acked-by: Jingoo Han --- drivers/pci/dwc/pcie-designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c index ebcdce219acb..50cef47fc25d 100644 --- a/drivers/pci/dwc/pcie-designware.c +++ b/drivers/pci/dwc/pcie-designware.c @@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, */ for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) { val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2); - if (val == PCIE_ATU_ENABLE) + if (val & PCIE_ATU_ENABLE) return; usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); -- 2.30.2