From d7c605a20ee86a4e8f19ca7b33f7c4f7ba0468bc Mon Sep 17 00:00:00 2001 From: =?utf8?q?Christian=20K=C3=B6nig?= Date: Sun, 14 Apr 2013 12:47:59 +0200 Subject: [PATCH] drm/radeon: fix alignment of UVD fence MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_fence.c | 7 +++---- drivers/gpu/drm/radeon/radeon_uvd.c | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 82fe1835ff8c..1a699cefaac7 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -776,10 +776,9 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring) } else { /* put fence directly behind firmware */ - rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + - rdev->uvd_fw->size; - rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + - rdev->uvd_fw->size; + index = ALIGN(rdev->uvd_fw->size, 8); + rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index; + rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index; } } else { diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index 2fb4d6cf26b6..15580fb8546e 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c @@ -107,7 +107,7 @@ int radeon_uvd_init(struct radeon_device *rdev) platform_device_unregister(pdev); - bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) + + bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) + RADEON_UVD_STACK_SIZE + RADEON_UVD_HEAP_SIZE; r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->uvd.vcpu_bo); -- 2.30.2