From d3b71331eb61b416abc1fcd119ad50e95584e014 Mon Sep 17 00:00:00 2001 From: Marvin Hsu Date: Wed, 12 Apr 2017 20:40:27 +0800 Subject: [PATCH] Tegra: platform: helper functions to read chip ID This patch adds helper functions to find out the chip ID of the Tegra SoC. Change-Id: Ia3901dc7cdf77d8c23884d1ed38a80dba6a8afde Signed-off-by: Marvin Hsu Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/common/tegra_platform.c | 45 +++++++++------------- plat/nvidia/tegra/include/tegra_platform.h | 24 +++++++++--- 2 files changed, 37 insertions(+), 32 deletions(-) diff --git a/plat/nvidia/tegra/common/tegra_platform.c b/plat/nvidia/tegra/common/tegra_platform.c index 9246d52d..adf252b5 100644 --- a/plat/nvidia/tegra/common/tegra_platform.c +++ b/plat/nvidia/tegra/common/tegra_platform.c @@ -10,7 +10,6 @@ #include #include #include -#include /******************************************************************************* * Tegra platforms @@ -37,18 +36,6 @@ typedef enum tegra_platform { #define TEGRA_MINOR_UNIT_FPGA U(5) #define TEGRA_MINOR_VIRT_DEV_KIT U(6) -/******************************************************************************* - * Tegra major, minor version helper macros - ******************************************************************************/ -#define MAJOR_VERSION_SHIFT U(0x4) -#define MAJOR_VERSION_MASK U(0xF) -#define MINOR_VERSION_SHIFT U(0x10) -#define MINOR_VERSION_MASK U(0xF) -#define CHIP_ID_SHIFT U(8) -#define CHIP_ID_MASK U(0xFF) -#define PRE_SI_PLATFORM_SHIFT U(0x14) -#define PRE_SI_PLATFORM_MASK U(0xF) - /******************************************************************************* * Tegra macros defining all the SoC pre_si_platform ******************************************************************************/ @@ -93,33 +80,38 @@ uint32_t tegra_get_chipid_minor(void) return (tegra_get_chipid() >> MINOR_VERSION_SHIFT) & MINOR_VERSION_MASK; } -uint8_t tegra_chipid_is_t132(void) +/* + * Read the chip's pre_si_platform valus from the chip ID value + */ +static uint32_t tegra_get_chipid_pre_si_platform(void) { - uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; + return (tegra_get_chipid() >> PRE_SI_PLATFORM_SHIFT) & PRE_SI_PLATFORM_MASK; +} - return (chip_id == TEGRA_CHIPID_TEGRA13); +bool tegra_chipid_is_t132(void) +{ + uint32_t chip_id = ((tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK); + + return (chip_id == (uint32_t)TEGRA_CHIPID_TEGRA13); } -uint8_t tegra_chipid_is_t210(void) +bool tegra_chipid_is_t186(void) { uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; - return (chip_id == TEGRA_CHIPID_TEGRA21); + return (chip_id == TEGRA_CHIPID_TEGRA18); } -uint8_t tegra_chipid_is_t186(void) +bool tegra_chipid_is_t210(void) { uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK; - return (chip_id == TEGRA_CHIPID_TEGRA18); + return (chip_id == (uint32_t)TEGRA_CHIPID_TEGRA21); } -/* - * Read the chip's pre_si_platform valus from the chip ID value - */ -static uint32_t tegra_get_chipid_pre_si_platform(void) +bool tegra_chipid_is_t210_b01(void) { - return (tegra_get_chipid() >> PRE_SI_PLATFORM_SHIFT) & PRE_SI_PLATFORM_MASK; + return (tegra_chipid_is_t210() && (tegra_get_chipid_major() == 0x2UL)); } /* @@ -178,8 +170,8 @@ static tegra_platform_t tegra_get_platform(void) case TEGRA_MINOR_VIRT_DEV_KIT: ret = TEGRA_PLATFORM_VIRT_DEV_KIT; break; + default: - assert(0); ret = TEGRA_PLATFORM_MAX; break; } @@ -227,7 +219,6 @@ static tegra_platform_t tegra_get_platform(void) break; default: - assert(0); ret = TEGRA_PLATFORM_MAX; break; } diff --git a/plat/nvidia/tegra/include/tegra_platform.h b/plat/nvidia/tegra/include/tegra_platform.h index 6d2af592..33223aad 100644 --- a/plat/nvidia/tegra/include/tegra_platform.h +++ b/plat/nvidia/tegra/include/tegra_platform.h @@ -9,19 +9,33 @@ #include #include +#include + +/******************************************************************************* + * Tegra major, minor version helper macros + ******************************************************************************/ +#define MAJOR_VERSION_SHIFT U(0x4) +#define MAJOR_VERSION_MASK U(0xF) +#define MINOR_VERSION_SHIFT U(0x10) +#define MINOR_VERSION_MASK U(0xF) +#define CHIP_ID_SHIFT U(8) +#define CHIP_ID_MASK U(0xFF) +#define PRE_SI_PLATFORM_SHIFT U(0x14) +#define PRE_SI_PLATFORM_MASK U(0xF) /* - * Tegra chip major/minor version + * Tegra chip ID values */ uint32_t tegra_get_chipid_major(void); uint32_t tegra_get_chipid_minor(void); /* - * Tegra chip identifiers + * Tegra chip ID identifiers */ -uint8_t tegra_chipid_is_t132(void); -uint8_t tegra_chipid_is_t210(void); -uint8_t tegra_chipid_is_t186(void); +bool tegra_chipid_is_t132(void); +bool tegra_chipid_is_t186(void); +bool tegra_chipid_is_t210(void); +bool tegra_chipid_is_t210_b01(void); /* -- 2.30.2