From d3b0d628b08ab999a99c4ee30eaac1406a5d7056 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Fri, 19 Nov 2010 17:00:26 +0900 Subject: [PATCH] ARMV7: S5P: timer: get the count_value from register when call udelay Because of count_value is set to tcnb4 register, should be get from this register when call udelay function. Signed-off-by: Minkyu Kang --- arch/arm/cpu/armv7/s5p-common/timer.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index 04906503e6..651fd5ddff 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -65,15 +65,12 @@ int timer_init(void) writel((PRESCALER_1 & 0xff) << 8, &timer->tcfg0); writel((MUX_DIV_2 & 0xf) << MUX4_DIV_SHIFT, &timer->tcfg1); - if (count_value == 0) { - /* reset initial value */ - /* count_value = 2085937.5(HZ) (per 1 sec)*/ - count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * - (MUX_DIV_2 + 1)); - - /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ - count_value = count_value / 100; - } + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_pwm_clk() / ((PRESCALER_1 + 1) * + (MUX_DIV_2 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; /* set count value */ writel(count_value, &timer->tcntb4); @@ -114,8 +111,11 @@ void set_timer(unsigned long t) /* delay x useconds */ void __udelay(unsigned long usec) { + struct s5p_timer *const timer = s5p_get_base_timer(); unsigned long tmo, tmp; + count_value = readl(&timer->tcntb4); + if (usec >= 1000) { /* * if "big" number, spread normalization -- 2.30.2