From ce571b80e2b2411d5cdfa78888a6865f918621c6 Mon Sep 17 00:00:00 2001 From: Bard Liao Date: Mon, 12 Mar 2018 19:50:09 +0800 Subject: [PATCH] ASoC: rt5659: Separate adc 1/2 clock control The control bits of ADC 1 and 2 clock are different. We have to separate it. Signed-off-by: Zhong An Signed-off-by: Bard Liao Signed-off-by: Mark Brown --- sound/soc/codecs/rt5659.c | 38 ++++++++++++++++++++++++++++++++------ sound/soc/codecs/rt5659.h | 12 ++++++++---- 2 files changed, 40 insertions(+), 10 deletions(-) diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index a81e248dfdcd..1c1a521c73cb 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c @@ -1622,7 +1622,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, return idx; } -static int set_adc_clk(struct snd_soc_dapm_widget *w, +static int set_adc1_clk(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1630,13 +1630,39 @@ static int set_adc_clk(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK); break; case SND_SOC_DAPM_PRE_PMD: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, 0); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0); + break; + + default: + return 0; + } + + return 0; + +} + +static int set_adc2_clk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0); break; default: @@ -2559,9 +2585,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), /* ADC Mux */ diff --git a/sound/soc/codecs/rt5659.h b/sound/soc/codecs/rt5659.h index 3b51c8a46e6e..8b576d768744 100644 --- a/sound/soc/codecs/rt5659.h +++ b/sound/soc/codecs/rt5659.h @@ -1743,10 +1743,14 @@ #define RT5659_CKGEN_DAC2_SFT 4 /* Chopper and Clock control for ADC (0x013b)*/ -#define RT5659_CKXEN_ADCC_MASK (0x1 << 13) -#define RT5659_CKXEN_ADCC_SFT 13 -#define RT5659_CKGEN_ADCC_MASK (0x1 << 12) -#define RT5659_CKGEN_ADCC_SFT 12 +#define RT5659_CKXEN_ADC1_MASK (0x1 << 13) +#define RT5659_CKXEN_ADC1_SFT 13 +#define RT5659_CKGEN_ADC1_MASK (0x1 << 12) +#define RT5659_CKGEN_ADC1_SFT 12 +#define RT5659_CKXEN_ADC2_MASK (0x1 << 5) +#define RT5659_CKXEN_ADC2_SFT 5 +#define RT5659_CKGEN_ADC2_MASK (0x1 << 4) +#define RT5659_CKGEN_ADC2_SFT 4 /* Test Mode Control 1 (0x0145) */ #define RT5659_AD2DA_LB_MASK (0x1 << 9) -- 2.30.2