From cd4b356f3a8abcd8a96e19b515cf7dc00f41dcbe Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 10 Aug 2017 14:39:47 -0400 Subject: [PATCH] drm/amd/display/dm: add KV, KB, ML (v2) Add DCE8 APUs to display manager. v2: rebase changes Signed-off-by: Alex Deucher Reviewed-by: Harry Wentland Signed-off-by: Alex Deucher --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 7a50aeae8ad7..d28de04efa42 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1355,6 +1355,9 @@ int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_BONAIRE: case CHIP_HAWAII: + case CHIP_KAVERI: + case CHIP_KABINI: + case CHIP_MULLINS: case CHIP_TONGA: case CHIP_FIJI: case CHIP_CARRIZO: @@ -1519,6 +1522,19 @@ static int dm_early_init(void *handle) adev->mode_info.num_dig = 6; adev->mode_info.plane_type = dm_plane_type_default; break; + case CHIP_KAVERI: + adev->mode_info.num_crtc = 4; + adev->mode_info.num_hpd = 6; + adev->mode_info.num_dig = 7; + adev->mode_info.plane_type = dm_plane_type_default; + break; + case CHIP_KABINI: + case CHIP_MULLINS: + adev->mode_info.num_crtc = 2; + adev->mode_info.num_hpd = 6; + adev->mode_info.num_dig = 6; + adev->mode_info.plane_type = dm_plane_type_default; + break; case CHIP_FIJI: case CHIP_TONGA: adev->mode_info.num_crtc = 6; -- 2.30.2