From cb7ea82059069c6509c26b1f705982c6a919a3fe Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Thu, 23 Jul 2015 12:03:55 +0200
Subject: [PATCH] ARM: zynqmp: Wire up ethernet controllers

Wire up ethernet controllers and enable MII and BOOTP options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 arch/arm/include/asm/arch-zynqmp/hardware.h  |  5 ++++
 arch/arm/include/asm/arch-zynqmp/sys_proto.h |  5 ++++
 board/xilinx/zynqmp/zynqmp.c                 | 25 ++++++++++++++++++++
 include/configs/xilinx_zynqmp.h              | 21 ++++++++++++++++
 4 files changed, 56 insertions(+)

diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h
index 15bd519bfb..5d191e848c 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -11,6 +11,11 @@
 #define ZYNQ_SERIAL_BASEADDR0	0xFF000000
 #define ZYNQ_SERIAL_BASEADDR1	0xFF001000
 
+#define ZYNQ_GEM_BASEADDR0	0xFF0B0000
+#define ZYNQ_GEM_BASEADDR1	0xFF0C0000
+#define ZYNQ_GEM_BASEADDR2	0xFF0D0000
+#define ZYNQ_GEM_BASEADDR3	0xFF0E0000
+
 #define ZYNQ_SPI_BASEADDR0	0xFF040000
 #define ZYNQ_SPI_BASEADDR1	0xFF050000
 
diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
index 3ca15cb6e5..f5c90d11dc 100644
--- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h
@@ -8,6 +8,11 @@
 #ifndef _ASM_ARCH_SYS_PROTO_H
 #define _ASM_ARCH_SYS_PROTO_H
 
+/* Setup clk for network */
+static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
+{
+}
+
 int zynq_sdhci_init(unsigned long regbase);
 int zynq_slcr_get_mio_pin_status(const char *periph);
 
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index f5ff64d988..fb43cb0b9a 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -51,6 +51,31 @@ void reset_cpu(ulong addr)
 {
 }
 
+int board_eth_init(bd_t *bis)
+{
+	u32 ret = 0;
+
+#if defined(CONFIG_ZYNQ_GEM)
+# if defined(CONFIG_ZYNQ_GEM0)
+	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
+						CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
+# endif
+# if defined(CONFIG_ZYNQ_GEM1)
+	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
+						CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
+# endif
+# if defined(CONFIG_ZYNQ_GEM2)
+	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR2,
+						CONFIG_ZYNQ_GEM_PHY_ADDR2, 0);
+# endif
+# if defined(CONFIG_ZYNQ_GEM3)
+	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR3,
+						CONFIG_ZYNQ_GEM_PHY_ADDR3, 0);
+# endif
+#endif
+	return ret;
+}
+
 #ifdef CONFIG_CMD_MMC
 int board_mmc_init(bd_t *bd)
 {
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 8cb276ca70..9ed8771ff5 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -76,6 +76,16 @@
 #define CONFIG_CMD_ELF
 #define CONFIG_MP
 
+#define CONFIG_CMD_MII
+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_MAY_FAIL
+#define CONFIG_BOOTP_SERVERIP
+
 /* SPI */
 #ifdef CONFIG_ZYNQ_SPI
 # define CONFIG_SPI_FLASH_SST
@@ -130,6 +140,17 @@
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_SYS_MAXARGS		64
 
+/* Ethernet driver */
+#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \
+	defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3)
+# define CONFIG_NET_MULTI
+# define CONFIG_ZYNQ_GEM
+# define CONFIG_MII
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# define CONFIG_PHYLIB
+# define CONFIG_PHY_MARVELL
+#endif
+
 /* I2C */
 #if defined(CONFIG_SYS_I2C_ZYNQ)
 # define CONFIG_CMD_I2C
-- 
2.30.2