From c9bb686b597d30935d6e05aaade51fc765d1ca5b Mon Sep 17 00:00:00 2001 From: Eric Yang Date: Mon, 28 Aug 2017 16:50:17 -0400 Subject: [PATCH] drm/amd/display: Fix time out on boot On boot, hubp 0 is powergated during enable accel mode, so we time out when we try to blank in undo wa. Fix: Check power gate status before set blank Signed-off-by: Eric Yang Reviewed-by: Hersen Wu Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 71ff1cedbdf4..7ea274475598 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -780,6 +780,12 @@ static void undo_DEGVIDCN10_253_wa(struct dc *dc) { struct dce_hwseq *hws = dc->hwseq; struct mem_input *mi = dc->res_pool->mis[0]; + int pwr_status = 0; + + REG_GET(DOMAIN0_PG_STATUS, DOMAIN0_PGFSM_PWR_STATUS, &pwr_status); + /* Don't need to blank if hubp is power gated*/ + if (pwr_status == 2) + return; mi->funcs->set_blank(mi, true); -- 2.30.2