From c60c6b0507a3ed40e0a53e991fbbb600efaab881 Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Wed, 29 Mar 2023 18:09:15 +0200 Subject: [PATCH] tegra: add support for nVidia Jetson Nano Development board Add support for the nVidia Jetson Nano (4GB) Development Board (P3450 rev. B01) Working: - Ethernet - USB ports - PCIe controller Not supported atm: - GPU - HDMI - DP Untested: - CSI ports Flashing: - Use Balena Etcher tool to flash one of the img.gz files directly to an SD card (SquashFs or EXT4) - Insert in devkit - Power up Device will be available via: - Serial console - ssh root@192.168.1.1 Warning: The 2GB model of the Jetson Nano module is NOT supported Signed-off-by: Koen Vandeputte --- target/linux/tegra/Makefile | 4 +- target/linux/tegra/cortexa57/config-default | 291 ++++++ target/linux/tegra/cortexa57/target.mk | 8 + target/linux/tegra/generic/target.mk | 1 - target/linux/tegra/image/bootscript-cortexa57 | 8 + target/linux/tegra/image/cortexa57.mk | 49 + ...nd-APE-audio-support-on-Jetson-platf.patch | 931 ++++++++++++++++++ ...-arm64-tegra-Rename-top-level-clocks.patch | 28 + ...64-tegra-Rename-top-level-regulators.patch | 100 ++ ...m64-tegra-Rename-thermal-zones-nodes.patch | 24 + ...-unit-address-for-audio-card-graph-e.patch | 61 ++ ...JEDEC-vendor-prefix-for-SPI-NOR-flas.patch | 25 + ...ove-unsupported-regulator-properties.patch | 103 ++ ...on-nano-Remove-extra-PLL-power-suppl.patch | 41 + ...arm64-tegra-Update-PWM-fan-node-name.patch | 28 + ...few-AHUB-devices-for-Tegra210-and-la.patch | 107 ++ ...ve-useless-usb-ehci-compatible-strin.patch | 35 + ...m64-tegra-Rename-thermal-zones-nodes.patch | 51 + ...-missing-TSEC-properties-on-Tegra210.patch | 40 + ...-Sort-Tegra210-XUSB-clocks-correctly.patch | 37 + ...dd-host1x-hotflush-reset-on-Tegra210.patch | 25 + .../99-scripts-fix-compilation-error.patch | 21 + 22 files changed, 2015 insertions(+), 3 deletions(-) create mode 100644 target/linux/tegra/cortexa57/config-default create mode 100644 target/linux/tegra/cortexa57/target.mk delete mode 100644 target/linux/tegra/generic/target.mk create mode 100644 target/linux/tegra/image/bootscript-cortexa57 create mode 100644 target/linux/tegra/image/cortexa57.mk create mode 100644 target/linux/tegra/patches-5.15/111-arm64-tegra-Extend-APE-audio-support-on-Jetson-platf.patch create mode 100644 target/linux/tegra/patches-5.15/112-arm64-tegra-Rename-top-level-clocks.patch create mode 100644 target/linux/tegra/patches-5.15/113-arm64-tegra-Rename-top-level-regulators.patch create mode 100644 target/linux/tegra/patches-5.15/114-arm64-tegra-Rename-thermal-zones-nodes.patch create mode 100644 target/linux/tegra/patches-5.15/115-arm64-tegra-Drop-unit-address-for-audio-card-graph-e.patch create mode 100644 target/linux/tegra/patches-5.15/116-arm64-tegra-Use-JEDEC-vendor-prefix-for-SPI-NOR-flas.patch create mode 100644 target/linux/tegra/patches-5.15/117-arm64-tegra-Remove-unsupported-regulator-properties.patch create mode 100644 target/linux/tegra/patches-5.15/118-arm64-tegra-jetson-nano-Remove-extra-PLL-power-suppl.patch create mode 100644 target/linux/tegra/patches-5.15/119-arm64-tegra-Update-PWM-fan-node-name.patch create mode 100644 target/linux/tegra/patches-5.15/211-arm64-tegra-Add-few-AHUB-devices-for-Tegra210-and-la.patch create mode 100644 target/linux/tegra/patches-5.15/212-arm64-tegra-Remove-useless-usb-ehci-compatible-strin.patch create mode 100644 target/linux/tegra/patches-5.15/213-arm64-tegra-Rename-thermal-zones-nodes.patch create mode 100644 target/linux/tegra/patches-5.15/214-arm64-tegra-Add-missing-TSEC-properties-on-Tegra210.patch create mode 100644 target/linux/tegra/patches-5.15/215-arm64-tegra-Sort-Tegra210-XUSB-clocks-correctly.patch create mode 100644 target/linux/tegra/patches-5.15/216-arm64-tegra-Add-host1x-hotflush-reset-on-Tegra210.patch create mode 100644 target/linux/tegra/patches-5.15/99-scripts-fix-compilation-error.patch diff --git a/target/linux/tegra/Makefile b/target/linux/tegra/Makefile index a893c72efa..213d44892e 100644 --- a/target/linux/tegra/Makefile +++ b/target/linux/tegra/Makefile @@ -6,8 +6,8 @@ include $(TOPDIR)/rules.mk BOARD:=tegra BOARDNAME:=NVIDIA Tegra -FEATURES:=audio boot-part display ext4 fpu gpio pci pcie rootfs-part rtc squashfs usb -SUBTARGETS:=cortexa9 +FEATURES:=audio boot-part display ext4 fpu gpio pci pcie rootfs-part rtc squashfs usb targz +SUBTARGETS:=cortexa9 cortexa57 KERNEL_PATCHVER := 5.15 diff --git a/target/linux/tegra/cortexa57/config-default b/target/linux/tegra/cortexa57/config-default new file mode 100644 index 0000000000..6247b2d316 --- /dev/null +++ b/target/linux/tegra/cortexa57/config-default @@ -0,0 +1,291 @@ +CONFIG_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +# CONFIG_ARCH_TEGRA_132_SOC is not set +# CONFIG_ARCH_TEGRA_186_SOC is not set +# CONFIG_ARCH_TEGRA_194_SOC is not set +CONFIG_ARCH_TEGRA_210_SOC=y +# CONFIG_ARCH_TEGRA_234_SOC is not set +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CRYPTO=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_GIC_PM=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_MHU_V2 is not set +CONFIG_ARM_PSCI_FW=y +# CONFIG_ARM_SCMI_CPUFREQ is not set +CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_HAVE_TRANSPORT=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y +CONFIG_ARM_SCMI_TRANSPORT_SMC=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +# CONFIG_ARM_SMMU_V3 is not set +# CONFIG_ARM_TEGRA186_CPUFREQ is not set +# CONFIG_ARM_TEGRA20_CPUFREQ is not set +CONFIG_ARM_TEGRA_DEVFREQ=y +# CONFIG_ATA is not set +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BLK_DEV_SD=y +CONFIG_CB710_CORE=y +# CONFIG_CB710_DEBUG is not set +CONFIG_CB710_DEBUG_ASSUMPTIONS=y +CONFIG_CC_HAVE_SHADOW_CALL_STACK=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CLK_TEGRA_BPMP=y +# CONFIG_COMMON_CLK_MAX77686 is not set +# CONFIG_COMMON_CLK_SCMI is not set +# CONFIG_COMMON_CLK_SCPI is not set +CONFIG_CONFIGFS_FS=y +CONFIG_CONNECTOR=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_COREDUMP=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_THERMAL=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_THERMAL=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SIMD=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DECOMPRESS_GZIP=y +# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set +# CONFIG_DEVFREQ_THERMAL is not set +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DWMAC_GENERIC=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_EEPROM_AT24=y +CONFIG_ELF_CORE=y +CONFIG_FAT_FS=y +CONFIG_FB_FOREIGN_ENDIAN=y +CONFIG_FB_LITTLE_ENDIAN=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_SIMPLE=y +CONFIG_FB_TILEBLITTING=y +CONFIG_FIXED_PHY=y +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FRAME_POINTER=y +CONFIG_FRAME_WARN=2048 +CONFIG_FREEZER=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CACHE=y +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GPIO_MAX77620=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_NVIDIA_GPU=y +CONFIG_I2C_TEGRA_BPMP=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INPUT_AXP20X_PEK=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_IOMMU_DMA=y +CONFIG_IRQ_MSI_IOMMU=y +CONFIG_KALLSYMS=y +CONFIG_KSM=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_PLATFORM=y +CONFIG_LEDS_GPIO=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MAX77620_THERMAL=y +CONFIG_MAX77620_WATCHDOG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_CORE=y +CONFIG_MFD_MAX77620=y +CONFIG_MFD_SYSCON=y +CONFIG_MICREL_PHY=y +CONFIG_MMC_CB710=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_RICOH_MMC=y +CONFIG_MMC_SDHCI_PCI=y +CONFIG_MMC_SPI=y +CONFIG_MMC_TIFM_SD=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_TEGRA=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NET_SELFTESTS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=8 +CONFIG_NVMEM_SYSFS=y +CONFIG_OF_MDIO=y +CONFIG_PAGE_POOL=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCS_XPCS=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PHY_TEGRA_XUSB is not set +CONFIG_PINCTRL_AXP209=y +CONFIG_PINCTRL_MAX77620=y +CONFIG_PINCTRL_TEGRA210=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PRINTK_TIME=y +CONFIG_PROC_EVENTS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RD_GZIP=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP_IRQ=y +# CONFIG_REGULATOR_ARM_SCMI is not set +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_MAX77620=y +CONFIG_REGULATOR_SY8106A=y +CONFIG_RELAY=y +CONFIG_RESET_SCMI=y +CONFIG_RESET_TEGRA_BPMP=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SDIO_UART=y +CONFIG_SECURITYFS=y +CONFIG_SENSORS_ARM_SCMI=y +# CONFIG_SENSORS_ARM_SCPI is not set +CONFIG_SENSORS_PWM_FAN=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_NR_UARTS=8 +CONFIG_SERIAL_8250_RUNTIME_UARTS=8 +CONFIG_SERIAL_TEGRA_TCU=y +CONFIG_SERIAL_TEGRA_TCU_CONSOLE=y +CONFIG_SERIO_SERPORT=y +CONFIG_SOC_TEGRA_POWERGATE_BPMP=y +# CONFIG_SOUND is not set +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +# CONFIG_SPI_TEGRA20_SFLASH is not set +CONFIG_SPI_TEGRA210_QUAD=y +# CONFIG_STAGING is not set +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSFS_SYSCALL=y +# CONFIG_TEGRA20_APB_DMA is not set +CONFIG_TEGRA210_ADMA=y +CONFIG_TEGRA210_EMC=y +CONFIG_TEGRA210_EMC_TABLE=y +CONFIG_TEGRA_ACONNECT=y +CONFIG_TEGRA_BPMP=y +CONFIG_TEGRA_BPMP_THERMAL=y +CONFIG_TEGRA_CLK_DFLL=y +CONFIG_TEGRA_HSP_MBOX=y +CONFIG_TEGRA_IOMMU_SMMU=y +CONFIG_TEGRA_IVC=y +CONFIG_TEGRA_SOCTHERM=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TIFM_7XX1=y +CONFIG_TIFM_CORE=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +CONFIG_USERIO=y +CONFIG_VFAT_FS=y +# CONFIG_VHOST_MENU is not set +# CONFIG_VIRTIO_MENU is not set +CONFIG_VMAP_STACK=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_XXHASH=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/tegra/cortexa57/target.mk b/target/linux/tegra/cortexa57/target.mk new file mode 100644 index 0000000000..18dff758bb --- /dev/null +++ b/target/linux/tegra/cortexa57/target.mk @@ -0,0 +1,8 @@ +ARCH:=aarch64 +BOARDNAME:=Tegra with Cortex-A57 +CPU_TYPE:=cortex-a57 +KERNELNAME:=Image dtbs + +define Target/Description + Build firmware images for nVIDIA Tegra (Cortex-A57) based boards. +endef diff --git a/target/linux/tegra/generic/target.mk b/target/linux/tegra/generic/target.mk deleted file mode 100644 index f5cb1fb19b..0000000000 --- a/target/linux/tegra/generic/target.mk +++ /dev/null @@ -1 +0,0 @@ -BOARDNAME:=Generic diff --git a/target/linux/tegra/image/bootscript-cortexa57 b/target/linux/tegra/image/bootscript-cortexa57 new file mode 100644 index 0000000000..e9984044c5 --- /dev/null +++ b/target/linux/tegra/image/bootscript-cortexa57 @@ -0,0 +1,8 @@ +part uuid ${devtype} ${devnum}:2 ptuuid + +setenv bootargs "root=PARTUUID=${ptuuid} rw rootwait console=ttyS0,115200 console=tty0" + +load ${devtype} ${devnum}:${bootpart} ${kernel_addr_r} Image +load ${devtype} ${devnum}:${bootpart} ${fdt_addr_r} ${soc}-${board}.dtb + +booti ${kernel_addr_r} - ${fdt_addr_r} diff --git a/target/linux/tegra/image/cortexa57.mk b/target/linux/tegra/image/cortexa57.mk new file mode 100644 index 0000000000..b8d3be5043 --- /dev/null +++ b/target/linux/tegra/image/cortexa57.mk @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2017-2019 Tomasz Maciej Nowak +# Copyright (C) 2022 Koen Vandeputte + +DEVICE_VARS += BOOT_SCRIPT UBOOT + +define Build/tegra-sdcard + rm -fR $@.boot + mkdir -p $@.boot + $(CP) $(KDIR)/$(KERNEL_NAME) $@.boot + $(if $(DEVICE_DTS),\ + $(foreach dtb,$(DEVICE_DTS),$(CP) $(DTS_DIR)/$(dtb).dtb $@.boot), \ + $(CP) $(DTS_DIR)/*.dtb $@.boot) + mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ + -n '$(DEVICE_TITLE) OpenWrt bootscript' \ + -d $(BOOT_SCRIPT) \ + $@.boot/boot.scr + + SIGNATURE="$(IMG_PART_SIGNATURE)" \ + $(SCRIPT_DIR)/gen_image_generic.sh \ + $@ \ + $(CONFIG_TARGET_KERNEL_PARTSIZE) $@.boot \ + $(CONFIG_TARGET_ROOTFS_PARTSIZE) $(IMAGE_ROOTFS) \ + 2048 + + $(if $(UBOOT),dd if=$(STAGING_DIR_IMAGE)/$(UBOOT).img of=$@ bs=512 skip=1 seek=1 conv=notrunc) +endef + +define Device/Default + BOOT_SCRIPT := bootscript-cortexa57 + DTS_DIR := $(DTS_DIR)/nvidia + KERNEL_NAME := Image + KERNEL_INSTALL := 1 + KERNEL := kernel-bin + IMAGES := sdcard.img.gz dtb + IMAGE/sdcard.img.gz := tegra-sdcard | gzip | append-metadata + IMAGE/dtb := install-dtb + PROFILES := Default +endef + +define Device/jetson_nano_devkit + DEVICE_VENDOR := NVIDIA + DEVICE_MODEL := Jetson Nano + DEVICE_VARIANT := Development Kit + DEVICE_DTS := tegra210-p3450-0000 + DEVICE_PACKAGES := kmod-r8169 wpad-basic-mbedtls +endef +TARGET_DEVICES += jetson_nano_devkit diff --git a/target/linux/tegra/patches-5.15/111-arm64-tegra-Extend-APE-audio-support-on-Jetson-platf.patch b/target/linux/tegra/patches-5.15/111-arm64-tegra-Extend-APE-audio-support-on-Jetson-platf.patch new file mode 100644 index 0000000000..45b78ce995 --- /dev/null +++ b/target/linux/tegra/patches-5.15/111-arm64-tegra-Extend-APE-audio-support-on-Jetson-platf.patch @@ -0,0 +1,931 @@ +From 4f45fb0bd3071b8fdaa1cba21234ce1aed2ba13f Mon Sep 17 00:00:00 2001 +From: Sameer Pujar +Date: Mon, 13 Sep 2021 22:12:21 +0530 +Subject: [PATCH 1/9] arm64: tegra: Extend APE audio support on Jetson + platforms + +Extend APE audio support by adding more audio components such as SFC, +MVC, AMX, ADX and Mixer. These components can be plugged into an audio +path and required processing can be done. ASoC audio-graph based sound +driver is used to facilitate this and thus extend sound bindings as +well. + +The components in the path may require different PCM parameters (such +as sample rate, channels or sample size). Depending on the pre-defined +audio paths, these can be statically configured with "convert-xxx" DT +properties in endpoint subnode. The support for the rate and channel +conversion is already available in generic audio-graph driver. Sample +size conversion support can be added based on the need in future. + +The support is extended for following platforms: + * Jertson TX1 + * Jetson Nano + * Jetson TX2 + * Jetson AGX Xavier + * Jetson Xavier NX + +Signed-off-by: Sameer Pujar +Signed-off-by: Thierry Reding +--- + .../boot/dts/nvidia/tegra210-p3450-0000.dts | 876 ++++++++++++++++++ + 1 file changed, 876 insertions(+) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -746,6 +746,481 @@ + }; + }; + ++ sfc@702d2000 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ sfc1_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_sfc1_in_ep>; ++ }; ++ }; ++ ++ sfc1_out_port: port@1 { ++ reg = <1>; ++ ++ sfc1_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_sfc1_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ sfc@702d2200 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ sfc2_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_sfc2_in_ep>; ++ }; ++ }; ++ ++ sfc2_out_port: port@1 { ++ reg = <1>; ++ ++ sfc2_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_sfc2_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ sfc@702d2400 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ sfc3_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_sfc3_in_ep>; ++ }; ++ }; ++ ++ sfc3_out_port: port@1 { ++ reg = <1>; ++ ++ sfc3_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_sfc3_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ sfc@702d2600 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ sfc4_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_sfc4_in_ep>; ++ }; ++ }; ++ ++ sfc4_out_port: port@1 { ++ reg = <1>; ++ ++ sfc4_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_sfc4_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ mvc@702da000 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mvc1_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_mvc1_in_ep>; ++ }; ++ }; ++ ++ mvc1_out_port: port@1 { ++ reg = <1>; ++ ++ mvc1_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_mvc1_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ mvc@702da200 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ mvc2_cif_in_ep: endpoint { ++ remote-endpoint = <&xbar_mvc2_in_ep>; ++ }; ++ }; ++ ++ mvc2_out_port: port@1 { ++ reg = <1>; ++ ++ mvc2_cif_out_ep: endpoint { ++ remote-endpoint = <&xbar_mvc2_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ amx@702d3000 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ amx1_in1_ep: endpoint { ++ remote-endpoint = <&xbar_amx1_in1_ep>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ amx1_in2_ep: endpoint { ++ remote-endpoint = <&xbar_amx1_in2_ep>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ ++ amx1_in3_ep: endpoint { ++ remote-endpoint = <&xbar_amx1_in3_ep>; ++ }; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ ++ amx1_in4_ep: endpoint { ++ remote-endpoint = <&xbar_amx1_in4_ep>; ++ }; ++ }; ++ ++ amx1_out_port: port@4 { ++ reg = <4>; ++ ++ amx1_out_ep: endpoint { ++ remote-endpoint = <&xbar_amx1_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ amx@702d3100 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ amx2_in1_ep: endpoint { ++ remote-endpoint = <&xbar_amx2_in1_ep>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ ++ amx2_in2_ep: endpoint { ++ remote-endpoint = <&xbar_amx2_in2_ep>; ++ }; ++ }; ++ ++ amx2_in3_port: port@2 { ++ reg = <2>; ++ ++ amx2_in3_ep: endpoint { ++ remote-endpoint = <&xbar_amx2_in3_ep>; ++ }; ++ }; ++ ++ amx2_in4_port: port@3 { ++ reg = <3>; ++ ++ amx2_in4_ep: endpoint { ++ remote-endpoint = <&xbar_amx2_in4_ep>; ++ }; ++ }; ++ ++ amx2_out_port: port@4 { ++ reg = <4>; ++ ++ amx2_out_ep: endpoint { ++ remote-endpoint = <&xbar_amx2_out_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ adx@702d3800 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ adx1_in_ep: endpoint { ++ remote-endpoint = <&xbar_adx1_in_ep>; ++ }; ++ }; ++ ++ adx1_out1_port: port@1 { ++ reg = <1>; ++ ++ adx1_out1_ep: endpoint { ++ remote-endpoint = <&xbar_adx1_out1_ep>; ++ }; ++ }; ++ ++ adx1_out2_port: port@2 { ++ reg = <2>; ++ ++ adx1_out2_ep: endpoint { ++ remote-endpoint = <&xbar_adx1_out2_ep>; ++ }; ++ }; ++ ++ adx1_out3_port: port@3 { ++ reg = <3>; ++ ++ adx1_out3_ep: endpoint { ++ remote-endpoint = <&xbar_adx1_out3_ep>; ++ }; ++ }; ++ ++ adx1_out4_port: port@4 { ++ reg = <4>; ++ ++ adx1_out4_ep: endpoint { ++ remote-endpoint = <&xbar_adx1_out4_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ adx@702d3900 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0>; ++ ++ adx2_in_ep: endpoint { ++ remote-endpoint = <&xbar_adx2_in_ep>; ++ }; ++ }; ++ ++ adx2_out1_port: port@1 { ++ reg = <1>; ++ ++ adx2_out1_ep: endpoint { ++ remote-endpoint = <&xbar_adx2_out1_ep>; ++ }; ++ }; ++ ++ adx2_out2_port: port@2 { ++ reg = <2>; ++ ++ adx2_out2_ep: endpoint { ++ remote-endpoint = <&xbar_adx2_out2_ep>; ++ }; ++ }; ++ ++ adx2_out3_port: port@3 { ++ reg = <3>; ++ ++ adx2_out3_ep: endpoint { ++ remote-endpoint = <&xbar_adx2_out3_ep>; ++ }; ++ }; ++ ++ adx2_out4_port: port@4 { ++ reg = <4>; ++ ++ adx2_out4_ep: endpoint { ++ remote-endpoint = <&xbar_adx2_out4_ep>; ++ }; ++ }; ++ }; ++ }; ++ ++ amixer@702dbb00 { ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0x0>; ++ ++ mixer_in1_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in1_ep>; ++ }; ++ }; ++ ++ port@1 { ++ reg = <0x1>; ++ ++ mixer_in2_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in2_ep>; ++ }; ++ }; ++ ++ port@2 { ++ reg = <0x2>; ++ ++ mixer_in3_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in3_ep>; ++ }; ++ }; ++ ++ port@3 { ++ reg = <0x3>; ++ ++ mixer_in4_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in4_ep>; ++ }; ++ }; ++ ++ port@4 { ++ reg = <0x4>; ++ ++ mixer_in5_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in5_ep>; ++ }; ++ }; ++ ++ port@5 { ++ reg = <0x5>; ++ ++ mixer_in6_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in6_ep>; ++ }; ++ }; ++ ++ port@6 { ++ reg = <0x6>; ++ ++ mixer_in7_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in7_ep>; ++ }; ++ }; ++ ++ port@7 { ++ reg = <0x7>; ++ ++ mixer_in8_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in8_ep>; ++ }; ++ }; ++ ++ port@8 { ++ reg = <0x8>; ++ ++ mixer_in9_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in9_ep>; ++ }; ++ }; ++ ++ port@9 { ++ reg = <0x9>; ++ ++ mixer_in10_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_in10_ep>; ++ }; ++ }; ++ ++ mixer_out1_port: port@a { ++ reg = <0xa>; ++ ++ mixer_out1_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_out1_ep>; ++ }; ++ }; ++ ++ mixer_out2_port: port@b { ++ reg = <0xb>; ++ ++ mixer_out2_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_out2_ep>; ++ }; ++ }; ++ ++ mixer_out3_port: port@c { ++ reg = <0xc>; ++ ++ mixer_out3_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_out3_ep>; ++ }; ++ }; ++ ++ mixer_out4_port: port@d { ++ reg = <0xd>; ++ ++ mixer_out4_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_out4_ep>; ++ }; ++ }; ++ ++ mixer_out5_port: port@e { ++ reg = <0xe>; ++ ++ mixer_out5_ep: endpoint { ++ remote-endpoint = <&xbar_mixer_out5_ep>; ++ }; ++ }; ++ }; ++ }; ++ + ports { + xbar_i2s3_port: port@c { + reg = <0xc>; +@@ -778,6 +1253,382 @@ + remote-endpoint = <&dmic2_cif_ep>; + }; + }; ++ ++ xbar_sfc1_in_port: port@12 { ++ reg = <0x12>; ++ ++ xbar_sfc1_in_ep: endpoint { ++ remote-endpoint = <&sfc1_cif_in_ep>; ++ }; ++ }; ++ ++ port@13 { ++ reg = <0x13>; ++ ++ xbar_sfc1_out_ep: endpoint { ++ remote-endpoint = <&sfc1_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_sfc2_in_port: port@14 { ++ reg = <0x14>; ++ ++ xbar_sfc2_in_ep: endpoint { ++ remote-endpoint = <&sfc2_cif_in_ep>; ++ }; ++ }; ++ ++ port@15 { ++ reg = <0x15>; ++ ++ xbar_sfc2_out_ep: endpoint { ++ remote-endpoint = <&sfc2_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_sfc3_in_port: port@16 { ++ reg = <0x16>; ++ ++ xbar_sfc3_in_ep: endpoint { ++ remote-endpoint = <&sfc3_cif_in_ep>; ++ }; ++ }; ++ ++ port@17 { ++ reg = <0x17>; ++ ++ xbar_sfc3_out_ep: endpoint { ++ remote-endpoint = <&sfc3_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_sfc4_in_port: port@18 { ++ reg = <0x18>; ++ ++ xbar_sfc4_in_ep: endpoint { ++ remote-endpoint = <&sfc4_cif_in_ep>; ++ }; ++ }; ++ ++ port@19 { ++ reg = <0x19>; ++ ++ xbar_sfc4_out_ep: endpoint { ++ remote-endpoint = <&sfc4_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_mvc1_in_port: port@1a { ++ reg = <0x1a>; ++ ++ xbar_mvc1_in_ep: endpoint { ++ remote-endpoint = <&mvc1_cif_in_ep>; ++ }; ++ }; ++ ++ port@1b { ++ reg = <0x1b>; ++ ++ xbar_mvc1_out_ep: endpoint { ++ remote-endpoint = <&mvc1_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_mvc2_in_port: port@1c { ++ reg = <0x1c>; ++ ++ xbar_mvc2_in_ep: endpoint { ++ remote-endpoint = <&mvc2_cif_in_ep>; ++ }; ++ }; ++ ++ port@1d { ++ reg = <0x1d>; ++ ++ xbar_mvc2_out_ep: endpoint { ++ remote-endpoint = <&mvc2_cif_out_ep>; ++ }; ++ }; ++ ++ xbar_amx1_in1_port: port@1e { ++ reg = <0x1e>; ++ ++ xbar_amx1_in1_ep: endpoint { ++ remote-endpoint = <&amx1_in1_ep>; ++ }; ++ }; ++ ++ xbar_amx1_in2_port: port@1f { ++ reg = <0x1f>; ++ ++ xbar_amx1_in2_ep: endpoint { ++ remote-endpoint = <&amx1_in2_ep>; ++ }; ++ }; ++ ++ xbar_amx1_in3_port: port@20 { ++ reg = <0x20>; ++ ++ xbar_amx1_in3_ep: endpoint { ++ remote-endpoint = <&amx1_in3_ep>; ++ }; ++ }; ++ ++ xbar_amx1_in4_port: port@21 { ++ reg = <0x21>; ++ ++ xbar_amx1_in4_ep: endpoint { ++ remote-endpoint = <&amx1_in4_ep>; ++ }; ++ }; ++ ++ port@22 { ++ reg = <0x22>; ++ ++ xbar_amx1_out_ep: endpoint { ++ remote-endpoint = <&amx1_out_ep>; ++ }; ++ }; ++ ++ xbar_amx2_in1_port: port@23 { ++ reg = <0x23>; ++ ++ xbar_amx2_in1_ep: endpoint { ++ remote-endpoint = <&amx2_in1_ep>; ++ }; ++ }; ++ ++ xbar_amx2_in2_port: port@24 { ++ reg = <0x24>; ++ ++ xbar_amx2_in2_ep: endpoint { ++ remote-endpoint = <&amx2_in2_ep>; ++ }; ++ }; ++ ++ xbar_amx2_in3_port: port@25 { ++ reg = <0x25>; ++ ++ xbar_amx2_in3_ep: endpoint { ++ remote-endpoint = <&amx2_in3_ep>; ++ }; ++ }; ++ ++ xbar_amx2_in4_port: port@26 { ++ reg = <0x26>; ++ ++ xbar_amx2_in4_ep: endpoint { ++ remote-endpoint = <&amx2_in4_ep>; ++ }; ++ }; ++ ++ port@27 { ++ reg = <0x27>; ++ ++ xbar_amx2_out_ep: endpoint { ++ remote-endpoint = <&amx2_out_ep>; ++ }; ++ }; ++ ++ xbar_adx1_in_port: port@28 { ++ reg = <0x28>; ++ ++ xbar_adx1_in_ep: endpoint { ++ remote-endpoint = <&adx1_in_ep>; ++ }; ++ }; ++ ++ port@29 { ++ reg = <0x29>; ++ ++ xbar_adx1_out1_ep: endpoint { ++ remote-endpoint = <&adx1_out1_ep>; ++ }; ++ }; ++ ++ port@2a { ++ reg = <0x2a>; ++ ++ xbar_adx1_out2_ep: endpoint { ++ remote-endpoint = <&adx1_out2_ep>; ++ }; ++ }; ++ ++ port@2b { ++ reg = <0x2b>; ++ ++ xbar_adx1_out3_ep: endpoint { ++ remote-endpoint = <&adx1_out3_ep>; ++ }; ++ }; ++ ++ port@2c { ++ reg = <0x2c>; ++ ++ xbar_adx1_out4_ep: endpoint { ++ remote-endpoint = <&adx1_out4_ep>; ++ }; ++ }; ++ ++ xbar_adx2_in_port: port@2d { ++ reg = <0x2d>; ++ ++ xbar_adx2_in_ep: endpoint { ++ remote-endpoint = <&adx2_in_ep>; ++ }; ++ }; ++ ++ port@2e { ++ reg = <0x2e>; ++ ++ xbar_adx2_out1_ep: endpoint { ++ remote-endpoint = <&adx2_out1_ep>; ++ }; ++ }; ++ ++ port@2f { ++ reg = <0x2f>; ++ ++ xbar_adx2_out2_ep: endpoint { ++ remote-endpoint = <&adx2_out2_ep>; ++ }; ++ }; ++ ++ port@30 { ++ reg = <0x30>; ++ ++ xbar_adx2_out3_ep: endpoint { ++ remote-endpoint = <&adx2_out3_ep>; ++ }; ++ }; ++ ++ port@31 { ++ reg = <0x31>; ++ ++ xbar_adx2_out4_ep: endpoint { ++ remote-endpoint = <&adx2_out4_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in1_port: port@32 { ++ reg = <0x32>; ++ ++ xbar_mixer_in1_ep: endpoint { ++ remote-endpoint = <&mixer_in1_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in2_port: port@33 { ++ reg = <0x33>; ++ ++ xbar_mixer_in2_ep: endpoint { ++ remote-endpoint = <&mixer_in2_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in3_port: port@34 { ++ reg = <0x34>; ++ ++ xbar_mixer_in3_ep: endpoint { ++ remote-endpoint = <&mixer_in3_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in4_port: port@35 { ++ reg = <0x35>; ++ ++ xbar_mixer_in4_ep: endpoint { ++ remote-endpoint = <&mixer_in4_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in5_port: port@36 { ++ reg = <0x36>; ++ ++ xbar_mixer_in5_ep: endpoint { ++ remote-endpoint = <&mixer_in5_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in6_port: port@37 { ++ reg = <0x37>; ++ ++ xbar_mixer_in6_ep: endpoint { ++ remote-endpoint = <&mixer_in6_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in7_port: port@38 { ++ reg = <0x38>; ++ ++ xbar_mixer_in7_ep: endpoint { ++ remote-endpoint = <&mixer_in7_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in8_port: port@39 { ++ reg = <0x39>; ++ ++ xbar_mixer_in8_ep: endpoint { ++ remote-endpoint = <&mixer_in8_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in9_port: port@3a { ++ reg = <0x3a>; ++ ++ xbar_mixer_in9_ep: endpoint { ++ remote-endpoint = <&mixer_in9_ep>; ++ }; ++ }; ++ ++ xbar_mixer_in10_port: port@3b { ++ reg = <0x3b>; ++ ++ xbar_mixer_in10_ep: endpoint { ++ remote-endpoint = <&mixer_in10_ep>; ++ }; ++ }; ++ ++ port@3c { ++ reg = <0x3c>; ++ ++ xbar_mixer_out1_ep: endpoint { ++ remote-endpoint = <&mixer_out1_ep>; ++ }; ++ }; ++ ++ port@3d { ++ reg = <0x3d>; ++ ++ xbar_mixer_out2_ep: endpoint { ++ remote-endpoint = <&mixer_out2_ep>; ++ }; ++ }; ++ ++ port@3e { ++ reg = <0x3e>; ++ ++ xbar_mixer_out3_ep: endpoint { ++ remote-endpoint = <&mixer_out3_ep>; ++ }; ++ }; ++ ++ port@3f { ++ reg = <0x3f>; ++ ++ xbar_mixer_out4_ep: endpoint { ++ remote-endpoint = <&mixer_out4_ep>; ++ }; ++ }; ++ ++ port@40 { ++ reg = <0x40>; ++ ++ xbar_mixer_out5_ep: endpoint { ++ remote-endpoint = <&mixer_out5_ep>; ++ }; ++ }; + }; + }; + }; +@@ -1039,6 +1890,31 @@ + /* Router */ + <&xbar_i2s3_port>, <&xbar_i2s4_port>, + <&xbar_dmic1_port>, <&xbar_dmic2_port>, ++ <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, ++ <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, ++ <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, ++ <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, ++ <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, ++ <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, ++ <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, ++ <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, ++ <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, ++ <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, ++ <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, ++ <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, ++ <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, ++ /* HW accelerators */ ++ <&sfc1_out_port>, <&sfc2_out_port>, ++ <&sfc3_out_port>, <&sfc4_out_port>, ++ <&mvc1_out_port>, <&mvc2_out_port>, ++ <&amx1_out_port>, <&amx2_out_port>, ++ <&adx1_out1_port>, <&adx1_out2_port>, ++ <&adx1_out3_port>, <&adx1_out4_port>, ++ <&adx2_out1_port>, <&adx2_out2_port>, ++ <&adx2_out3_port>, <&adx2_out4_port>, ++ <&mixer_out1_port>, <&mixer_out2_port>, ++ <&mixer_out3_port>, <&mixer_out4_port>, ++ <&mixer_out5_port>, + /* I/O DAP Ports */ + <&i2s3_port>, <&i2s4_port>, + <&dmic1_port>, <&dmic2_port>; diff --git a/target/linux/tegra/patches-5.15/112-arm64-tegra-Rename-top-level-clocks.patch b/target/linux/tegra/patches-5.15/112-arm64-tegra-Rename-top-level-clocks.patch new file mode 100644 index 0000000000..6c6a8f8914 --- /dev/null +++ b/target/linux/tegra/patches-5.15/112-arm64-tegra-Rename-top-level-clocks.patch @@ -0,0 +1,28 @@ +From 4cc3e3e164c02c6f2fce38f2098a1fe1256ea58d Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Mon, 6 Dec 2021 17:58:55 +0100 +Subject: [PATCH 2/9] arm64: tegra: Rename top-level clocks + +Clocks defined at the top level in device tree are no longer part of a +simple bus and therefore don't have a reg property. Nodes without a reg +property shouldn't have a unit-address either, so drop the unit address +from the node names. To ensure nodes aren't duplicated (in which case +they would end up merged in the final DTB), append the name of the clock +to the node name. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -1645,7 +1645,7 @@ + }; + }; + +- clk32k_in: clock@0 { ++ clk32k_in: clock-32k { + compatible = "fixed-clock"; + clock-frequency = <32768>; + #clock-cells = <0>; diff --git a/target/linux/tegra/patches-5.15/113-arm64-tegra-Rename-top-level-regulators.patch b/target/linux/tegra/patches-5.15/113-arm64-tegra-Rename-top-level-regulators.patch new file mode 100644 index 0000000000..12e48ccbf7 --- /dev/null +++ b/target/linux/tegra/patches-5.15/113-arm64-tegra-Rename-top-level-regulators.patch @@ -0,0 +1,100 @@ +From 097e01c61015e41975873a1e51e3106456aa581a Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Mon, 6 Dec 2021 18:02:18 +0100 +Subject: [PATCH 3/9] arm64: tegra: Rename top-level regulators + +Regulators defined at the top level in device tree are no longer part of +a simple bus and therefore don't have a reg property. Nodes without a +reg property shouldn't have a unit-address either, so drop the unit +address from the node names. To ensure nodes aren't duplicated (in which +case they would end up merged in the final DTB), append the name of the +regulator to the node name. + +Signed-off-by: Thierry Reding +--- + .../boot/dts/nvidia/tegra210-p3450-0000.dts | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -1762,7 +1762,7 @@ + method = "smc"; + }; + +- vdd_5v0_sys: regulator@0 { ++ vdd_5v0_sys: regulator-vdd-5v0-sys { + compatible = "regulator-fixed"; + + regulator-name = "VDD_5V0_SYS"; +@@ -1772,7 +1772,7 @@ + regulator-boot-on; + }; + +- vdd_3v3_sys: regulator@1 { ++ vdd_3v3_sys: regulator-vdd-3v3-sys { + compatible = "regulator-fixed"; + + regulator-name = "VDD_3V3_SYS"; +@@ -1789,7 +1789,7 @@ + vin-supply = <&vdd_5v0_sys>; + }; + +- vdd_3v3_sd: regulator@2 { ++ vdd_3v3_sd: regulator-vdd-3v3-sd { + compatible = "regulator-fixed"; + + regulator-name = "VDD_3V3_SD"; +@@ -1802,7 +1802,7 @@ + vin-supply = <&vdd_3v3_sys>; + }; + +- vdd_hdmi: regulator@3 { ++ vdd_hdmi: regulator-vdd-hdmi-5v0 { + compatible = "regulator-fixed"; + + regulator-name = "VDD_HDMI_5V0"; +@@ -1812,7 +1812,7 @@ + vin-supply = <&vdd_5v0_sys>; + }; + +- vdd_hub_3v3: regulator@4 { ++ vdd_hub_3v3: regulator-vdd-hub-3v3 { + compatible = "regulator-fixed"; + + regulator-name = "VDD_HUB_3V3"; +@@ -1825,7 +1825,7 @@ + vin-supply = <&vdd_5v0_sys>; + }; + +- vdd_cpu: regulator@5 { ++ vdd_cpu: regulator-vdd-cpu { + compatible = "regulator-fixed"; + + regulator-name = "VDD_CPU"; +@@ -1840,7 +1840,7 @@ + vin-supply = <&vdd_5v0_sys>; + }; + +- vdd_gpu: regulator@6 { ++ vdd_gpu: regulator-vdd-gpu { + compatible = "pwm-regulator"; + pwms = <&pwm 1 8000>; + +@@ -1855,7 +1855,7 @@ + vin-supply = <&vdd_5v0_sys>; + }; + +- avdd_io_edp_1v05: regulator@7 { ++ avdd_io_edp_1v05: regulator-avdd-io-epd-1v05 { + compatible = "regulator-fixed"; + + regulator-name = "AVDD_IO_EDP_1V05"; +@@ -1868,7 +1868,7 @@ + vin-supply = <&avdd_1v05_pll>; + }; + +- vdd_5v0_usb: regulator@8 { ++ vdd_5v0_usb: regulator-vdd-5v-usb { + compatible = "regulator-fixed"; + + regulator-name = "VDD_5V_USB"; diff --git a/target/linux/tegra/patches-5.15/114-arm64-tegra-Rename-thermal-zones-nodes.patch b/target/linux/tegra/patches-5.15/114-arm64-tegra-Rename-thermal-zones-nodes.patch new file mode 100644 index 0000000000..a9d6184c38 --- /dev/null +++ b/target/linux/tegra/patches-5.15/114-arm64-tegra-Rename-thermal-zones-nodes.patch @@ -0,0 +1,24 @@ +From fe57ff5365c9aef12e80ee51e38d0ea6bb17b255 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 14:24:20 +0100 +Subject: [PATCH 4/9] arm64: tegra: Rename thermal zones nodes + +The DT schema requires that nodes representing thermal zones include a +"-thermal" suffix in their name. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -1684,7 +1684,7 @@ + }; + + thermal-zones { +- cpu { ++ cpu-thermal { + trips { + cpu_trip_critical: critical { + temperature = <96500>; diff --git a/target/linux/tegra/patches-5.15/115-arm64-tegra-Drop-unit-address-for-audio-card-graph-e.patch b/target/linux/tegra/patches-5.15/115-arm64-tegra-Drop-unit-address-for-audio-card-graph-e.patch new file mode 100644 index 0000000000..20599b1a51 --- /dev/null +++ b/target/linux/tegra/patches-5.15/115-arm64-tegra-Drop-unit-address-for-audio-card-graph-e.patch @@ -0,0 +1,61 @@ +From e7445ab7dc5160540930912fae02660601b6de80 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 14:36:35 +0100 +Subject: [PATCH 5/9] arm64: tegra: Drop unit-address for audio card graph + endpoints + +Audio graph endpoints don't have a "reg" property, so they shouldn't +have a unit-address either. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -688,7 +688,7 @@ + i2s4_port: port@1 { + reg = <1>; + +- i2s4_dap_ep: endpoint@0 { ++ i2s4_dap_ep: endpoint { + dai-format = "i2s"; + /* Placeholder for external Codec */ + }; +@@ -706,7 +706,7 @@ + port@0 { + reg = <0>; + +- dmic1_cif_ep: endpoint@0 { ++ dmic1_cif_ep: endpoint { + remote-endpoint = <&xbar_dmic1_ep>; + }; + }; +@@ -714,7 +714,7 @@ + dmic1_port: port@1 { + reg = <1>; + +- dmic1_dap_ep: endpoint@0 { ++ dmic1_dap_ep: endpoint { + /* Placeholder for external Codec */ + }; + }; +@@ -731,7 +731,7 @@ + port@0 { + reg = <0>; + +- dmic2_cif_ep: endpoint@0 { ++ dmic2_cif_ep: endpoint { + remote-endpoint = <&xbar_dmic2_ep>; + }; + }; +@@ -739,7 +739,7 @@ + dmic2_port: port@1 { + reg = <1>; + +- dmic2_dap_ep: endpoint@0 { ++ dmic2_dap_ep: endpoint { + /* Placeholder for external Codec */ + }; + }; diff --git a/target/linux/tegra/patches-5.15/116-arm64-tegra-Use-JEDEC-vendor-prefix-for-SPI-NOR-flas.patch b/target/linux/tegra/patches-5.15/116-arm64-tegra-Use-JEDEC-vendor-prefix-for-SPI-NOR-flas.patch new file mode 100644 index 0000000000..84117c4e86 --- /dev/null +++ b/target/linux/tegra/patches-5.15/116-arm64-tegra-Use-JEDEC-vendor-prefix-for-SPI-NOR-flas.patch @@ -0,0 +1,25 @@ +From 56797e625910497ef2a2dd40b76be2633a86f726 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 14:39:20 +0100 +Subject: [PATCH 6/9] arm64: tegra: Use JEDEC vendor prefix for SPI NOR flash + chips + +The standard "jedec," vendor prefix should be used for SPI NOR flash +chips. This allows the right DT schema to be picked for validation. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -1637,7 +1637,7 @@ + status = "okay"; + + flash@0 { +- compatible = "spi-nor"; ++ compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + spi-tx-bus-width = <2>; diff --git a/target/linux/tegra/patches-5.15/117-arm64-tegra-Remove-unsupported-regulator-properties.patch b/target/linux/tegra/patches-5.15/117-arm64-tegra-Remove-unsupported-regulator-properties.patch new file mode 100644 index 0000000000..1f771450c2 --- /dev/null +++ b/target/linux/tegra/patches-5.15/117-arm64-tegra-Remove-unsupported-regulator-properties.patch @@ -0,0 +1,103 @@ +From 1dcf00ae8205ee2fdbc0c55c41c486f287d20739 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 14:53:28 +0100 +Subject: [PATCH 7/9] arm64: tegra: Remove unsupported regulator properties + +Remove the unsupported "regulator-disable-ramp-delay" properties which +ended up in various DTS files for some reason. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 11 ----------- + 1 file changed, 11 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -266,7 +266,6 @@ + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1170000>; + regulator-enable-ramp-delay = <146>; +- regulator-disable-ramp-delay = <4080>; + regulator-ramp-delay = <27500>; + regulator-ramp-delay-scale = <300>; + regulator-always-on; +@@ -282,7 +281,6 @@ + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + regulator-enable-ramp-delay = <176>; +- regulator-disable-ramp-delay = <145800>; + regulator-ramp-delay = <27500>; + regulator-ramp-delay-scale = <300>; + regulator-always-on; +@@ -298,7 +296,6 @@ + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <176>; +- regulator-disable-ramp-delay = <32000>; + regulator-ramp-delay = <27500>; + regulator-ramp-delay-scale = <350>; + regulator-always-on; +@@ -314,7 +311,6 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <242>; +- regulator-disable-ramp-delay = <118000>; + regulator-ramp-delay = <27500>; + regulator-ramp-delay-scale = <360>; + regulator-always-on; +@@ -330,7 +326,6 @@ + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <26>; +- regulator-disable-ramp-delay = <626>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + regulator-always-on; +@@ -346,7 +341,6 @@ + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <22>; +- regulator-disable-ramp-delay = <650>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + +@@ -360,7 +354,6 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <62>; +- regulator-disable-ramp-delay = <650>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + +@@ -378,7 +371,6 @@ + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1100000>; + regulator-enable-ramp-delay = <22>; +- regulator-disable-ramp-delay = <610>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + regulator-disable-active-discharge; +@@ -403,7 +395,6 @@ + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <24>; +- regulator-disable-ramp-delay = <2768>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + +@@ -417,7 +408,6 @@ + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <22>; +- regulator-disable-ramp-delay = <1160>; + regulator-ramp-delay = <100000>; + regulator-ramp-delay-scale = <200>; + +@@ -1779,7 +1769,6 @@ + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <240>; +- regulator-disable-ramp-delay = <11340>; + regulator-always-on; + regulator-boot-on; + diff --git a/target/linux/tegra/patches-5.15/118-arm64-tegra-jetson-nano-Remove-extra-PLL-power-suppl.patch b/target/linux/tegra/patches-5.15/118-arm64-tegra-jetson-nano-Remove-extra-PLL-power-suppl.patch new file mode 100644 index 0000000000..2a6dd19812 --- /dev/null +++ b/target/linux/tegra/patches-5.15/118-arm64-tegra-jetson-nano-Remove-extra-PLL-power-suppl.patch @@ -0,0 +1,41 @@ +From 9c1b3ef8e204ca952d0304d4b92fa54de8b9815a Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Fri, 22 Mar 2019 14:56:11 +0100 +Subject: [PATCH 8/9] arm64: tegra: jetson-nano: Remove extra PLL power + supplies for PCIe and XUSB + +The XUSB pad controller handles the various PLL power supplies, so +remove any references to them from the PCIe and XUSB controller device +tree nodes. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 8 -------- + 1 file changed, 8 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -30,11 +30,8 @@ + pcie@1003000 { + status = "okay"; + +- avdd-pll-uerefe-supply = <&vdd_pex_1v05>; + hvddio-pex-supply = <&vdd_1v8>; + dvddio-pex-supply = <&vdd_pex_1v05>; +- dvdd-pex-pll-supply = <&vdd_pex_1v05>; +- hvdd-pex-pll-e-supply = <&vdd_1v8>; + vddio-pex-ctl-supply = <&vdd_1v8>; + + pci@1,0 { +@@ -446,11 +443,6 @@ + avdd-usb-supply = <&vdd_3v3_sys>; + dvddio-pex-supply = <&vdd_pex_1v05>; + hvddio-pex-supply = <&vdd_1v8>; +- /* these really belong to the XUSB pad controller */ +- avdd-pll-utmip-supply = <&vdd_1v8>; +- avdd-pll-uerefe-supply = <&vdd_pex_1v05>; +- dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>; +- hvdd-usb-ss-pll-e-supply = <&vdd_1v8>; + + status = "okay"; + }; diff --git a/target/linux/tegra/patches-5.15/119-arm64-tegra-Update-PWM-fan-node-name.patch b/target/linux/tegra/patches-5.15/119-arm64-tegra-Update-PWM-fan-node-name.patch new file mode 100644 index 0000000000..03e35c0072 --- /dev/null +++ b/target/linux/tegra/patches-5.15/119-arm64-tegra-Update-PWM-fan-node-name.patch @@ -0,0 +1,28 @@ +From 6d9d19af3e34121a816757b4fae341a4d749e1a7 Mon Sep 17 00:00:00 2001 +From: Jon Hunter +Date: Wed, 6 Apr 2022 16:26:55 +0100 +Subject: [PATCH 9/9] arm64: tegra: Update PWM fan node name + +According to the device-tree binding document for PWM fans [0], the +PWM fan node name should be 'pwm-fan'. Update the PWM fan node name to +align with this. + +[0] Documentation/devicetree/bindings/hwmon/pwm-fan.txt + +Signed-off-by: Jon Hunter +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts ++++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts +@@ -1657,7 +1657,7 @@ + }; + }; + +- fan: fan { ++ fan: pwm-fan { + compatible = "pwm-fan"; + pwms = <&pwm 3 45334>; + diff --git a/target/linux/tegra/patches-5.15/211-arm64-tegra-Add-few-AHUB-devices-for-Tegra210-and-la.patch b/target/linux/tegra/patches-5.15/211-arm64-tegra-Add-few-AHUB-devices-for-Tegra210-and-la.patch new file mode 100644 index 0000000000..1c3e1b10f0 --- /dev/null +++ b/target/linux/tegra/patches-5.15/211-arm64-tegra-Add-few-AHUB-devices-for-Tegra210-and-la.patch @@ -0,0 +1,107 @@ +From 848f3290ab75d13f5364b0ba635dc9452a1613c6 Mon Sep 17 00:00:00 2001 +From: Sameer Pujar +Date: Mon, 13 Sep 2021 22:12:20 +0530 +Subject: [PATCH 1/7] arm64: tegra: Add few AHUB devices for Tegra210 and later + +Add DT nodes for following AHUB devices: + * SFC (Sampling Frequency Converter) + * MVC (Master Volume Control) + * AMX (Audio Multiplexer) + * ADX (Audio Demultiplexer) + * Mixer + +Above devices are added for Tegra210, Tegra186 and Tegra194 generations +of Tegra SoC. + +Signed-off-by: Sameer Pujar +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 77 ++++++++++++++++++++++++ + 1 file changed, 77 insertions(+) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -1642,6 +1642,83 @@ + status = "disabled"; + }; + ++ tegra_sfc1: sfc@702d2000 { ++ compatible = "nvidia,tegra210-sfc"; ++ reg = <0x702d2000 0x200>; ++ sound-name-prefix = "SFC1"; ++ status = "disabled"; ++ }; ++ ++ tegra_sfc2: sfc@702d2200 { ++ compatible = "nvidia,tegra210-sfc"; ++ reg = <0x702d2200 0x200>; ++ sound-name-prefix = "SFC2"; ++ status = "disabled"; ++ }; ++ ++ tegra_sfc3: sfc@702d2400 { ++ compatible = "nvidia,tegra210-sfc"; ++ reg = <0x702d2400 0x200>; ++ sound-name-prefix = "SFC3"; ++ status = "disabled"; ++ }; ++ ++ tegra_sfc4: sfc@702d2600 { ++ compatible = "nvidia,tegra210-sfc"; ++ reg = <0x702d2600 0x200>; ++ sound-name-prefix = "SFC4"; ++ status = "disabled"; ++ }; ++ ++ tegra_mvc1: mvc@702da000 { ++ compatible = "nvidia,tegra210-mvc"; ++ reg = <0x702da000 0x200>; ++ sound-name-prefix = "MVC1"; ++ status = "disabled"; ++ }; ++ ++ tegra_mvc2: mvc@702da200 { ++ compatible = "nvidia,tegra210-mvc"; ++ reg = <0x702da200 0x200>; ++ sound-name-prefix = "MVC2"; ++ status = "disabled"; ++ }; ++ ++ tegra_amx1: amx@702d3000 { ++ compatible = "nvidia,tegra210-amx"; ++ reg = <0x702d3000 0x100>; ++ sound-name-prefix = "AMX1"; ++ status = "disabled"; ++ }; ++ ++ tegra_amx2: amx@702d3100 { ++ compatible = "nvidia,tegra210-amx"; ++ reg = <0x702d3100 0x100>; ++ sound-name-prefix = "AMX2"; ++ status = "disabled"; ++ }; ++ ++ tegra_adx1: adx@702d3800 { ++ compatible = "nvidia,tegra210-adx"; ++ reg = <0x702d3800 0x100>; ++ sound-name-prefix = "ADX1"; ++ status = "disabled"; ++ }; ++ ++ tegra_adx2: adx@702d3900 { ++ compatible = "nvidia,tegra210-adx"; ++ reg = <0x702d3900 0x100>; ++ sound-name-prefix = "ADX2"; ++ status = "disabled"; ++ }; ++ ++ tegra_amixer: amixer@702dbb00 { ++ compatible = "nvidia,tegra210-amixer"; ++ reg = <0x702dbb00 0x800>; ++ sound-name-prefix = "MIXER1"; ++ status = "disabled"; ++ }; ++ + ports { + #address-cells = <1>; + #size-cells = <0>; diff --git a/target/linux/tegra/patches-5.15/212-arm64-tegra-Remove-useless-usb-ehci-compatible-strin.patch b/target/linux/tegra/patches-5.15/212-arm64-tegra-Remove-useless-usb-ehci-compatible-strin.patch new file mode 100644 index 0000000000..9c8052be2d --- /dev/null +++ b/target/linux/tegra/patches-5.15/212-arm64-tegra-Remove-useless-usb-ehci-compatible-strin.patch @@ -0,0 +1,35 @@ +From 056474013cb0754272773425cd1142778303c824 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Mon, 21 Jun 2021 16:13:27 +0200 +Subject: [PATCH 2/7] arm64: tegra: Remove useless usb-ehci compatible string + +There's no such thing as a generic USB EHCI controller. The EHCI +controllers found on Tegra SoCs are instantiations that need Tegra- +specific glue to work properly, so drop the generic compatible string +and keep only the Tegra-specific ones. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -1821,7 +1821,7 @@ + }; + + usb@7d000000 { +- compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; ++ compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci"; + reg = <0x0 0x7d000000 0x0 0x4000>; + interrupts = ; + phy_type = "utmi"; +@@ -1859,7 +1859,7 @@ + }; + + usb@7d004000 { +- compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci", "usb-ehci"; ++ compatible = "nvidia,tegra210-ehci", "nvidia,tegra30-ehci"; + reg = <0x0 0x7d004000 0x0 0x4000>; + interrupts = ; + phy_type = "utmi"; diff --git a/target/linux/tegra/patches-5.15/213-arm64-tegra-Rename-thermal-zones-nodes.patch b/target/linux/tegra/patches-5.15/213-arm64-tegra-Rename-thermal-zones-nodes.patch new file mode 100644 index 0000000000..bf953703f4 --- /dev/null +++ b/target/linux/tegra/patches-5.15/213-arm64-tegra-Rename-thermal-zones-nodes.patch @@ -0,0 +1,51 @@ +From fe57ff5365c9aef12e80ee51e38d0ea6bb17b255 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 14:24:20 +0100 +Subject: [PATCH 3/7] arm64: tegra: Rename thermal zones nodes + +The DT schema requires that nodes representing thermal zones include a +"-thermal" suffix in their name. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -1982,7 +1982,7 @@ + }; + + thermal-zones { +- cpu { ++ cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <0>; + +@@ -2011,7 +2011,7 @@ + }; + }; + +- mem { ++ mem-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + +@@ -2057,7 +2057,7 @@ + }; + }; + +- gpu { ++ gpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <0>; + +@@ -2086,7 +2086,7 @@ + }; + }; + +- pllx { ++ pllx-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + diff --git a/target/linux/tegra/patches-5.15/214-arm64-tegra-Add-missing-TSEC-properties-on-Tegra210.patch b/target/linux/tegra/patches-5.15/214-arm64-tegra-Add-missing-TSEC-properties-on-Tegra210.patch new file mode 100644 index 0000000000..8aada2a50f --- /dev/null +++ b/target/linux/tegra/patches-5.15/214-arm64-tegra-Add-missing-TSEC-properties-on-Tegra210.patch @@ -0,0 +1,40 @@ +From 28a44b900e572ecb163cc4e042365b7df6e0fad3 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 15:01:37 +0100 +Subject: [PATCH 4/7] arm64: tegra: Add missing TSEC properties on Tegra210 + +Add missing interrupts, clocks, clock-names, reset and reset-names +properties for the TSEC blocks found on Tegra210. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -181,6 +181,12 @@ + tsec@54100000 { + compatible = "nvidia,tegra210-tsec"; + reg = <0x0 0x54100000 0x0 0x00040000>; ++ interrupts = ; ++ clocks = <&tegra_car TEGRA210_CLK_TSEC>; ++ clock-names = "tsec"; ++ resets = <&tegra_car 83>; ++ reset-names = "tsec"; ++ status = "disabled"; + }; + + dc@54200000 { +@@ -283,6 +289,11 @@ + tsec@54500000 { + compatible = "nvidia,tegra210-tsec"; + reg = <0x0 0x54500000 0x0 0x00040000>; ++ interrupts = ; ++ clocks = <&tegra_car TEGRA210_CLK_TSECB>; ++ clock-names = "tsec"; ++ resets = <&tegra_car 206>; ++ reset-names = "tsec"; + status = "disabled"; + }; + diff --git a/target/linux/tegra/patches-5.15/215-arm64-tegra-Sort-Tegra210-XUSB-clocks-correctly.patch b/target/linux/tegra/patches-5.15/215-arm64-tegra-Sort-Tegra210-XUSB-clocks-correctly.patch new file mode 100644 index 0000000000..060dea2772 --- /dev/null +++ b/target/linux/tegra/patches-5.15/215-arm64-tegra-Sort-Tegra210-XUSB-clocks-correctly.patch @@ -0,0 +1,37 @@ +From f2ef6a9180f38f7b6f633a90126d27e8a669a688 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Tue, 7 Dec 2021 15:05:32 +0100 +Subject: [PATCH 5/7] arm64: tegra: Sort Tegra210 XUSB clocks correctly + +Make the order of the clocks and clock-names properties match the order +in the device tree bindings. This isn't strictly necessary from a point +of view of the operating system because matching will be done based on +the clock-names, but it makes it easier to validate the device trees +against the DT schema. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -1026,8 +1026,8 @@ + <&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, +- <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>, ++ <&tegra_car TEGRA210_CLK_XUSB_SS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, + <&tegra_car TEGRA210_CLK_PLL_U_480M>, +@@ -1035,7 +1035,7 @@ + <&tegra_car TEGRA210_CLK_PLL_E>; + clock-names = "xusb_host", "xusb_host_src", + "xusb_falcon_src", "xusb_ss", +- "xusb_ss_src", "xusb_ss_div2", ++ "xusb_ss_div2", "xusb_ss_src", + "xusb_hs_src", "xusb_fs_src", + "pll_u_480m", "clk_m", "pll_e"; + resets = <&tegra_car 89>, <&tegra_car 156>, diff --git a/target/linux/tegra/patches-5.15/216-arm64-tegra-Add-host1x-hotflush-reset-on-Tegra210.patch b/target/linux/tegra/patches-5.15/216-arm64-tegra-Add-host1x-hotflush-reset-on-Tegra210.patch new file mode 100644 index 0000000000..2d5336df7e --- /dev/null +++ b/target/linux/tegra/patches-5.15/216-arm64-tegra-Add-host1x-hotflush-reset-on-Tegra210.patch @@ -0,0 +1,25 @@ +From 914ed1f56581f99094035f1cc989ab4498104e94 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Fri, 17 Dec 2021 14:53:08 +0100 +Subject: [PATCH 6/7] arm64: tegra: Add host1x hotflush reset on Tegra210 + +Add the host1x memory client hotflush reset on Tegra210. + +Signed-off-by: Thierry Reding +--- + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi ++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi +@@ -93,8 +93,8 @@ + interrupt-names = "syncpt", "host1x"; + clocks = <&tegra_car TEGRA210_CLK_HOST1X>; + clock-names = "host1x"; +- resets = <&tegra_car 28>; +- reset-names = "host1x"; ++ resets = <&tegra_car 28>, <&mc TEGRA210_MC_RESET_HC>; ++ reset-names = "host1x", "mc"; + + #address-cells = <2>; + #size-cells = <2>; diff --git a/target/linux/tegra/patches-5.15/99-scripts-fix-compilation-error.patch b/target/linux/tegra/patches-5.15/99-scripts-fix-compilation-error.patch new file mode 100644 index 0000000000..711c7dfbcc --- /dev/null +++ b/target/linux/tegra/patches-5.15/99-scripts-fix-compilation-error.patch @@ -0,0 +1,21 @@ +From 6d18eaaaff92f928eab6fad2708b6d28785b4872 Mon Sep 17 00:00:00 2001 +From: Claudiu Beznea +Date: Wed, 13 Oct 2021 08:32:07 +0300 +Subject: [PATCH] scripts: fix compilation error + +Signed-off-by: Claudiu Beznea +--- + scripts/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/scripts/Makefile ++++ b/scripts/Makefile +@@ -21,7 +21,7 @@ HOSTCFLAGS_asn1_compiler.o = -I$(srctree + HOSTCFLAGS_sign-file.o = $(CRYPTO_CFLAGS) + HOSTLDLIBS_sign-file = $(CRYPTO_LIBS) + HOSTCFLAGS_extract-cert.o = $(CRYPTO_CFLAGS) +-HOSTLDLIBS_extract-cert = $(CRYPTO_LIBS) ++HOSTLDLIBS_extract-cert = $(CRYPTO_LIBS) -lpthread + + ifdef CONFIG_UNWINDER_ORC + ifeq ($(ARCH),x86_64) -- 2.30.2