From bd83b39621f735b61c7a39cb919713f97ed2c22c Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Fri, 12 Oct 2018 17:08:28 +0100 Subject: [PATCH] plat/arm: Use `mov_imm` macro to load immediate values This patch makes use of mov_imm macro where possible to load immediate values within ARM platform layer. Change-Id: I02bc7fbc1fa334c9fccf76fbddf515952f9a1298 Signed-off-by: Soby Mathew --- plat/arm/board/fvp/aarch64/fvp_helpers.S | 12 ++++++------ plat/arm/css/common/aarch64/css_helpers.S | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/plat/arm/board/fvp/aarch64/fvp_helpers.S b/plat/arm/board/fvp/aarch64/fvp_helpers.S index 88fcdb1b..abc3ceb0 100644 --- a/plat/arm/board/fvp/aarch64/fvp_helpers.S +++ b/plat/arm/board/fvp/aarch64/fvp_helpers.S @@ -19,7 +19,7 @@ .globl plat_arm_calc_core_pos .macro fvp_choose_gicmmap param1, param2, x_tmp, w_tmp, res - ldr \x_tmp, =V2M_SYSREGS_BASE + V2M_SYS_ID + mov_imm \x_tmp, V2M_SYSREGS_BASE + V2M_SYS_ID ldr \w_tmp, [\x_tmp] ubfx \w_tmp, \w_tmp, #V2M_SYS_ID_BLD_SHIFT, #V2M_SYS_ID_BLD_LENGTH cmp \w_tmp, #BLD_GIC_VE_MMAP @@ -48,7 +48,7 @@ func plat_secondary_cold_boot_setup * --------------------------------------------- */ mrs x0, mpidr_el1 - ldr x1, =PWRC_BASE + mov_imm x1, PWRC_BASE str w0, [x1, #PPOFFR_OFF] /* --------------------------------------------- @@ -72,8 +72,8 @@ func plat_secondary_cold_boot_setup b secondary_cold_boot_wait gicv2_bypass_disable: - ldr x0, =VE_GICC_BASE - ldr x1, =BASE_GICC_BASE + mov_imm x0, VE_GICC_BASE + mov_imm x1, BASE_GICC_BASE fvp_choose_gicmmap x0, x1, x2, w2, x1 mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1) orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0) @@ -128,7 +128,7 @@ func plat_get_my_entrypoint * --------------------------------------------------------------------- */ mrs x2, mpidr_el1 - ldr x1, =PWRC_BASE + mov_imm x1, PWRC_BASE str w2, [x1, #PSYSR_OFF] ldr w2, [x1, #PSYSR_OFF] ubfx w2, w2, #PSYSR_WK_SHIFT, #PSYSR_WK_WIDTH @@ -171,7 +171,7 @@ endfunc plat_get_my_entrypoint */ func plat_is_my_cpu_primary mrs x0, mpidr_el1 - ldr x1, =MPIDR_AFFINITY_MASK + mov_imm x1, MPIDR_AFFINITY_MASK and x0, x0, x1 cmp x0, #FVP_PRIMARY_CPU cset w0, eq diff --git a/plat/arm/css/common/aarch64/css_helpers.S b/plat/arm/css/common/aarch64/css_helpers.S index 59d92065..5096d8d9 100644 --- a/plat/arm/css/common/aarch64/css_helpers.S +++ b/plat/arm/css/common/aarch64/css_helpers.S @@ -108,7 +108,7 @@ endfunc plat_is_my_cpu_primary func plat_is_my_cpu_primary mov x9, x30 bl plat_my_core_pos - ldr x1, =SCP_BOOT_CFG_ADDR + mov_imm x1, SCP_BOOT_CFG_ADDR ldr x1, [x1] ubfx x1, x1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \ #PLAT_CSS_PRIMARY_CPU_BIT_WIDTH -- 2.30.2