From ba4de984b9272ee19790db80b6ed8ed7357094ce Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Mon, 7 Jan 2013 14:30:37 +0000 Subject: [PATCH] ar71xx: disable PHY_SWAP and PHY_ADDR_SWAP bits on TL-WR703N/MR3020/MR3040/MR11U boards The PHY_SWAP and PHY_ADDR_SWAP bits are initialized differently by different versions of the bootloader. This leads to broken ethernet connection with OpenWrt on some boards. Turn both SWAP bits OFF on these boards to make it consistent regardless of the bootloader used. Based on a patch by Michel Stempin . Signed-off-by: Gabor Juhos SVN-Revision: 35037 --- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c | 4 ++-- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c | 4 ++-- target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c | 3 +++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c index e13d02e68bb2..b6bdf9bb61b7 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c @@ -85,7 +85,8 @@ static void __init common_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_setup_ar933x_phy4_switch(false, true); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr11u_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), @@ -97,7 +98,6 @@ static void __init common_setup(void) ath79_register_mdio(0, 0x0); ath79_register_eth(0); - ath79_eth0_data.phy_mask = BIT(0); ath79_register_wmac(ee, mac); } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c index e0edbf8d7e7c..0a9dfbc8a0f7 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c @@ -100,7 +100,8 @@ static void __init tl_mr3020_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_setup_ar933x_phy4_switch(false, true); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); ath79_register_m25p80(&tl_mr3020_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), @@ -118,7 +119,6 @@ static void __init tl_mr3020_setup(void) ath79_register_mdio(0, 0x0); ath79_register_eth(0); - ath79_eth0_data.phy_mask = BIT(0); ath79_register_wmac(ee, mac); } diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c index dcd6fec1c228..90342e0b65bf 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c @@ -62,6 +62,9 @@ static void __init tl_wr703n_setup(void) u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ + ath79_setup_ar933x_phy4_switch(false, false); + ath79_register_m25p80(&tl_wr703n_flash_data); ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), tl_wr703n_leds_gpio); -- 2.30.2