From b98fff1d6acc57cc54f01740028535ac095237cd Mon Sep 17 00:00:00 2001 From: wdenk Date: Mon, 9 Feb 2004 20:51:26 +0000 Subject: [PATCH] * Patch by Rahul Shanbhag, 28 Jan 2004: Fix flash protection/locking handling for OMAP1610 innovator board. * Patch by Rolf Peukert, 28 Jan 2004: fix flash write problems on CSB226 board (write with 32 bit bus width) * Patches by Mark Jonas, 16 Jan 2004: - fix rounding error when calculating baudrates for MPC5200 PSCs - make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same time which is not supported --- CHANGELOG | 11 +++ board/csb226/flash.c | 156 ++++++++++++++++++-------------------- board/omap1610inn/flash.c | 16 +++- cpu/mpc5xxx/serial.c | 8 +- cpu/mpc5xxx/start.S | 3 + 5 files changed, 107 insertions(+), 87 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 2359b48208..588c112a5f 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,17 @@ Changes since U-Boot 1.0.1: ====================================================================== +* Patch by Rahul Shanbhag, 28 Jan 2004: + Fix flash protection/locking handling for OMAP1610 innovator board. + +* Patch by Rolf Peukert, 28 Jan 2004: + fix flash write problems on CSB226 board (write with 32 bit bus width) + +* Patches by Mark Jonas, 16 Jan 2004: + - fix rounding error when calculating baudrates for MPC5200 PSCs + - make sure CFG_RAMBOOT and CFG_LOWBOOT are not enabled at the same + time which is not supported + * Patch by Yuli Barcohen, 26 Jan 2004: Allow bzip2 compression for small memory footprint boards diff --git a/board/csb226/flash.c b/board/csb226/flash.c index 6b0e51ac43..f6dfd96177 100644 --- a/board/csb226/flash.c +++ b/board/csb226/flash.c @@ -9,6 +9,9 @@ * (C) Copyright 2002 * Robert Schwebel, Pengutronix, * + * (C) Copyright 2003 (2 x 16 bit Flash bank patches) + * Rolf Peukert, IMMS gGmbH, + * * See file CREDITS for list of people who contributed to this * project. * @@ -19,7 +22,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -32,9 +35,9 @@ #include #define FLASH_BANK_SIZE 0x02000000 -#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */ +#define MAIN_SECT_SIZE 0x40000 /* 2x16 = 256k per sector */ -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /** @@ -51,19 +54,19 @@ ulong flash_init(void) for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { ulong flashbase = 0; flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F128J3 & FLASH_TYPEMASK); + (INTEL_MANUFACT & FLASH_VENDMASK) | + (INTEL_ID_28F128J3 & FLASH_TYPEMASK); flash_info[i].size = FLASH_BANK_SIZE; flash_info[i].sector_count = CFG_MAX_FLASH_SECT; memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); switch (i) { - case 0: - flashbase = PHYS_FLASH_1; - break; - default: - panic("configured too many flash banks!\n"); - break; + case 0: + flashbase = PHYS_FLASH_1; + break; + default: + panic("configured too many flash banks!\n"); + break; } for (j = 0; j < flash_info[i].sector_count; j++) { flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; @@ -88,8 +91,6 @@ ulong flash_init(void) /** * flash_print_info: - print information about the flash situation - * - * @param info: */ void flash_print_info (flash_info_t *info) @@ -99,23 +100,21 @@ void flash_print_info (flash_info_t *info) for (j=0; jflash_id & FLASH_VENDMASK) { - - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf("Intel: "); - break; - default: - printf("Unknown Vendor "); - break; + case (INTEL_MANUFACT & FLASH_VENDMASK): + printf ("Intel: "); + break; + default: + printf ("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { - - case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): - printf("28F128J3 (128Mbit)\n"); - break; - default: - printf("Unknown Chip Type\n"); - return; + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf("28F128J3 (128Mbit)\n"); + break; + default: + printf("Unknown Chip Type\n"); + return; } printf(" Size: %ld MB in %d Sectors\n", @@ -123,10 +122,10 @@ void flash_print_info (flash_info_t *info) printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) printf ("\n "); + if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); + info->protect[i] ? " (RO)" : " "); } printf ("\n"); info++; @@ -136,7 +135,6 @@ void flash_print_info (flash_info_t *info) /** * flash_erase: - erase flash sectors - * */ int flash_erase(flash_info_t *info, int s_first, int s_last) @@ -179,13 +177,13 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) /* arm simple, non interrupt dependent timer */ reset_timer_masked(); - if (info->protect[sect] == 0) { /* not protected */ + if (info->protect[sect] == 0) { /* not protected */ u32 * volatile addr = (u32 * volatile)(info->start[sect]); - /* erase sector: */ + /* erase sector: */ /* The strata flashs are aligned side by side on */ /* the data bus, so we have to write the commands */ - /* to both chips here: */ + /* to both chips here: */ *addr = 0x00200020; /* erase setup */ *addr = 0x00D000D0; /* erase confirm */ @@ -198,19 +196,14 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) goto outahere; } } - *addr = 0x00500050; /* clear status register cmd. */ - *addr = 0x00FF00FF; /* resest to read mode */ - + *addr = 0x00FF00FF; /* reset to read mode */ } - printf("ok.\n"); } - if (ctrlc()) printf("User Interrupt!\n"); - outahere: - +outahere: /* allow flash to settle - wait 10 ms */ udelay_masked(10000); @@ -219,22 +212,19 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) return rc; } - /** - * write_word: - copy memory to flash - * - * @param info: - * @param dest: - * @param data: - * @return: + * write_long: - copy memory to flash, assume a bank of 2 devices with 16bit each */ -static int write_word (flash_info_t *info, ulong dest, ushort data) +static int write_long (flash_info_t *info, ulong dest, ulong data) { u32 * volatile addr = (u32 * volatile)dest, val; int rc = ERR_OK; int flag; + /* read array command - just for the case... */ + *addr = 0x00FF00FF; + /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) return ERR_NOT_ERASED; @@ -248,10 +238,10 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) flag = disable_interrupts(); /* clear status register command */ - *addr = 0x50; + *addr = 0x00500050; /* program set-up command */ - *addr = 0x40; + *addr = 0x00400040; /* latch address/data */ *addr = data; @@ -260,28 +250,30 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) reset_timer_masked(); /* wait while polling the status register */ - while(((val = *addr) & 0x80) != 0x80) { + while(((val = *addr) & 0x00800080) != 0x00800080) { if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) { rc = ERR_TIMOUT; - *addr = 0xB0; /* suspend program command */ + /* suspend program command */ + *addr = 0x00B000B0; goto outahere; } } - if(val & 0x1A) { /* check for error */ + /* check for errors */ + if(val & 0x001A001A) { printf("\nFlash write error %02x at address %08lx\n", (int)val, (unsigned long)dest); - if(val & (1<<3)) { + if(val & 0x00080008) { printf("Voltage range error.\n"); rc = ERR_PROG_ERROR; goto outahere; } - if(val & (1<<1)) { + if(val & 0x00020002) { printf("Device protect error.\n"); rc = ERR_PROTECTED; goto outahere; } - if(val & (1<<4)) { + if(val & 0x00100010) { printf("Programming error.\n"); rc = ERR_PROG_ERROR; goto outahere; @@ -290,9 +282,9 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) goto outahere; } - outahere: - - *addr = 0xFF; /* read array command */ +outahere: + /* read array command */ + *addr = 0x00FF00FF; if (flag) enable_interrupts(); return rc; @@ -304,20 +296,21 @@ static int write_word (flash_info_t *info, ulong dest, ushort data) * * @param info: * @param src: source of copy transaction - * @param addr: where to copy to - * @param cnt: number of bytes to copy + * @param addr: where to copy to + * @param cnt: number of bytes to copy * * @return error code */ +/* "long" version, uses 32bit words */ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { ulong cp, wp; - ushort data; + ulong data; int l; int i, rc; - wp = (addr & ~1); /* get lower word aligned address */ + wp = (addr & ~3); /* get lower word aligned address */ /* * handle unaligned start bytes @@ -325,35 +318,34 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) if ((l = addr - wp) != 0) { data = 0; for (i=0, cp=wp; i> 8) | (*(uchar *)cp << 8); + data = (data >> 8) | (*(uchar *)cp << 24); } - for (; i<2 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 8); + for (; i<4 && cnt>0; ++i) { + data = (data >> 8) | (*src++ << 24); --cnt; ++cp; } - for (; cnt==0 && i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 24); } - if ((rc = write_word(info, wp, data)) != 0) { + if ((rc = write_long(info, wp, data)) != 0) { return (rc); } - wp += 2; + wp += 4; } /* * handle word aligned part */ - while (cnt >= 2) { - /* data = *((vushort*)src); */ - data = *((ushort*)src); - if ((rc = write_word(info, wp, data)) != 0) { + while (cnt >= 4) { + data = *((ulong*)src); + if ((rc = write_long(info, wp, data)) != 0) { return (rc); } - src += 2; - wp += 2; - cnt -= 2; + src += 4; + wp += 4; + cnt -= 4; } if (cnt == 0) return ERR_OK; @@ -362,13 +354,13 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<2 && cnt>0; ++i, ++cp) { - data = (data >> 8) | (*src++ << 8); + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data >> 8) | (*src++ << 24); --cnt; } - for (; i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); + for (; i<4; ++i, ++cp) { + data = (data >> 8) | (*(uchar *)cp << 24); } - return write_word(info, wp, data); + return write_long(info, wp, data); } diff --git a/board/omap1610inn/flash.c b/board/omap1610inn/flash.c index e7d65157f7..ae7fb3b69a 100644 --- a/board/omap1610inn/flash.c +++ b/board/omap1610inn/flash.c @@ -93,6 +93,8 @@ unsigned long flash_init (void) case 0: flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); + /* to reset the lock bit */ + flash_unlock(&flash_info[i]); break; default: panic ("configured too many flash banks!\n"); @@ -114,6 +116,19 @@ unsigned long flash_init (void) return size; } +/*----------------------------------------------------------------------- + */ +flash_unlock(flash_info_t * info) +{ + int j; + for (j=2;jstart[j]); + flash_unprotect_sectors (addr); + *addr = (FPW) 0x00500050;/* clear status register */ + *addr = (FPW) 0x00FF00FF;/* resest to read mode */ + } +} + /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t * info) @@ -447,7 +462,6 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); return (2); } - flash_unprotect_sectors (addr); /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts (); *addr = (FPW) 0x00400040; /* write setup */ diff --git a/cpu/mpc5xxx/serial.c b/cpu/mpc5xxx/serial.c index 54ecf5be17..f463d2cf07 100644 --- a/cpu/mpc5xxx/serial.c +++ b/cpu/mpc5xxx/serial.c @@ -67,10 +67,10 @@ int serial_init (void) /* select clock sources */ #if defined(CONFIG_MGT5100) psc->psc_clock_select = 0xdd00; - baseclk = CFG_MPC5XXX_CLKIN / 32; + baseclk = (CFG_MPC5XXX_CLKIN + 16) / 32; #elif defined(CONFIG_MPC5200) psc->psc_clock_select = 0; - baseclk = gd->ipb_clk / 32; + baseclk = (gd->ipb_clk + 16) / 32; #endif /* switch to UART mode */ @@ -85,8 +85,8 @@ int serial_init (void) psc->mode = PSC_MODE_ONE_STOP; /* set up UART divisor */ - div = baseclk / gd->baudrate; - psc->ctur = div >> 8; + div = (baseclk + (gd->baudrate/2)) / gd->baudrate; + psc->ctur = (div >> 8) & 0xff; psc->ctlr = div & 0xff; /* disable all interrupts */ diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S index a001e1ce40..26811e11ad 100644 --- a/cpu/mpc5xxx/start.S +++ b/cpu/mpc5xxx/start.S @@ -104,6 +104,9 @@ boot_warm: mfmsr r5 /* save msr contents */ #if defined(CFG_LOWBOOT) +#if defined(CFG_RAMBOOT) +#error CFG_LOWBOOT is incompatible with CFG_RAMBOOT +#endif /* CFG_RAMBOOT */ lis r4, CFG_DEFAULT_MBAR@h lis r3, 0x0000FF00@h ori r3, r3, 0x0000FF00@l -- 2.30.2