From ae0b9ff1cef0fd4b724817ea84bd6cea1fdbc34b Mon Sep 17 00:00:00 2001 From: John Crispin Date: Fri, 21 Dec 2012 20:04:04 +0000 Subject: [PATCH] Setting the MDC clock to 2.5MHz and changing the mii mode to rgmii seems to fix the communication issues with the ar8316 switch. (ticket #11143) Tested only on the wbmr-hp-g300h, could affect/break other devices. Signed-off-by: Sebastian Mayr SVN-Revision: 34837 --- .../0126-lantiq_etop-Change-MDIO-clock.patch | 47 +++++++++++++++++ ...lantiq_etop-Fix-supported-modes-flag.patch | 51 +++++++++++++++++++ 2 files changed, 98 insertions(+) create mode 100644 target/linux/lantiq/patches-3.7/0126-lantiq_etop-Change-MDIO-clock.patch create mode 100644 target/linux/lantiq/patches-3.7/0127-lantiq_etop-Fix-supported-modes-flag.patch diff --git a/target/linux/lantiq/patches-3.7/0126-lantiq_etop-Change-MDIO-clock.patch b/target/linux/lantiq/patches-3.7/0126-lantiq_etop-Change-MDIO-clock.patch new file mode 100644 index 0000000000..79fdd2bc5f --- /dev/null +++ b/target/linux/lantiq/patches-3.7/0126-lantiq_etop-Change-MDIO-clock.patch @@ -0,0 +1,47 @@ +From 2f9f0ec1ff013934a86a7303c9194f6dc05620c3 Mon Sep 17 00:00:00 2001 +From: Sebastian Mayr +Date: Thu, 20 Dec 2012 18:34:45 +0100 +Subject: [PATCH 1/2] lantiq_etop: Change MDIO clock + +This patch sets the MDC clock to 2.5MHz which fixes the MDIO communication +with the ar8316 switch. +--- + drivers/net/ethernet/lantiq_etop.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c +index e695f71..fc963f6 100644 +--- a/drivers/net/ethernet/lantiq_etop.c ++++ b/drivers/net/ethernet/lantiq_etop.c +@@ -83,6 +83,7 @@ + #define LTQ_GBIT_PMAC_HD_CTL 0x8c + #define LTQ_GBIT_P0_CTL 0x4 + #define LTQ_GBIT_PMAC_RX_IPG 0xa8 ++#define LTQ_GBIT_RGMII_CTL 0x78 + + #define PMAC_HD_CTL_AS (1 << 19) + #define PMAC_HD_CTL_RXSH (1 << 22) +@@ -92,6 +93,10 @@ + /* Disable MDIO auto polling (0=disable, 1=enable) */ + #define PX_CTL_DMDIO 0x00400000 + ++/* MDC clock divider, clock = 25MHz/((MDC_CLOCK + 1) * 2) */ ++#define MDC_CLOCK_MASK 0xff000000 ++#define MDC_CLOCK_OFFSET 24 ++ + /* register information for the gbit's MDIO bus */ + #define MDIO_XR9_REQUEST 0x00008000 + #define MDIO_XR9_READ 0x00000800 +@@ -329,6 +334,9 @@ ltq_etop_gbit_init(struct net_device *dev) + /* Due to traffic halt when burst length 8, + replace default IPG value with 0x3B */ + ltq_gbit_w32(0x3B, LTQ_GBIT_PMAC_RX_IPG); ++ /* set mdc clock to 2.5 MHz */ ++ ltq_gbit_w32_mask(MDC_CLOCK_MASK, 4 << MDC_CLOCK_OFFSET, ++ LTQ_GBIT_RGMII_CTL); + } + + static int +-- +1.7.11.7 + diff --git a/target/linux/lantiq/patches-3.7/0127-lantiq_etop-Fix-supported-modes-flag.patch b/target/linux/lantiq/patches-3.7/0127-lantiq_etop-Fix-supported-modes-flag.patch new file mode 100644 index 0000000000..73394fc60d --- /dev/null +++ b/target/linux/lantiq/patches-3.7/0127-lantiq_etop-Fix-supported-modes-flag.patch @@ -0,0 +1,51 @@ +From 4de6a250878c9ce5605838b65acbddf338a7254a Mon Sep 17 00:00:00 2001 +From: Sebastian Mayr +Date: Thu, 20 Dec 2012 18:52:10 +0100 +Subject: [PATCH 2/2] lantiq_etop: Fix supported modes flag + +--- + drivers/net/ethernet/lantiq_etop.c | 19 ++++++++++--------- + 1 file changed, 10 insertions(+), 9 deletions(-) + +diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c +index fc963f6..b50b91e 100644 +--- a/drivers/net/ethernet/lantiq_etop.c ++++ b/drivers/net/ethernet/lantiq_etop.c +@@ -551,6 +551,13 @@ ltq_etop_mdio_probe(struct net_device *dev) + { + struct ltq_etop_priv *priv = netdev_priv(dev); + struct phy_device *phydev = NULL; ++ u32 phy_supported = (SUPPORTED_10baseT_Half ++ | SUPPORTED_10baseT_Full ++ | SUPPORTED_100baseT_Half ++ | SUPPORTED_100baseT_Full ++ | SUPPORTED_Autoneg ++ | SUPPORTED_MII ++ | SUPPORTED_TP); + + if (of_machine_is_compatible("lantiq,ase")) + phydev = priv->mii_bus->phy_map[8]; +@@ -570,17 +577,11 @@ ltq_etop_mdio_probe(struct net_device *dev) + return PTR_ERR(phydev); + } + +- phydev->supported &= (SUPPORTED_10baseT_Half +- | SUPPORTED_10baseT_Full +- | SUPPORTED_100baseT_Half +- | SUPPORTED_100baseT_Full +- | SUPPORTED_Autoneg +- | SUPPORTED_MII +- | SUPPORTED_TP); + if (of_machine_is_compatible("lantiq,ar9")) +- phydev->supported &= SUPPORTED_1000baseT_Half +- | SUPPORTED_1000baseT_Full; ++ phy_supported |= SUPPORTED_1000baseT_Half ++ | SUPPORTED_1000baseT_Full; + ++ phydev->supported &= phy_supported; + phydev->advertising = phydev->supported; + priv->phydev = phydev; + pr_info("%s: attached PHY [%s] (phy_addr=%s, irq=%d)\n", +-- +1.7.11.7 + -- 2.30.2