From addc80f0bba9f015208132b804397d9d08399465 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 29 Jan 2019 16:19:12 +0200 Subject: [PATCH] drm/i915/tv: Fix adjusted_mode dotclock for interlaced modes MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit intel_tv_mode_to_mode() assumes the pipe will be in progressive fetch mode, and thus when programming the pipe into interlaced mode we have to halve the calculated dotclock to get the correct field duration. This becomes more important when we start to program the pipe into interlaced mode on i965gm as we depend on the timestamps to get accurate frame counter values. Withot halving the clock our guesstimated frame counter would tick at twice the expected speed. Cc: Imre Deak Fixes: 690157f0a9e7 ("drm/i915/tv: Fix >1024 modes on gen3") Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20190129141913.5515-1-ville.syrjala@linux.intel.com Acked-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_tv.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 751b88dde18e..3a5682f44e55 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1150,6 +1150,8 @@ intel_tv_get_config(struct intel_encoder *encoder, ypos, mode.vdisplay - ysize - ypos); adjusted_mode->crtc_clock = mode.clock; + if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) + adjusted_mode->crtc_clock /= 2; /* pixel counter doesn't work on i965gm TV output */ if (IS_I965GM(dev_priv)) @@ -1214,8 +1216,11 @@ intel_tv_compute_config(struct intel_encoder *encoder, tv_conn_state->bypass_vfilter = true; - if (!tv_mode->progressive) + if (!tv_mode->progressive) { + adjusted_mode->clock /= 2; + adjusted_mode->crtc_clock /= 2; adjusted_mode->flags |= DRM_MODE_FLAG_INTERLACE; + } } else { tv_conn_state->margins.top = conn_state->tv.margins.top; tv_conn_state->margins.bottom = conn_state->tv.margins.bottom; -- 2.30.2