From aa493737d8e2b7d4393a94479eec63381f842daa Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Sat, 12 Aug 2017 21:36:42 -0700 Subject: [PATCH] irqchip: mips-gic: Make pcpu_masks a per-cpu variable Define the pcpu_masks variable using the kernel's standard per-cpu variable support, rather than an open-coded array of structs containing bitmaps. Signed-off-by: Paul Burton Acked-by: Marc Zyngier Cc: Jason Cooper Cc: Thomas Gleixner Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17052/ Signed-off-by: Ralf Baechle --- drivers/irqchip/irq-mips-gic.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index feff4bf97577..00153231376a 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -23,6 +24,7 @@ #include #define GIC_MAX_INTRS 256 +#define GIC_MAX_LONGS BITS_TO_LONGS(GIC_MAX_INTRS) /* Add 2 to convert GIC CPU pin to core interrupt */ #define GIC_CPU_PIN_OFFSET 2 @@ -40,11 +42,8 @@ void __iomem *mips_gic_base; -struct gic_pcpu_mask { - DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS); -}; +DEFINE_PER_CPU_READ_MOSTLY(unsigned long[GIC_MAX_LONGS], pcpu_masks); -static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; static DEFINE_SPINLOCK(gic_lock); static struct irq_domain *gic_irq_domain; static struct irq_domain *gic_ipi_domain; @@ -137,7 +136,7 @@ static void gic_handle_shared_int(bool chained) DECLARE_BITMAP(intrmask, GIC_MAX_INTRS); /* Get per-cpu bitmaps */ - pcpu_mask = pcpu_masks[smp_processor_id()].pcpu_mask; + pcpu_mask = this_cpu_ptr(pcpu_masks); if (mips_cm_is64) { __ioread64_copy(pending, addr_gic_pend(), @@ -254,8 +253,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, /* Update the pcpu_masks */ for (i = 0; i < min(gic_vpes, NR_CPUS); i++) - clear_bit(irq, pcpu_masks[i].pcpu_mask); - set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask); + clear_bit(irq, per_cpu_ptr(pcpu_masks, i)); + set_bit(irq, per_cpu_ptr(pcpu_masks, cpumask_first(&tmp))); cpumask_copy(irq_data_get_affinity_mask(d), cpumask); spin_unlock_irqrestore(&gic_lock, flags); @@ -416,8 +415,8 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq, write_gic_map_pin(intr, GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin); write_gic_map_vp(intr, BIT(mips_cm_vp_id(vpe))); for (i = 0; i < min(gic_vpes, NR_CPUS); i++) - clear_bit(intr, pcpu_masks[i].pcpu_mask); - set_bit(intr, pcpu_masks[vpe].pcpu_mask); + clear_bit(intr, per_cpu_ptr(pcpu_masks, i)); + set_bit(intr, per_cpu_ptr(pcpu_masks, vpe)); spin_unlock_irqrestore(&gic_lock, flags); return 0; -- 2.30.2