From a94d702049569401c65b579d0751ce282f962b41 Mon Sep 17 00:00:00 2001 From: Elizabeth Oldham Date: Thu, 17 Aug 2006 12:39:21 +0100 Subject: [PATCH] [MIPS] MT: Fix setting of XTC. XTC can only be set if VPA is clear, which it may not be. There is also the possibility of a back to back c0 register access hazard to take care of. Signed-off-by: Ralf Baechle --- arch/mips/kernel/vpe.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 9ee0ec2cd067..51ddd2166898 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -768,10 +768,16 @@ int vpe_run(struct vpe * v) */ write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor); + write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~(VPECONF0_VPA)); + + back_to_back_c0_hazard(); + /* Set up the XTC bit in vpeconf0 to point at our tc */ write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) | (t->index << VPECONF0_XTC_SHIFT)); + back_to_back_c0_hazard(); + /* enable this VPE */ write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); -- 2.30.2