From a7a63e0ee5db9b53f666ea0d7bf83d95ea04bd14 Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Tue, 13 Feb 2018 20:22:19 -0800 Subject: [PATCH] Tegra: pmc: helper function to find last ON CPU This patch adds a helper function to find the last standing CPU in a cluster. Change-Id: Id018f1958f458c772c7b0c52af8ddf7532b1cec5 Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/common/drivers/pmc/pmc.c | 27 +++++++++++++++++++++- plat/nvidia/tegra/include/drivers/pmc.h | 6 +++-- 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/plat/nvidia/tegra/common/drivers/pmc/pmc.c b/plat/nvidia/tegra/common/drivers/pmc/pmc.c index b9ff5116..30ebdc59 100644 --- a/plat/nvidia/tegra/common/drivers/pmc/pmc.c +++ b/plat/nvidia/tegra/common/drivers/pmc/pmc.c @@ -17,7 +17,7 @@ /* Module IDs used during power ungate procedure */ static const uint32_t pmc_cpu_powergate_id[4] = { - 0, /* CPU 0 */ + 14, /* CPU 0 */ 9, /* CPU 1 */ 10, /* CPU 2 */ 11 /* CPU 3 */ @@ -97,6 +97,31 @@ void tegra_pmc_lock_cpu_vectors(void) tegra_pmc_write_32(PMC_SECURE_DISABLE3, val); } +/******************************************************************************* + * Find out if this is the last standing CPU + ******************************************************************************/ +bool tegra_pmc_is_last_on_cpu(void) +{ + int i, cpu = read_mpidr() & MPIDR_CPU_MASK; + uint32_t val = tegra_pmc_read_32(PMC_PWRGATE_STATUS);; + bool status = true; + + /* check if this is the last standing CPU */ + for (i = 0; i < PLATFORM_MAX_CPUS_PER_CLUSTER; i++) { + + /* skip the current CPU */ + if (i == cpu) + continue; + + /* are other CPUs already power gated? */ + if ((val & ((uint32_t)1 << pmc_cpu_powergate_id[i])) != 0U) { + status = false; + } + } + + return status; +} + /******************************************************************************* * Restart the system ******************************************************************************/ diff --git a/plat/nvidia/tegra/include/drivers/pmc.h b/plat/nvidia/tegra/include/drivers/pmc.h index a01a4b64..b9090b4a 100644 --- a/plat/nvidia/tegra/include/drivers/pmc.h +++ b/plat/nvidia/tegra/include/drivers/pmc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,6 +9,7 @@ #include #include +#include #include @@ -36,9 +37,10 @@ static inline void tegra_pmc_write_32(uint32_t off, uint32_t val) mmio_write_32(TEGRA_PMC_BASE + off, val); } +void tegra_pmc_cpu_on(int32_t cpu); void tegra_pmc_cpu_setup(uint64_t reset_addr); +bool tegra_pmc_is_last_on_cpu(void); void tegra_pmc_lock_cpu_vectors(void); -void tegra_pmc_cpu_on(int32_t cpu); __dead2 void tegra_pmc_system_reset(void); #endif /* PMC_H */ -- 2.30.2