From a70d675cedd0637202e625a51b6130ee028df74a Mon Sep 17 00:00:00 2001 From: Mathias Kresin Date: Wed, 15 Aug 2018 18:34:57 +0200 Subject: [PATCH] ramips: mt7620: fix bad indent Fix the indent to make the make it obvious which condition is the parent of the loop. Signed-off-by: Mathias Kresin (backported from 1ea1f3a223d7a56f96de00001f59b077a6c4d237) --- .../drivers/net/ethernet/mediatek/gsw_mt7620.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c index ecd056e27b..ffcf70c45a 100644 --- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c +++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c @@ -154,13 +154,12 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) _mt7620_mii_write(gsw, 1, 31, 0x1000); _mt7620_mii_write(gsw, 1, 17, 0xe7f8); - /* turn on all PHYs */ - for (i = 0; i <= 4; i++) { - val = _mt7620_mii_read(gsw, i, 0); - val &= ~BIT(11); - _mt7620_mii_write(gsw, i, 0, val); - } - + /* turn on all PHYs */ + for (i = 0; i <= 4; i++) { + val = _mt7620_mii_read(gsw, i, 0); + val &= ~BIT(11); + _mt7620_mii_write(gsw, i, 0, val); + } } /* global page 0 */ -- 2.30.2