From 9fb5082e258ac4672dc69636e5eb79f426defac8 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Peter=20K=C3=B6rner?= Date: Sun, 24 Sep 2023 20:58:13 +0200 Subject: [PATCH] rtl93xx: fix condition intended to only select internal serdes ports MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This condition was introduced in commit 51c8f7661244 ("realtek: Improve MAC config handling for all SoCs") to correctly report the speed of the internal serdes ports as 10G, but instead makes all ports read 10G because the or-operator should have been an and-operator. Fixes: #9953 Fixes: 51c8f7661244 ("realtek: Improve MAC config handling for all SoCs") Signed-off-by: Peter Körner [ wrap comment to 72 column and improve commit ref ] Signed-off-by: Christian Marangi --- target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c index 5744c70ea3f0..6f55f1e892ed 100644 --- a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c @@ -559,7 +559,7 @@ static int rtl93xx_phylink_mac_link_state(struct dsa_switch *ds, int port, } if (priv->family_id == RTL9310_FAMILY_ID - && (port >= 52 || port <= 55)) { /* Internal serdes */ + && (port >= 52 && port <= 55)) { /* Internal serdes */ state->speed = SPEED_10000; state->link = 1; state->duplex = 1; -- 2.30.2