From 9dfbff16b422a4bac7ad309847c7bc5d65653392 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 29 Mar 2014 02:15:43 +0100 Subject: [PATCH] devicetree: fix newly added exynos sata bindings Commit ba0d7ed391b7b "ARM: dts: enable ahci sata and sata phy for exynos5250" added a new binding document for the sata phy device, and changed the sata controller binding. However, in both cases significant aspects of the binding remained undocumented. This attempts to reconstruct the actual binding from the usage. Signed-off-by: Arnd Bergmann Cc: Yuvaraj Kumar C D Cc: Kishon Vijay Abraham I Cc: Kukjin Kim --- Documentation/devicetree/bindings/ata/exynos-sata.txt | 10 ++++++++-- Documentation/devicetree/bindings/phy/samsung-phy.txt | 6 +++++- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt index b2adb1f3090e..cb48448247ea 100644 --- a/Documentation/devicetree/bindings/ata/exynos-sata.txt +++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt @@ -8,8 +8,14 @@ Required properties: - interrupts : - reg : - samsung,sata-freq : -- phys : as mentioned in phy-bindings.txt -- phy-names : as mentioned in phy-bindings.txt +- phys : Must contain exactly one entry as specified + in phy-bindings.txt +- phy-names : Must be "sata-phy" + +Optional properties: +- clocks : Must contain an entry for each entry in clock-names. +- clock-names : Shall be "sata" for the external SATA bus clock, + and "sclk_sata" for the internal controller clock. Example: sata@122f0000 { diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index a937f75d062c..67d38b3176cf 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -30,7 +30,11 @@ Each SATA PHY controller should have its own node. Required properties: - compatible : compatible list, contains "samsung,exynos5250-sata-phy" - reg : offset and length of the SATA PHY register set; -- #phy-cells : from the generic phy bindings; +- #phy-cells : must be zero +- clocks : must be exactly one entry +- clock-names : must be "sata_phyctrl" +- samsung,exynos-sataphy-i2c-phandle : a phandle to the I2C device, no arguments +- samsung,syscon-phandle : a phandle to the PMU system controller, no arguments Example: sata_phy: sata-phy@12170000 { -- 2.30.2