From 8f266d508c7aa7dad84fbb0d793aa95e8af95169 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Tue, 22 Mar 2016 11:10:52 -0700 Subject: [PATCH] staging: comedi: ni_660x: refactor GPCT_OFFSET This driver supports boards that have 1 or 2 TIO chips with base addresses 0x800 apart. Replace the static const array 'GPCT_OFFSET' with a define and calculate the base address based on the chip index. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- drivers/staging/comedi/drivers/ni_660x.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index 3b57ce59273e..73ccd62eb450 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c @@ -204,9 +204,7 @@ static const struct ni_660x_register_data ni_660x_reg_data[NI660X_NUM_REGS] = { [NI660X_IO_CFG_38_39] = { 0x7a2, 2 } /* read/write */ }; -/* Offset of the GPCT chips from the base-address of the card */ -/* First chip is at base-address + 0x00, etc. */ -static const unsigned GPCT_OFFSET[2] = { 0x0, 0x800 }; +#define NI660X_CHIP_OFFSET 0x800 enum ni_660x_boardid { BOARD_PCI6601, @@ -271,7 +269,8 @@ struct ni_660x_private { static void ni_660x_write(struct comedi_device *dev, unsigned int chip, unsigned int bits, unsigned int reg) { - unsigned int addr = GPCT_OFFSET[chip] + ni_660x_reg_data[reg].offset; + unsigned int addr = (chip * NI660X_CHIP_OFFSET) + + ni_660x_reg_data[reg].offset; if (ni_660x_reg_data[reg].size == 2) writew(bits, dev->mmio + addr); @@ -282,7 +281,8 @@ static void ni_660x_write(struct comedi_device *dev, unsigned int chip, static unsigned int ni_660x_read(struct comedi_device *dev, unsigned int chip, unsigned int reg) { - unsigned int addr = GPCT_OFFSET[chip] + ni_660x_reg_data[reg].offset; + unsigned int addr = (chip * NI660X_CHIP_OFFSET) + + ni_660x_reg_data[reg].offset; if (ni_660x_reg_data[reg].size == 2) return readw(dev->mmio + addr); -- 2.30.2