From 8dd99bca7bfa4b62753b556c45d26f45ec9da6e6 Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 5 Oct 2016 16:04:13 -0500 Subject: [PATCH] PCI: tegra: Fix argument order in tegra_pcie_phy_disable() The tegra_pcie_phy_disable() path called pads_writel() with arguments in the wrong order. Swap them to be the "value, offset" order expected by pads_writel(). Fixes: 6fe7c187e026 ("PCI: tegra: Support per-lane PHYs") Signed-off-by: Bjorn Helgaas Acked-by: Thierry Reding CC: stable@vger.kernel.org # v4.7+ --- drivers/pci/host/pci-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index e2a8e4cab22e..6df5ed0ffe3c 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -859,7 +859,7 @@ static int tegra_pcie_phy_disable(struct tegra_pcie *pcie) /* override IDDQ */ value = pads_readl(pcie, PADS_CTL); value |= PADS_CTL_IDDQ_1L; - pads_writel(pcie, PADS_CTL, value); + pads_writel(pcie, value, PADS_CTL); /* reset PLL */ value = pads_readl(pcie, soc->pads_pll_ctl); -- 2.30.2