From 85eacb06260ca4f92ea4554355c36ad33afeb643 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Mon, 8 Apr 2013 18:04:36 +0200 Subject: [PATCH] staging: drm/imx: ipu-dc: add WCLK/WRG opcodes Add WRG and WCLK opcodes to the display controller microcode, and allow multi instruction codes. Signed-off-by: Philipp Zabel Signed-off-by: Greg Kroah-Hartman --- drivers/staging/imx-drm/ipu-v3/ipu-dc.c | 39 +++++++++++++++---------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c index fad50576cd7c..355b8a2fb3ed 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-dc.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-dc.c @@ -61,8 +61,10 @@ #define WROD(lf) (0x18 | ((lf) << 1)) #define WRG 0x01 +#define WCLK 0xc9 #define SYNC_WAVE 0 +#define NULL_WAVE (-1) #define DC_GEN_SYNC_1_6_SYNC (2 << 1) #define DC_GEN_SYNC_PRIORITY_1 (1 << 7) @@ -119,16 +121,23 @@ static void dc_link_event(struct ipu_dc *dc, int event, int addr, int priority) } static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, - int map, int wave, int glue, int sync) + int map, int wave, int glue, int sync, int stop) { struct ipu_dc_priv *priv = dc->priv; - u32 reg; - int stop = 1; - - reg = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); - writel(reg, priv->dc_tmpl_reg + word * 8); - reg = operand >> 12 | opcode << 4 | stop << 9; - writel(reg, priv->dc_tmpl_reg + word * 8 + 4); + u32 reg1, reg2; + + if (opcode == WCLK) { + reg1 = (operand << 20) & 0xfff00000; + reg2 = operand >> 12 | opcode << 1 | stop << 9; + } else if (opcode == WRG) { + reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); + reg2 = operand >> 17 | opcode << 7 | stop << 9; + } else { + reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); + reg2 = operand >> 12 | opcode << 4 | stop << 9; + } + writel(reg1, priv->dc_tmpl_reg + word * 8); + writel(reg2, priv->dc_tmpl_reg + word * 8 + 4); } static int ipu_pixfmt_to_map(u32 fmt) @@ -165,24 +174,24 @@ int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, dc_link_event(dc, DC_EVT_NEW_DATA, 0, 1); /* Init template microcode */ - dc_write_tmpl(dc, 0, WROD(0), 0, map, SYNC_WAVE, 0, 8); + dc_write_tmpl(dc, 0, WROD(0), 0, map, SYNC_WAVE, 0, 8, 1); } else { if (dc->di) { dc_link_event(dc, DC_EVT_NL, 2, 3); dc_link_event(dc, DC_EVT_EOL, 3, 2); dc_link_event(dc, DC_EVT_NEW_DATA, 4, 1); /* Init template microcode */ - dc_write_tmpl(dc, 2, WROD(0), 0, map, SYNC_WAVE, 8, 5); - dc_write_tmpl(dc, 3, WROD(0), 0, map, SYNC_WAVE, 4, 5); - dc_write_tmpl(dc, 4, WROD(0), 0, map, SYNC_WAVE, 0, 5); + dc_write_tmpl(dc, 2, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); + dc_write_tmpl(dc, 3, WROD(0), 0, map, SYNC_WAVE, 4, 5, 1); + dc_write_tmpl(dc, 4, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); } else { dc_link_event(dc, DC_EVT_NL, 5, 3); dc_link_event(dc, DC_EVT_EOL, 6, 2); dc_link_event(dc, DC_EVT_NEW_DATA, 7, 1); /* Init template microcode */ - dc_write_tmpl(dc, 5, WROD(0), 0, map, SYNC_WAVE, 8, 5); - dc_write_tmpl(dc, 6, WROD(0), 0, map, SYNC_WAVE, 4, 5); - dc_write_tmpl(dc, 7, WROD(0), 0, map, SYNC_WAVE, 0, 5); + dc_write_tmpl(dc, 5, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); + dc_write_tmpl(dc, 6, WROD(0), 0, map, SYNC_WAVE, 4, 5, 1); + dc_write_tmpl(dc, 7, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); } } dc_link_event(dc, DC_EVT_NF, 0, 0); -- 2.30.2