From 84b589c9e703c11bf3449d62c09c2363c2520b99 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 2 Mar 2018 14:25:41 +0800 Subject: [PATCH] hikey: fix build issue with CLANG plat/hisilicon/hikey/hikey_bl1_setup.c:565:47: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths] __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data)); Signed-off-by: Haojian Zhuang --- plat/hisilicon/hikey/hikey_bl1_setup.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c index df0ad8e0..52dcf6b1 100644 --- a/plat/hisilicon/hikey/hikey_bl1_setup.c +++ b/plat/hisilicon/hikey/hikey_bl1_setup.c @@ -572,7 +572,7 @@ image_desc_t *bl1_plat_get_image_desc(unsigned int image_id) void bl1_plat_set_ep_info(unsigned int image_id, entry_point_info_t *ep_info) { - unsigned int data = 0; + uint64_t data = 0; if (image_id == BL2_IMAGE_ID) return; @@ -583,7 +583,7 @@ void bl1_plat_set_ep_info(unsigned int image_id, __asm__ volatile ("msr cpacr_el1, %0" : : "r"(data)); __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data)); } while ((data & (3 << 20)) != (3 << 20)); - INFO("cpacr_el1:0x%x\n", data); + INFO("cpacr_el1:0x%lx\n", data); ep_info->args.arg0 = 0xffff & read_mpidr(); ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, -- 2.30.2