From 8458febc01423346b9dbae5c5a56a242ad2bc3c0 Mon Sep 17 00:00:00 2001 From: Pavel Kubelun Date: Thu, 18 Jan 2018 13:51:25 +0300 Subject: [PATCH] ipq806x: fix pcie tx termination offset According to GPL tarballs and QSDK related branch tx termination offset for ipq8064 SoC version >= 2.0 should be equal to 0 and not 7. https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L1682-L1685 Fix this. Signed-off-by: Pavel Kubelun [slh: rebase for kernel v4.14 as well] Signed-off-by: Stefan Lippers-Hollmann (cherry picked from commit fbedc2213c19023bb4ec4ed7bd71908501aaf6d1) --- .../arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi | 12 ++++++++++++ .../arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi | 12 ++++++++++++ 2 files changed, 24 insertions(+) diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi index 5a40b03eef..8c522a897d 100644 --- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi +++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi @@ -14,5 +14,17 @@ tx_deamp_3_5db = <32>; mpll = <0xa0>; }; + + pcie0: pci@1b500000 { + phy-tx0-term-offset = <0>; + }; + + pcie1: pci@1b700000 { + phy-tx0-term-offset = <0>; + }; + + pcie2: pci@1b900000 { + phy-tx0-term-offset = <0>; + }; }; }; diff --git a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi index 5a40b03eef..8c522a897d 100644 --- a/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi +++ b/target/linux/ipq806x/files-4.9/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi @@ -14,5 +14,17 @@ tx_deamp_3_5db = <32>; mpll = <0xa0>; }; + + pcie0: pci@1b500000 { + phy-tx0-term-offset = <0>; + }; + + pcie1: pci@1b700000 { + phy-tx0-term-offset = <0>; + }; + + pcie2: pci@1b900000 { + phy-tx0-term-offset = <0>; + }; }; }; -- 2.30.2