From 836c3ae131cc7ae6a21636b944a98d432ad6af38 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 23 Mar 2016 12:52:09 +0000 Subject: [PATCH] ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR900 The MR900 must unset some bits in ETH_CFG which were set by u-boot to work correctly under OpenWrt. But the global function ath79_setup_qca955x_eth_cfg will not unset all of them to increase the backward compatiblity with older mach-* files. A private (simplified) version for MR900 can be used instead. Signed-off-by: Sven Eckelmann SVN-Revision: 49069 --- .../ar71xx/files/arch/mips/ath79/mach-mr900.c | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c index efdfa2aa61..b439f58892 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr900.c @@ -110,6 +110,28 @@ static struct mdio_board_info mr900_mdio0_info[] = { }, }; +static void __init mr900_setup_qca955x_eth_cfg(u32 mask, + unsigned int rxd, + unsigned int rxdv, + unsigned int txd, + unsigned int txe) +{ + void __iomem *base; + u32 t; + + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); + + t = mask; + t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT; + t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT; + t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT; + t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT; + + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + static void __init mr900_setup(void) { u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); @@ -139,7 +161,7 @@ static void __init mr900_setup(void) } pdata->use_eeprom = true; - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + mr900_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); ath79_register_mdio(0, 0x0); mdiobus_register_board_info(mr900_mdio0_info, -- 2.30.2