From 7f50762423b4825674ee7fe10fa37abdafdcf754 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 1 Nov 2017 03:56:20 +1000 Subject: [PATCH] drm/nouveau: determine memory class for each client Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nouveau_drm.c | 16 ++++++++++++++++ drivers/gpu/drm/nouveau/nouveau_drv.h | 1 + 2 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index a6aaddecd8c5..e82da06d82f0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -127,6 +127,13 @@ static int nouveau_cli_init(struct nouveau_drm *drm, const char *sname, struct nouveau_cli *cli) { + static const struct nvif_mclass + mems[] = { + { NVIF_CLASS_MEM_GF100, -1 }, + { NVIF_CLASS_MEM_NV50 , -1 }, + { NVIF_CLASS_MEM_NV04 , -1 }, + {} + }; static const struct nvif_mclass mmus[] = { { NVIF_CLASS_MMU_GF100, -1 }, @@ -201,11 +208,20 @@ nouveau_cli_init(struct nouveau_drm *drm, const char *sname, goto done; } + ret = nvif_mclass(&cli->mmu.object, mems); + if (ret < 0) { + NV_ERROR(drm, "No supported MEM class\n"); + goto done; + } + + cli->mem = &mems[ret]; + if (1) { cli->vm = cli->vmm.vm; nvxx_client(&cli->base)->vm = cli->vm; } + return 0; done: if (ret) nouveau_cli_fini(cli); diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 25e0fb73747b..df9d9a71dde5 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -95,6 +95,7 @@ struct nouveau_cli { struct nvif_device device; struct nvif_mmu mmu; struct nouveau_vmm vmm; + const struct nvif_mclass *mem; struct nvkm_vm *vm; struct list_head head; -- 2.30.2