From 7aaebdead67bbb01ff172dd3116dc7a1649150e6 Mon Sep 17 00:00:00 2001
From: Imre Kaloz <kaloz@openwrt.org>
Date: Tue, 16 Oct 2007 12:22:57 +0000
Subject: [PATCH] resync avr32 with 2.6.23.atmel.1

SVN-Revision: 9332
---
 target/linux/avr32/Makefile                   |     2 +-
 .../avr32/{config-2.6.22 => config-2.6.23}    |     3 +
 target/linux/avr32/patches/100-git_sync.patch | 15935 ++++++++--------
 3 files changed, 8217 insertions(+), 7723 deletions(-)
 rename target/linux/avr32/{config-2.6.22 => config-2.6.23} (97%)

diff --git a/target/linux/avr32/Makefile b/target/linux/avr32/Makefile
index 5c7c0bca3c..cd5b4a4d18 100644
--- a/target/linux/avr32/Makefile
+++ b/target/linux/avr32/Makefile
@@ -10,7 +10,7 @@ ARCH:=avr32
 BOARD:=avr32
 BOARDNAME:=Atmel AVR32
 FEATURES:=squashfs
-LINUX_VERSION:=2.6.22.4
+LINUX_VERSION:=2.6.23
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/avr32/config-2.6.22 b/target/linux/avr32/config-2.6.23
similarity index 97%
rename from target/linux/avr32/config-2.6.22
rename to target/linux/avr32/config-2.6.23
index 5c62fa6835..75520b4569 100644
--- a/target/linux/avr32/config-2.6.22
+++ b/target/linux/avr32/config-2.6.23
@@ -3,6 +3,7 @@ CONFIG_AP7000_16_BIT_SMC=y
 # CONFIG_AP7000_8_BIT_SMC is not set
 # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
 # CONFIG_ATM_DRIVERS is not set
+# CONFIG_ATMEL_SSC is not set
 CONFIG_AVR32=y
 CONFIG_BOARD_ATNGW100=y
 # CONFIG_BOARD_ATNGW100_I2C_GPIO is not set
@@ -100,7 +101,9 @@ CONFIG_SPI_ATMEL=y
 # CONFIG_SPI_DEBUG is not set
 CONFIG_SPI_MASTER=y
 # CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
 CONFIG_SPI=y
 CONFIG_SUBARCH_AVR32B=y
 # CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_USER_NS is not set
 # CONFIG_WATCHDOG is not set
diff --git a/target/linux/avr32/patches/100-git_sync.patch b/target/linux/avr32/patches/100-git_sync.patch
index e9e96144ec..6ce6259b6a 100644
--- a/target/linux/avr32/patches/100-git_sync.patch
+++ b/target/linux/avr32/patches/100-git_sync.patch
@@ -1,6 +1,173 @@
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig linux-avr32.git/arch/avr32/boards/atngw100/Kconfig
---- linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/boards/atngw100/Kconfig	2007-07-13 11:24:16.000000000 +0200
+ MAINTAINERS                             |    7 +
+ Makefile                                |    2 +-
+ arch/avr32/Kconfig                      |    7 +
+ arch/avr32/Makefile                     |    1 +
+ arch/avr32/boards/atngw100/Kconfig      |   12 +
+ arch/avr32/boards/atngw100/flash.c      |    5 +-
+ arch/avr32/boards/atngw100/setup.c      |   26 +-
+ arch/avr32/boards/atstk1000/Kconfig     |   12 +
+ arch/avr32/boards/atstk1000/atstk1002.c |   72 ++
+ arch/avr32/boards/atstk1000/flash.c     |    5 +-
+ arch/avr32/configs/atngw100_defconfig   |  201 +++-
+ arch/avr32/configs/atstk1002_defconfig  |  354 +++++-
+ arch/avr32/drivers/Makefile             |    1 +
+ arch/avr32/drivers/dw-dmac.c            |  761 ++++++++++++
+ arch/avr32/drivers/dw-dmac.h            |   42 +
+ arch/avr32/kernel/Makefile              |    6 +-
+ arch/avr32/kernel/dma-controller.c      |   34 +
+ arch/avr32/kernel/entry-avr32b.S        |   26 +-
+ arch/avr32/kernel/setup.c               |    2 +-
+ arch/avr32/kernel/vmlinux.lds.S         |  143 +++
+ arch/avr32/kernel/vmlinux.lds.c         |  142 ---
+ arch/avr32/mach-at32ap/Kconfig          |    7 +
+ arch/avr32/mach-at32ap/Makefile         |    1 +
+ arch/avr32/mach-at32ap/at32ap7000.c     |  241 ++++-
+ arch/avr32/mach-at32ap/clock.c          |  116 ++
+ arch/avr32/mach-at32ap/gpio-dev.c       |  573 +++++++++
+ arch/avr32/mach-at32ap/hsmc.c           |  129 ++-
+ arch/avr32/mach-at32ap/pio.c            |   80 ++
+ arch/avr32/mach-at32ap/pm.h             |    8 +
+ arch/avr32/mm/dma-coherent.c            |    7 +
+ arch/avr32/mm/init.c                    |   12 +-
+ drivers/i2c/busses/Kconfig              |    8 +
+ drivers/i2c/busses/Makefile             |    1 +
+ drivers/i2c/busses/i2c-atmeltwi.c       |  436 +++++++
+ drivers/i2c/busses/i2c-atmeltwi.h       |  117 ++
+ drivers/misc/Kconfig                    |    9 +
+ drivers/misc/Makefile                   |    1 +
+ drivers/misc/atmel-ssc.c                |  174 +++
+ drivers/mmc/host/Kconfig                |   10 +
+ drivers/mmc/host/Makefile               |    1 +
+ drivers/mmc/host/atmel-mci.c            | 1161 ++++++++++++++++++
+ drivers/mmc/host/atmel-mci.h            |  192 +++
+ drivers/mtd/chips/cfi_cmdset_0001.c     |   43 +
+ drivers/mtd/chips/cfi_cmdset_0002.c     |    6 +-
+ drivers/spi/atmel_spi.c                 |    4 +-
+ drivers/usb/gadget/Kconfig              |   26 +-
+ drivers/usb/gadget/Makefile             |    1 +
+ drivers/usb/gadget/atmel_usba_udc.c     | 2038 +++++++++++++++++++++++++++++++
+ drivers/usb/gadget/atmel_usba_udc.h     |  350 ++++++
+ drivers/video/atmel_lcdfb.c             |    6 +-
+ drivers/video/backlight/Kconfig         |   12 +
+ drivers/video/backlight/Makefile        |    2 +
+ drivers/video/backlight/ltv350qv.c      |  339 +++++
+ drivers/video/backlight/ltv350qv.h      |   95 ++
+ include/asm-avr32/arch-at32ap/board.h   |   20 +
+ include/asm-avr32/arch-at32ap/portmux.h |   13 +
+ include/asm-avr32/arch-at32ap/smc.h     |   51 +-
+ include/asm-avr32/dma-controller.h      |  166 +++
+ include/asm-avr32/dma-mapping.h         |   17 +-
+ include/asm-avr32/system.h              |   13 +-
+ include/asm-avr32/unistd.h              |   13 +
+ include/linux/atmel-ssc.h               |  312 +++++
+ include/linux/spi/at73c213.h            |   25 +
+ scripts/checkstack.pl                   |    5 +
+ sound/Kconfig                           |    6 +
+ sound/Makefile                          |    3 +-
+ sound/avr32/Kconfig                     |   11 +
+ sound/avr32/Makefile                    |    3 +
+ sound/avr32/ac97c.c                     |  914 ++++++++++++++
+ sound/avr32/ac97c.h                     |   71 ++
+ sound/oss/Kconfig                       |    4 +
+ sound/oss/Makefile                      |    1 +
+ sound/oss/at32_abdac.c                  |  722 +++++++++++
+ sound/oss/at32_abdac.h                  |   59 +
+ sound/spi/Kconfig                       |   31 +
+ sound/spi/Makefile                      |    5 +
+ sound/spi/at73c213.c                    | 1121 +++++++++++++++++
+ sound/spi/at73c213.h                    |  119 ++
+ 78 files changed, 11500 insertions(+), 272 deletions(-)
+ create mode 100644 arch/avr32/boards/atngw100/Kconfig
+ create mode 100644 arch/avr32/drivers/Makefile
+ create mode 100644 arch/avr32/drivers/dw-dmac.c
+ create mode 100644 arch/avr32/drivers/dw-dmac.h
+ create mode 100644 arch/avr32/kernel/dma-controller.c
+ create mode 100644 arch/avr32/kernel/vmlinux.lds.S
+ delete mode 100644 arch/avr32/kernel/vmlinux.lds.c
+ create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c
+ create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h
+ create mode 100644 drivers/misc/atmel-ssc.c
+ create mode 100644 drivers/mmc/host/atmel-mci.c
+ create mode 100644 drivers/mmc/host/atmel-mci.h
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.c
+ create mode 100644 drivers/usb/gadget/atmel_usba_udc.h
+ create mode 100644 drivers/video/backlight/ltv350qv.c
+ create mode 100644 drivers/video/backlight/ltv350qv.h
+ create mode 100644 include/asm-avr32/dma-controller.h
+ create mode 100644 include/linux/atmel-ssc.h
+ create mode 100644 include/linux/spi/at73c213.h
+ create mode 100644 sound/avr32/Kconfig
+ create mode 100644 sound/avr32/Makefile
+ create mode 100644 sound/avr32/ac97c.c
+ create mode 100644 sound/avr32/ac97c.h
+ create mode 100644 sound/oss/at32_abdac.c
+ create mode 100644 sound/oss/at32_abdac.h
+ create mode 100644 sound/spi/Kconfig
+ create mode 100644 sound/spi/Makefile
+ create mode 100644 sound/spi/at73c213.c
+ create mode 100644 sound/spi/at73c213.h
+
+diff --git a/MAINTAINERS b/MAINTAINERS
+index 9a91d9e..587afe3 100644
+--- a/MAINTAINERS
++++ b/MAINTAINERS
+@@ -669,6 +669,13 @@ P:	Haavard Skinnemoen
+ M:	hskinnemoen@atmel.com
+ S:	Supported
+ 
++ATMEL USBA UDC DRIVER
++P:	Haavard Skinnemoen
++M:	hskinnemoen@atmel.com
++L:	kernel@avr32linux.org
++W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
++S:	Supported
++
+ ATMEL WIRELESS DRIVER
+ P:	Simon Kelley
+ M:	simon@thekelleys.org.uk
+diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig
+index d12346a..ec6c7c5 100644
+--- a/arch/avr32/Kconfig
++++ b/arch/avr32/Kconfig
+@@ -116,6 +116,9 @@ endchoice
+ if BOARD_ATSTK1000
+ source "arch/avr32/boards/atstk1000/Kconfig"
+ endif
++if BOARD_ATNGW100
++source "arch/avr32/boards/atngw100/Kconfig"
++endif
+ 
+ choice
+ 	prompt "Boot loader type"
+@@ -175,6 +178,10 @@ config OWNERSHIP_TRACE
+ 	  enabling Nexus-compliant debuggers to keep track of the PID of the
+ 	  currently executing task.
+ 
++config DW_DMAC
++	tristate "Synopsys DesignWare DMA Controller support"
++	default y if CPU_AT32AP7000
++
+ # FPU emulation goes here
+ 
+ source "kernel/Kconfig.hz"
+diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile
+index dc6bc01..eb72198 100644
+--- a/arch/avr32/Makefile
++++ b/arch/avr32/Makefile
+@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100)		+= arch/avr32/boards/atngw100/
+ core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
+ core-y					+= arch/avr32/kernel/
+ core-y					+= arch/avr32/mm/
++drivers-y				+= arch/avr32/drivers/
+ libs-y					+= arch/avr32/lib/
+ 
+ archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
+diff --git a/arch/avr32/boards/atngw100/Kconfig b/arch/avr32/boards/atngw100/Kconfig
+new file mode 100644
+index 0000000..5d922df
+--- /dev/null
++++ b/arch/avr32/boards/atngw100/Kconfig
 @@ -0,0 +1,12 @@
 +# NGW100 customization
 +
@@ -14,31 +181,42 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atngw100/Kconfig linux-avr32.
 +
 +	  Choose 'Y' here if you're having i2c-related problems and
 +	  want to rule out the i2c bus driver.
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c linux-avr32.git/arch/avr32/boards/atngw100/setup.c
---- linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/boards/atngw100/setup.c	2007-07-13 11:24:16.000000000 +0200
-@@ -9,10 +9,12 @@
-  */
- #include <linux/clk.h>
- #include <linux/etherdevice.h>
-+#include <linux/i2c-gpio.h>
- #include <linux/init.h>
- #include <linux/linkage.h>
- #include <linux/platform_device.h>
- #include <linux/types.h>
-+#include <linux/leds.h>
- #include <linux/spi/spi.h>
- 
- #include <asm/io.h>
-@@ -21,6 +23,7 @@
- #include <asm/arch/at32ap7000.h>
- #include <asm/arch/board.h>
- #include <asm/arch/init.h>
-+#include <asm/arch/portmux.h>
+diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c
+index f9b32a8..b07ae63 100644
+--- a/arch/avr32/boards/atngw100/flash.c
++++ b/arch/avr32/boards/atngw100/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
  
- /* Initialized by bootloader-specific startup code. */
- struct tag *bootloader_tags __initdata;
-@@ -39,6 +42,11 @@
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c
+index ef80156..2a5f587 100644
+--- a/arch/avr32/boards/atngw100/setup.c
++++ b/arch/avr32/boards/atngw100/setup.c
+@@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = {
  	},
  };
  
@@ -50,329 +228,237 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atngw100/setup.c linux-avr32.
  /*
   * The next two functions should go away as the boot loader is
   * supposed to initialize the macb address registers with a valid
-@@ -100,8 +108,46 @@
- 	at32_setup_serial_console(0);
- }
+@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = {
+ 	}
+ };
  
-+static const struct gpio_led ngw_leds[] = {
-+	{ .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1,
-+		.default_trigger = "heartbeat",
-+	},
-+	{ .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, },
-+	{ .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, },
-+};
-+
-+static const struct gpio_led_platform_data ngw_led_data = {
-+	.num_leds =	ARRAY_SIZE(ngw_leds),
-+	.leds =		(void *) ngw_leds,
-+};
-+
-+static struct platform_device ngw_gpio_leds = {
-+	.name =		"leds-gpio",
-+	.id =		-1,
-+	.dev = {
-+		.platform_data = (void *) &ngw_led_data,
-+	}
-+};
-+
 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
-+static struct i2c_gpio_platform_data i2c_gpio_data = {
-+	.sda_pin	= GPIO_PIN_PA(6),
-+	.scl_pin	= GPIO_PIN_PA(7),
-+};
-+
-+static struct platform_device i2c_gpio_device = {
-+	.name		= "i2c-gpio",
-+	.id		= 0,
-+	.dev		= {
-+		.platform_data	= &i2c_gpio_data,
-+	},
-+};
+ static struct i2c_gpio_platform_data i2c_gpio_data = {
+-	.sda_pin	= GPIO_PIN_PA(6),
+-	.scl_pin	= GPIO_PIN_PA(7),
++	.sda_pin		= GPIO_PIN_PA(6),
++	.scl_pin		= GPIO_PIN_PA(7),
++	.sda_is_open_drain	= 1,
++	.scl_is_open_drain	= 1,
++	.udelay			= 2,	/* close to 100 kHz */
+ };
+ 
+ static struct platform_device i2c_gpio_device = {
+@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = {
+ 		.platform_data	= &i2c_gpio_data,
+ 	},
+ };
 +#endif
-+
+ 
  static int __init atngw100_init(void)
  {
-+	unsigned	i;
-+
- 	/*
- 	 * ATNGW100 uses 16-bit SDRAM interface, so we don't need to
- 	 * reserve any pins for it.
-@@ -115,6 +161,22 @@
+@@ -154,6 +164,8 @@ static int __init atngw100_init(void)
  	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
  
  	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
 +	at32_add_device_mci(0, &mci0_data);
 +	at32_add_device_usba(0, NULL);
-+
-+	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
-+		at32_select_gpio(ngw_leds[i].gpio,
-+				AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
-+	}
-+	platform_device_register(&ngw_gpio_leds);
-+
+ 
+ 	for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) {
+ 		at32_select_gpio(ngw_leds[i].gpio,
+@@ -161,9 +173,15 @@ static int __init atngw100_init(void)
+ 	}
+ 	platform_device_register(&ngw_gpio_leds);
+ 
+-	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
+-	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
 +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO
-+	at32_select_gpio(i2c_gpio_data.sda_pin, 0);
-+	at32_select_gpio(i2c_gpio_data.scl_pin, 0);
-+	platform_device_register(&i2c_gpio_device);
++	at32_select_gpio(i2c_gpio_data.sda_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
++	at32_select_gpio(i2c_gpio_data.scl_pin,
++		AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH);
+ 	platform_device_register(&i2c_gpio_device);
 +#else
 +	at32_add_device_twi(0);
 +#endif
  
  	return 0;
  }
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atstk1000/atstk1002.c linux-avr32.git/arch/avr32/boards/atstk1000/atstk1002.c
---- linux-2.6.22.1/arch/avr32/boards/atstk1000/atstk1002.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/boards/atstk1000/atstk1002.c	2007-07-12 13:59:49.000000000 +0200
-@@ -11,6 +11,7 @@
- #include <linux/etherdevice.h>
- #include <linux/init.h>
- #include <linux/kernel.h>
-+#include <linux/leds.h>
- #include <linux/platform_device.h>
+diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig
+index 718578f..b1f5a62 100644
+--- a/arch/avr32/boards/atstk1000/Kconfig
++++ b/arch/avr32/boards/atstk1000/Kconfig
+@@ -76,4 +76,16 @@ config BOARD_ATSTK1002_J2_RGB
+ 
+ endchoice
+ 
++config BOARD_ATSTK1002_ENABLE_AC97
++	bool "Use AC97C instead of ABDAC"
++	help
++	  Select this if you want to use the built-in AC97 controller
++	  instead of the built-in Audio Bitstream DAC. These share
++	  the same I/O pins on the AP7000, so both can't be enabled
++	  at the same time.
++
++	  Note that the STK1000/STK1002 kit doesn't ship with an AC97
++	  codec on board, so say N unless you've got an expansion
++	  board with an AC97 codec on it that you want to use.
++
+ endif	# stk 1002
+diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
+index c9981b7..f7fb509 100644
+--- a/arch/avr32/boards/atstk1000/atstk1002.c
++++ b/arch/avr32/boards/atstk1000/atstk1002.c
+@@ -16,6 +16,7 @@
  #include <linux/string.h>
  #include <linux/types.h>
-@@ -27,7 +28,6 @@
- 
- #include "atstk1000.h"
+ #include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
  
--#define	SW2_DEFAULT		/* MMCI and UART_A available */
+ #include <video/atmel_lcdc.h>
  
- struct eth_addr {
- 	u8 addr[6];
-@@ -36,6 +36,7 @@
- static struct eth_addr __initdata hw_addr[2];
- static struct eth_platform_data __initdata eth_data[2];
+@@ -49,7 +50,25 @@ static struct eth_platform_data __initdata eth_data[2] = {
+ };
  
+ #ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++static struct at73c213_board_info at73c213_data = {
++	.ssc_id		= 0,
++	.shortname	= "AVR32 STK1000 external DAC",
++};
++#endif
++#endif
 +#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
  static struct spi_board_info spi0_board_info[] __initdata = {
++#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++	{
++		/* AT73C213 */
++		.modalias	= "at73c213",
++		.max_speed_hz	= 200000,
++		.chip_select	= 0,
++		.mode		= SPI_MODE_1,
++		.platform_data	= &at73c213_data,
++	},
++#endif
  	{
  		/* QVGA display */
-@@ -45,6 +46,18 @@
- 		.mode		= SPI_MODE_3,
- 	},
- };
-+#endif
-+
-+#ifdef CONFIG_BOARD_ATSTK1002_SPI1
-+static struct spi_board_info spi1_board_info[] __initdata = { {
-+	/* patch in custom entries here */
-+} };
-+#endif
-+
+ 		.modalias	= "ltv350qv",
+@@ -66,6 +85,11 @@ static struct spi_board_info spi1_board_info[] __initdata = { {
+ } };
+ #endif
+ 
 +static struct mci_platform_data __initdata mci0_data = {
 +	.detect_pin	= GPIO_PIN_NONE,
 +	.wp_pin		= GPIO_PIN_NONE,
 +};
- 
++
  /*
   * The next two functions should go away as the boot loader is
-@@ -101,12 +114,71 @@
- 	clk_put(pclk);
+  * supposed to initialize the macb address registers with a valid
+@@ -180,6 +204,38 @@ static void setup_j2_leds(void)
  }
+ #endif
  
--void __init setup_board(void)
-+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED
-+
-+static struct gpio_led stk_j2_led[] = {
-+#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8
-+#define LEDSTRING "J2 jumpered to LED8"
-+	{ .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), },
-+	{ .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), },
-+	{ .name = "led2:amber", .gpio = GPIO_PIN_PB(10), },
-+	{ .name = "led3:amber", .gpio = GPIO_PIN_PB(13), },
-+	{ .name = "led4:amber", .gpio = GPIO_PIN_PB(14), },
-+	{ .name = "led5:amber", .gpio = GPIO_PIN_PB(15), },
-+	{ .name = "led6:amber", .gpio = GPIO_PIN_PB(16), },
-+	{ .name = "led7:amber", .gpio = GPIO_PIN_PB(30),
-+			.default_trigger = "heartbeat", },
-+#else	/* RGB */
-+#define LEDSTRING "J2 jumpered to RGB LEDs"
-+	{ .name = "r1:red",     .gpio = GPIO_PIN_PB( 8), },
-+	{ .name = "g1:green",   .gpio = GPIO_PIN_PB(10), },
-+	{ .name = "b1:blue",    .gpio = GPIO_PIN_PB(14), },
-+
-+	{ .name = "r2:red",     .gpio = GPIO_PIN_PB( 9),
-+			.default_trigger = "heartbeat", },
-+	{ .name = "g2:green",   .gpio = GPIO_PIN_PB(13), },
-+	{ .name = "b2:blue",    .gpio = GPIO_PIN_PB(15),
-+			.default_trigger = "heartbeat", },
-+	/* PB16, PB30 unused */
-+#endif
-+};
-+
-+static struct gpio_led_platform_data stk_j2_led_data = {
-+	.num_leds	= ARRAY_SIZE(stk_j2_led),
-+	.leds		= stk_j2_led,
-+};
-+
-+static struct platform_device stk_j2_led_dev = {
-+	.name		= "leds-gpio",
-+	.id		= 2,	/* gpio block J2 */
-+	.dev		= {
-+		.platform_data	= &stk_j2_led_data,
-+	},
-+};
++#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
++static void __init at73c213_set_clk(struct at73c213_board_info *info)
++{
++	struct clk *gclk;
++	struct clk *pll;
 +
-+static void setup_j2_leds(void)
- {
--#ifdef	SW2_DEFAULT
--	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
-+	unsigned	i;
++	gclk = clk_get(NULL, "gclk0");
++	if (IS_ERR(gclk))
++		goto err_gclk;
++	pll = clk_get(NULL, "pll0");
++	if (IS_ERR(pll))
++		goto err_pll;
 +
-+	for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++)
-+		at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT);
++	if (clk_set_parent(gclk, pll)) {
++		pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
++		goto err_set_clk;
++	}
 +
-+	printk("STK1002: " LEDSTRING "\n");
-+	platform_device_register(&stk_j2_led_dev);
-+}
++	at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
++	info->dac_clk = gclk;
 +
- #else
-+static void setup_j2_leds(void)
-+{
++err_set_clk:
++	clk_put(pll);
++err_pll:
++	clk_put(gclk);
++err_gclk:
++	return;
 +}
 +#endif
-+
-+void __init setup_board(void)
-+{
-+#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
- 	at32_map_usart(0, 1);	/* USART 0/B: /dev/ttyS1, IRDA */
-+#else
-+	at32_map_usart(1, 0);	/* USART 1/A: /dev/ttyS0, DB9 */
- #endif
- 	/* USART 2/unused: expansion connector */
- 	at32_map_usart(3, 2);	/* USART 3/C: /dev/ttyS2, DB9 */
-@@ -140,18 +212,40 @@
- 
- 	at32_add_system_devices();
- 
--#ifdef	SW2_DEFAULT
--	at32_add_device_usart(0);
--#else
-+#ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
- 	at32_add_device_usart(1);
-+#else
-+	at32_add_device_usart(0);
- #endif
- 	at32_add_device_usart(2);
- 
-+#ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
- 	set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
--
--	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+#endif
-+#ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
-+	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
-+#else
- 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
- 			     fbmem_start, fbmem_size);
 +#endif
 +
-+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
-+	at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
-+#endif
-+#ifdef CONFIG_BOARD_ATSTK1002_SPI1
-+	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
-+#endif
+ void __init setup_board(void)
+ {
+ #ifdef	CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
+@@ -235,18 +291,34 @@ static int __init atstk1002_init(void)
+ #ifdef CONFIG_BOARD_ATSTK1002_SPI1
+ 	at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
+ #endif
 +	at32_add_device_twi(0);
 +#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
 +	at32_add_device_mci(0, &mci0_data);
 +#endif
+ #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
+ 	set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
+ #else
+ 	at32_add_device_lcdc(0, &atstk1000_lcdc_data,
+ 			     fbmem_start, fbmem_size);
+ #endif
 +	at32_add_device_usba(0, NULL);
++#ifdef CONFIG_BOARD_ATSTK1002_ENABLE_AC97
++	at32_add_device_ac97c(0);
++#else
 +	at32_add_device_abdac(0);
++#endif
+ #ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
+ 	at32_add_device_ssc(0, ATMEL_SSC_TX);
+ #endif
+ 
+ 	setup_j2_leds();
+ 
 +#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM
-+	at32_add_device_ssc(0, ATMEL_SSC_TX);
++#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM
++	at73c213_set_clk(&at73c213_data);
++#endif
 +#endif
 +
-+	setup_j2_leds();
- 
  	return 0;
  }
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/boards/atstk1000/Kconfig linux-avr32.git/arch/avr32/boards/atstk1000/Kconfig
---- linux-2.6.22.1/arch/avr32/boards/atstk1000/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/boards/atstk1000/Kconfig	2007-07-12 13:59:49.000000000 +0200
-@@ -0,0 +1,79 @@
-+# STK1000 customization
-+
-+if BOARD_ATSTK1002
-+
-+config BOARD_ATSTK1002_CUSTOM
-+	bool "Non-default STK-1002 jumper settings"
-+	help
-+	  You will normally leave the jumpers on the CPU card at their
-+	  default settings.  If you need to use certain peripherals,
-+	  you will need to change some of those jumpers.
-+
-+if BOARD_ATSTK1002_CUSTOM
-+
-+config BOARD_ATSTK1002_SW1_CUSTOM
-+	bool "SW1: use SSC1 (not SPI0)"
-+	help
-+	  This also prevents using the external DAC as an audio interface,
-+	  and means you can't initialize the on-board QVGA display.
-+
-+config BOARD_ATSTK1002_SW2_CUSTOM
-+	bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)"
-+	help
-+	  If you change this you'll want an updated boot loader putting
-+	  the console on UART-C not UART-A.
-+
-+config BOARD_ATSTK1002_SW3_CUSTOM
-+	bool "SW3: use TIMER1 (not SSC0 and GCLK)"
-+	help
-+	  This also prevents using the external DAC as an audio interface.
-+
-+config BOARD_ATSTK1002_SW4_CUSTOM
-+	bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)"
-+	help
-+	  To use the camera interface you'll need a custom card (on the
-+	  PCI-format connector) connect a video sensor.
-+
-+config BOARD_ATSTK1002_SW5_CUSTOM
-+	bool "SW5: use MACB1 (not LCDC)"
-+
-+config BOARD_ATSTK1002_SW6_CUSTOM
-+	bool "SW6: more GPIOs (not MACB0)"
-+
-+endif	# custom
-+
-+config BOARD_ATSTK1002_SPI1
-+	bool "Configure SPI1 controller"
-+	depends on !BOARD_ATSTK1002_SW4_CUSTOM
-+	help
-+	  All the signals for the second SPI controller are available on
-+	  GPIO lines and accessed through the J1 jumper block.  Say "y"
-+	  here to configure that SPI controller.
-+
-+config BOARD_ATSTK1002_J2_LED
-+	bool
-+	default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB
-+
-+choice
-+	prompt "LEDs connected to J2:"
-+	depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM
-+	optional
-+	help
-+	  Select this if you have jumpered the J2 jumper block to the
-+	  LED0..LED7 amber leds, or to the RGB leds, using a ten-pin
-+	  IDC cable.  A default "heartbeat" trigger is provided, but
-+	  you can of course override this.
-+
-+config BOARD_ATSTK1002_J2_LED8
-+	bool "LED0..LED7"
-+	help
-+	  Select this if J2 is jumpered to LED0..LED7 amber leds.
-+
-+config BOARD_ATSTK1002_J2_RGB
-+	bool "RGB leds"
-+	help
-+	  Select this if J2 is jumpered to the RGB leds.
-+
-+endchoice
-+
-+endif	# stk 1002
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr32.git/arch/avr32/configs/atngw100_defconfig
---- linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/configs/atngw100_defconfig	2007-07-13 11:24:16.000000000 +0200
+ postcore_initcall(atstk1002_init);
+diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c
+index aac4300..3d0a102 100644
+--- a/arch/avr32/boards/atstk1000/flash.c
++++ b/arch/avr32/boards/atstk1000/flash.c
+@@ -15,7 +15,7 @@
+ 
+ #include <asm/arch/smc.h>
+ 
+-static struct smc_config flash_config __initdata = {
++static struct smc_timing flash_timing __initdata = {
+ 	.ncs_read_setup		= 0,
+ 	.nrd_setup		= 40,
+ 	.ncs_write_setup	= 0,
+@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = {
+ 
+ 	.read_cycle		= 120,
+ 	.write_cycle		= 120,
++};
+ 
++static struct smc_config flash_config __initdata = {
+ 	.bus_width		= 2,
+ 	.nrd_controlled		= 1,
+ 	.nwe_controlled		= 1,
+@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void)
+ {
+ 	int ret;
+ 
++	smc_set_timing(&flash_config, &flash_timing);
+ 	ret = smc_set_configuration(0, &flash_config);
+ 	if (ret < 0) {
+ 		printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n");
+diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig
+index b799a68..adce168 100644
+--- a/arch/avr32/configs/atngw100_defconfig
++++ b/arch/avr32/configs/atngw100_defconfig
 @@ -1,7 +1,7 @@
  #
  # Automatically generated make config: don't edit
@@ -383,7 +469,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  #
  CONFIG_AVR32=y
  CONFIG_GENERIC_GPIO=y
-@@ -114,6 +114,7 @@
+@@ -114,6 +114,7 @@ CONFIG_PLATFORM_AT32AP=y
  CONFIG_CPU_AT32AP7000=y
  # CONFIG_BOARD_ATSTK1000 is not set
  CONFIG_BOARD_ATNGW100=y
@@ -391,7 +477,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  CONFIG_LOADER_U_BOOT=y
  
  #
-@@ -122,6 +123,7 @@
+@@ -122,6 +123,7 @@ CONFIG_LOADER_U_BOOT=y
  # CONFIG_AP7000_32_BIT_SMC is not set
  CONFIG_AP7000_16_BIT_SMC=y
  # CONFIG_AP7000_8_BIT_SMC is not set
@@ -399,7 +485,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  CONFIG_LOAD_ADDRESS=0x10000000
  CONFIG_ENTRY_ADDRESS=0x90000000
  CONFIG_PHYS_OFFSET=0x10000000
-@@ -145,6 +147,7 @@
+@@ -145,6 +147,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
  # CONFIG_RESOURCES_64BIT is not set
  CONFIG_ZONE_DMA_FLAG=0
  # CONFIG_OWNERSHIP_TRACE is not set
@@ -407,7 +493,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_HZ_100 is not set
  CONFIG_HZ_250=y
  # CONFIG_HZ_300 is not set
-@@ -153,6 +156,27 @@
+@@ -153,6 +156,27 @@ CONFIG_HZ=250
  CONFIG_CMDLINE=""
  
  #
@@ -435,7 +521,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # Bus options
  #
  # CONFIG_ARCH_SUPPORTS_MSI is not set
-@@ -187,13 +211,8 @@
+@@ -187,13 +211,8 @@ CONFIG_NET_KEY=y
  # CONFIG_NET_KEY_MIGRATE is not set
  CONFIG_INET=y
  CONFIG_IP_MULTICAST=y
@@ -450,7 +536,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  CONFIG_IP_PNP=y
  CONFIG_IP_PNP_DHCP=y
  # CONFIG_IP_PNP_BOOTP is not set
-@@ -240,6 +259,7 @@
+@@ -240,6 +259,7 @@ CONFIG_IPV6_SIT=y
  # CONFIG_NETWORK_SECMARK is not set
  CONFIG_NETFILTER=y
  # CONFIG_NETFILTER_DEBUG is not set
@@ -458,7 +544,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  
  #
  # Core Netfilter Configuration
-@@ -284,6 +304,7 @@
+@@ -284,6 +304,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m
  CONFIG_NETFILTER_XT_MATCH_MARK=m
  CONFIG_NETFILTER_XT_MATCH_POLICY=m
  CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
@@ -466,7 +552,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
  CONFIG_NETFILTER_XT_MATCH_QUOTA=m
  CONFIG_NETFILTER_XT_MATCH_REALM=m
-@@ -359,13 +380,19 @@
+@@ -359,13 +380,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m
  CONFIG_IP6_NF_MANGLE=m
  CONFIG_IP6_NF_TARGET_HL=m
  CONFIG_IP6_NF_RAW=m
@@ -487,7 +573,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_LLC2 is not set
  # CONFIG_IPX is not set
  # CONFIG_ATALK is not set
-@@ -521,7 +548,6 @@
+@@ -521,7 +548,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
  #
  # Misc devices
  #
@@ -495,7 +581,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_IDE is not set
  
  #
-@@ -545,13 +571,26 @@
+@@ -545,13 +571,26 @@ CONFIG_NETDEVICES=y
  # CONFIG_BONDING is not set
  # CONFIG_EQUALIZER is not set
  CONFIG_TUN=m
@@ -524,7 +610,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  CONFIG_MACB=y
  # CONFIG_NETDEV_1000 is not set
  # CONFIG_NETDEV_10000 is not set
-@@ -625,7 +664,15 @@
+@@ -625,7 +664,15 @@ CONFIG_UNIX98_PTYS=y
  # IPMI
  #
  # CONFIG_IPMI_HANDLER is not set
@@ -541,7 +627,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_HW_RANDOM is not set
  # CONFIG_RTC is not set
  # CONFIG_GEN_RTC is not set
-@@ -636,7 +683,42 @@
+@@ -636,7 +683,42 @@ CONFIG_UNIX98_PTYS=y
  # TPM devices
  #
  # CONFIG_TCG_TPM is not set
@@ -585,7 +671,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  
  #
  # SPI support
-@@ -655,7 +737,7 @@
+@@ -655,7 +737,7 @@ CONFIG_SPI_ATMEL=y
  # SPI Protocol Masters
  #
  # CONFIG_SPI_AT25 is not set
@@ -594,7 +680,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  
  #
  # Dallas's 1-wire bus
-@@ -706,21 +788,59 @@
+@@ -706,8 +788,41 @@ CONFIG_SPI_ATMEL=y
  #
  # USB Gadget Support
  #
@@ -638,48 +724,43 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  
  #
  # LED devices
- #
--# CONFIG_NEW_LEDS is not set
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
+@@ -727,27 +842,62 @@ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_TIMER=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
  
- #
- # LED drivers
- #
-+CONFIG_LEDS_GPIO=y
++#
++# InfiniBand support
++#
  
  #
- # LED Triggers
+-# LED drivers
++# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
  #
-+CONFIG_LEDS_TRIGGERS=y
-+CONFIG_LEDS_TRIGGER_TIMER=y
-+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
  
  #
- # InfiniBand support
-@@ -733,7 +853,51 @@
- #
- # Real Time Clock
+-# LED Triggers
++# Real Time Clock
  #
--# CONFIG_RTC_CLASS is not set
 +CONFIG_RTC_LIB=y
 +CONFIG_RTC_CLASS=y
 +CONFIG_RTC_HCTOSYS=y
 +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
 +# CONFIG_RTC_DEBUG is not set
-+
-+#
+ 
+ #
+-# InfiniBand support
 +# RTC interfaces
-+#
+ #
 +CONFIG_RTC_INTF_SYSFS=y
 +CONFIG_RTC_INTF_PROC=y
 +CONFIG_RTC_INTF_DEV=y
 +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
 +# CONFIG_RTC_DRV_TEST is not set
-+
-+#
+ 
+ #
+-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
 +# I2C RTC drivers
-+#
+ #
 +# CONFIG_RTC_DRV_DS1307 is not set
 +# CONFIG_RTC_DRV_DS1672 is not set
 +# CONFIG_RTC_DRV_MAX6900 is not set
@@ -688,8 +769,9 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
 +# CONFIG_RTC_DRV_X1205 is not set
 +# CONFIG_RTC_DRV_PCF8563 is not set
 +# CONFIG_RTC_DRV_PCF8583 is not set
-+
-+#
+ 
+ #
+-# Real Time Clock
 +# SPI RTC drivers
 +#
 +# CONFIG_RTC_DRV_RS5C348 is not set
@@ -705,12 +787,13 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
 +
 +#
 +# on-CPU RTC drivers
-+#
+ #
+-# CONFIG_RTC_CLASS is not set
 +CONFIG_RTC_DRV_AT32AP700X=y
  
  #
  # DMA Engine support
-@@ -767,7 +931,8 @@
+@@ -781,7 +931,8 @@ CONFIG_JBD=y
  # CONFIG_OCFS2_FS is not set
  # CONFIG_MINIX_FS is not set
  # CONFIG_ROMFS_FS is not set
@@ -720,7 +803,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_QUOTA is not set
  # CONFIG_DNOTIFY is not set
  # CONFIG_AUTOFS_FS is not set
-@@ -922,7 +1087,7 @@
+@@ -936,7 +1087,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y
  CONFIG_ENABLE_MUST_CHECK=y
  CONFIG_MAGIC_SYSRQ=y
  # CONFIG_UNUSED_SYMBOLS is not set
@@ -729,20 +812,21 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atngw100_defconfig linux-avr
  # CONFIG_HEADERS_CHECK is not set
  CONFIG_DEBUG_KERNEL=y
  # CONFIG_DEBUG_SHIRQ is not set
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-avr32.git/arch/avr32/configs/atstk1002_defconfig
---- linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/configs/atstk1002_defconfig	2007-07-13 11:24:16.000000000 +0200
+diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig
+index 3b977fd..3708066 100644
+--- a/arch/avr32/configs/atstk1002_defconfig
++++ b/arch/avr32/configs/atstk1002_defconfig
 @@ -1,7 +1,7 @@
  #
  # Automatically generated make config: don't edit
 -# Linux kernel version: 2.6.22-rc5
 -# Sat Jun 23 15:32:08 2007
-+# Linux kernel version: 2.6.22.atmel.1
-+# Thu Jul 12 19:34:17 2007
++# Linux kernel version: 2.6.22.atmel.2
++# Thu Jul 19 13:46:47 2007
  #
  CONFIG_AVR32=y
  CONFIG_GENERIC_GPIO=y
-@@ -80,10 +80,10 @@
+@@ -80,10 +80,10 @@ CONFIG_BASE_SMALL=1
  #
  CONFIG_MODULES=y
  CONFIG_MODULE_UNLOAD=y
@@ -755,7 +839,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # Block layer
-@@ -99,12 +99,12 @@
+@@ -99,12 +99,12 @@ CONFIG_BLOCK=y
  CONFIG_IOSCHED_NOOP=y
  # CONFIG_IOSCHED_AS is not set
  # CONFIG_IOSCHED_DEADLINE is not set
@@ -772,7 +856,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # System Type and features
-@@ -117,6 +117,11 @@
+@@ -117,6 +117,11 @@ CONFIG_CPU_AT32AP7000=y
  CONFIG_BOARD_ATSTK1002=y
  CONFIG_BOARD_ATSTK1000=y
  # CONFIG_BOARD_ATNGW100 is not set
@@ -784,7 +868,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  CONFIG_LOADER_U_BOOT=y
  
  #
-@@ -125,6 +130,7 @@
+@@ -125,6 +130,7 @@ CONFIG_LOADER_U_BOOT=y
  # CONFIG_AP7000_32_BIT_SMC is not set
  CONFIG_AP7000_16_BIT_SMC=y
  # CONFIG_AP7000_8_BIT_SMC is not set
@@ -792,7 +876,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  CONFIG_LOAD_ADDRESS=0x10000000
  CONFIG_ENTRY_ADDRESS=0x90000000
  CONFIG_PHYS_OFFSET=0x10000000
-@@ -148,6 +154,7 @@
+@@ -148,6 +154,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
  # CONFIG_RESOURCES_64BIT is not set
  CONFIG_ZONE_DMA_FLAG=0
  # CONFIG_OWNERSHIP_TRACE is not set
@@ -800,7 +884,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # CONFIG_HZ_100 is not set
  CONFIG_HZ_250=y
  # CONFIG_HZ_300 is not set
-@@ -156,6 +163,27 @@
+@@ -156,6 +163,27 @@ CONFIG_HZ=250
  CONFIG_CMDLINE=""
  
  #
@@ -828,7 +912,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # Bus options
  #
  # CONFIG_ARCH_SUPPORTS_MSI is not set
-@@ -327,6 +355,8 @@
+@@ -327,6 +355,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
  #
  # Self-contained MTD device drivers
  #
@@ -837,15 +921,16 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # CONFIG_MTD_SLRAM is not set
  # CONFIG_MTD_PHRAM is not set
  # CONFIG_MTD_MTDRAM is not set
-@@ -373,7 +403,6 @@
+@@ -373,7 +403,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
  #
  # Misc devices
  #
 -# CONFIG_BLINK is not set
++CONFIG_ATMEL_SSC=m
  # CONFIG_IDE is not set
  
  #
-@@ -397,13 +426,26 @@
+@@ -397,13 +427,26 @@ CONFIG_DUMMY=y
  # CONFIG_BONDING is not set
  # CONFIG_EQUALIZER is not set
  CONFIG_TUN=m
@@ -874,7 +959,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  CONFIG_MACB=y
  # CONFIG_NETDEV_1000 is not set
  # CONFIG_NETDEV_10000 is not set
-@@ -443,7 +485,42 @@
+@@ -443,7 +486,42 @@ CONFIG_SLHC=m
  #
  # Input device support
  #
@@ -918,7 +1003,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # Hardware I/O ports
-@@ -477,7 +554,15 @@
+@@ -477,7 +555,15 @@ CONFIG_UNIX98_PTYS=y
  # IPMI
  #
  # CONFIG_IPMI_HANDLER is not set
@@ -935,7 +1020,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # CONFIG_HW_RANDOM is not set
  # CONFIG_RTC is not set
  # CONFIG_GEN_RTC is not set
-@@ -488,13 +573,61 @@
+@@ -488,13 +574,61 @@ CONFIG_UNIX98_PTYS=y
  # TPM devices
  #
  # CONFIG_TCG_TPM is not set
@@ -1000,7 +1085,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # Dallas's 1-wire bus
-@@ -517,14 +650,40 @@
+@@ -517,19 +651,91 @@ CONFIG_UNIX98_PTYS=y
  #
  # Graphics support
  #
@@ -1043,19 +1128,59 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # Sound
-@@ -532,6 +691,11 @@
- # CONFIG_SOUND is not set
- 
  #
-+# HID Devices
+-# CONFIG_SOUND is not set
++CONFIG_SOUND=m
++
 +#
-+# CONFIG_HID is not set
++# Advanced Linux Sound Architecture
++#
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++# CONFIG_SND_SUPPORT_OLD_API is not set
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
 +
 +#
- # USB support
++# Generic devices
++#
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++
++#
++# SPI devices
++#
++CONFIG_SND_AT73C213=m
++CONFIG_SND_AT73C213_TARGET_BITRATE=48000
++
++#
++# System on Chip audio support
++#
++# CONFIG_SND_SOC is not set
++
++#
++# Open Sound System
++#
++# CONFIG_SOUND_PRIME is not set
++
++#
++# HID Devices
++#
++# CONFIG_HID is not set
+ 
  #
- # CONFIG_USB_ARCH_HAS_HCD is not set
-@@ -545,21 +709,59 @@
+ # USB support
+@@ -545,21 +751,59 @@ CONFIG_UNIX98_PTYS=y
  #
  # USB Gadget Support
  #
@@ -1118,7 +1243,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # InfiniBand support
-@@ -572,7 +774,50 @@
+@@ -572,7 +816,50 @@ CONFIG_UNIX98_PTYS=y
  #
  # Real Time Clock
  #
@@ -1170,7 +1295,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # DMA Engine support
-@@ -590,11 +835,14 @@
+@@ -590,11 +877,14 @@ CONFIG_UNIX98_PTYS=y
  #
  # File systems
  #
@@ -1187,7 +1312,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # CONFIG_REISERFS_FS is not set
  # CONFIG_JFS_FS is not set
  # CONFIG_FS_POSIX_ACL is not set
-@@ -609,7 +857,7 @@
+@@ -609,7 +899,7 @@ CONFIG_INOTIFY_USER=y
  # CONFIG_DNOTIFY is not set
  # CONFIG_AUTOFS_FS is not set
  # CONFIG_AUTOFS4_FS is not set
@@ -1196,7 +1321,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # CD-ROM/DVD Filesystems
-@@ -638,7 +886,7 @@
+@@ -638,7 +928,7 @@ CONFIG_TMPFS=y
  # CONFIG_TMPFS_POSIX_ACL is not set
  # CONFIG_HUGETLB_PAGE is not set
  CONFIG_RAMFS=y
@@ -1205,7 +1330,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  
  #
  # Miscellaneous filesystems
-@@ -683,8 +931,14 @@
+@@ -683,8 +973,14 @@ CONFIG_SUNRPC=y
  # CONFIG_SUNRPC_BIND34 is not set
  # CONFIG_RPCSEC_GSS_KRB5 is not set
  # CONFIG_RPCSEC_GSS_SPKM3 is not set
@@ -1222,9 +1347,18 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/configs/atstk1002_defconfig linux-av
  # CONFIG_NCP_FS is not set
  # CONFIG_CODA_FS is not set
  # CONFIG_AFS_FS is not set
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c linux-avr32.git/arch/avr32/drivers/dw-dmac.c
---- linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/drivers/dw-dmac.c	2007-07-13 11:24:16.000000000 +0200
+diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile
+new file mode 100644
+index 0000000..b429b75
+--- /dev/null
++++ b/arch/avr32/drivers/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
+diff --git a/arch/avr32/drivers/dw-dmac.c b/arch/avr32/drivers/dw-dmac.c
+new file mode 100644
+index 0000000..224eb30
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.c
 @@ -0,0 +1,761 @@
 +/*
 + * Driver for the Synopsys DesignWare DMA Controller
@@ -1987,9 +2121,11 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/drivers/dw-dmac.c linux-avr32.git/ar
 +MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
 +MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h linux-avr32.git/arch/avr32/drivers/dw-dmac.h
---- linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/drivers/dw-dmac.h	2007-06-06 11:33:46.000000000 +0200
+diff --git a/arch/avr32/drivers/dw-dmac.h b/arch/avr32/drivers/dw-dmac.h
+new file mode 100644
+index 0000000..1f67921
+--- /dev/null
++++ b/arch/avr32/drivers/dw-dmac.h
 @@ -0,0 +1,42 @@
 +/*
 + * Driver for the Synopsys DesignWare DMA Controller
@@ -2033,70 +2169,27 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/drivers/dw-dmac.h linux-avr32.git/ar
 +#define DW_DMAC_CHAN_DSR	0x050
 +
 +#endif /* __AVR32_DW_DMAC_H__ */
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/drivers/Makefile linux-avr32.git/arch/avr32/drivers/Makefile
---- linux-2.6.22.1/arch/avr32/drivers/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/drivers/Makefile	2007-06-06 11:33:46.000000000 +0200
-@@ -0,0 +1 @@
-+obj-$(CONFIG_DW_DMAC)			+= dw-dmac.o
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/Kconfig linux-avr32.git/arch/avr32/Kconfig
---- linux-2.6.22.1/arch/avr32/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/Kconfig	2007-07-13 11:24:16.000000000 +0200
-@@ -113,6 +113,13 @@
- 	bool "ATNGW100 Network Gateway"
- endchoice
- 
-+if BOARD_ATSTK1000
-+source "arch/avr32/boards/atstk1000/Kconfig"
-+endif
-+if BOARD_ATNGW100
-+source "arch/avr32/boards/atngw100/Kconfig"
-+endif
-+
- choice
- 	prompt "Boot loader type"
- 	default LOADER_U_BOOT
-@@ -171,6 +178,10 @@
- 	  enabling Nexus-compliant debuggers to keep track of the PID of the
- 	  currently executing task.
- 
-+config DW_DMAC
-+	tristate "Synopsys DesignWare DMA Controller support"
-+	default y if CPU_AT32AP7000
-+
- # FPU emulation goes here
- 
- source "kernel/Kconfig.hz"
-@@ -185,6 +196,27 @@
- 
- endmenu
- 
-+menu "Power managment options"
-+
-+menu "CPU Frequency scaling"
-+
-+source "drivers/cpufreq/Kconfig"
-+
-+config CPU_FREQ_AT32AP
-+	bool "CPU frequency driver for AT32AP"
-+	depends on CPU_FREQ && PLATFORM_AT32AP
-+	default n
-+	help
-+	  This enables the CPU frequency driver for AT32AP processors.
-+
-+	  For details, take a look in <file:Documentation/cpu-freq>.
-+
-+	  If in doubt, say N.
-+
-+endmenu
-+
-+endmenu
-+
- menu "Bus options"
- 
- config PCI
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/kernel/dma-controller.c linux-avr32.git/arch/avr32/kernel/dma-controller.c
---- linux-2.6.22.1/arch/avr32/kernel/dma-controller.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/kernel/dma-controller.c	2007-06-06 11:33:46.000000000 +0200
+diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile
+index 90e5aff..1aedaeb 100644
+--- a/arch/avr32/kernel/Makefile
++++ b/arch/avr32/kernel/Makefile
+@@ -9,10 +9,6 @@ obj-y				+= syscall_table.o syscall-stubs.o irq.o
+ obj-y				+= setup.o traps.o semaphore.o ptrace.o
+ obj-y				+= signal.o sys_avr32.o process.o time.o
+ obj-y				+= init_task.o switch_to.o cpu.o
++obj-y				+= dma-controller.o
+ obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
+ obj-$(CONFIG_KPROBES)		+= kprobes.o
+-
+-USE_STANDARD_AS_RULE		:= true
+-
+-%.lds: %.lds.c FORCE
+-	$(call if_changed_dep,cpp_lds_S)
+diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c
+new file mode 100644
+index 0000000..fb654b3
+--- /dev/null
++++ b/arch/avr32/kernel/dma-controller.c
 @@ -0,0 +1,34 @@
 +/*
 + * Preliminary DMA controller framework for AVR32
@@ -2132,441 +2225,416 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/kernel/dma-controller.c linux-avr32.
 +	return NULL;
 +}
 +EXPORT_SYMBOL(find_dma_controller);
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/kernel/Makefile linux-avr32.git/arch/avr32/kernel/Makefile
---- linux-2.6.22.1/arch/avr32/kernel/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/kernel/Makefile	2007-06-06 11:33:46.000000000 +0200
-@@ -9,6 +9,7 @@
- obj-y				+= setup.o traps.o semaphore.o ptrace.o
- obj-y				+= signal.o sys_avr32.o process.o time.o
- obj-y				+= init_task.o switch_to.o cpu.o
-+obj-y				+= dma-controller.o
- obj-$(CONFIG_MODULES)		+= module.o avr32_ksyms.o
- obj-$(CONFIG_KPROBES)		+= kprobes.o
- 
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32.git/arch/avr32/mach-at32ap/at32ap7000.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/at32ap7000.c	2007-07-12 13:59:49.000000000 +0200
-@@ -17,14 +17,20 @@
- #include <asm/arch/at32ap7000.h>
- #include <asm/arch/board.h>
- #include <asm/arch/portmux.h>
--#include <asm/arch/sm.h>
- 
- #include <video/atmel_lcdc.h>
- 
- #include "clock.h"
- #include "hmatrix.h"
- #include "pio.h"
--#include "sm.h"
-+#include "pm.h"
+diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
+index 42657f1..ccadfd9 100644
+--- a/arch/avr32/kernel/entry-avr32b.S
++++ b/arch/avr32/kernel/entry-avr32b.S
+@@ -159,11 +159,18 @@ handle_vmalloc_miss:
+ 
+ 	.section .scall.text,"ax",@progbits
+ system_call:
++#ifdef CONFIG_PREEMPT
++	mask_interrupts
++#endif
+ 	pushm	r12		/* r12_orig */
+ 	stmts	--sp, r0-lr
+-	zero_fp
++
+ 	mfsr	r0, SYSREG_RAR_SUP
+ 	mfsr	r1, SYSREG_RSR_SUP
++#ifdef CONFIG_PREEMPT
++	unmask_interrupts
++#endif
++	zero_fp
+ 	stm	--sp, r0-r1
+ 
+ 	/* check for syscall tracing */
+@@ -638,6 +645,13 @@ irq_level\level:
+ 	stmts	--sp,r0-lr
+ 	mfsr	r8, rar_int\level
+ 	mfsr	r9, rsr_int\level
++
++#ifdef CONFIG_PREEMPT
++	sub	r11, pc, (. - system_call)
++	cp.w	r11, r8
++	breq	4f
++#endif
++
+ 	pushm	r8-r9
+ 
+ 	mov	r11, sp
+@@ -668,6 +682,16 @@ irq_level\level:
+ 	sub	sp, -4		/* ignore r12_orig */
+ 	rete
+ 
++#ifdef CONFIG_PREEMPT
++4:	mask_interrupts
++	mfsr	r8, rsr_int\level
++	sbr	r8, 16
++	mtsr	rsr_int\level, r8
++	ldmts	sp++, r0-lr
++	sub	sp, -4		/* ignore r12_orig */
++	rete
++#endif
 +
+ 2:	get_thread_info	r0
+ 	ld.w	r1, r0[TI_flags]
+ 	bld	r1, TIF_CPU_GOING_TO_SLEEP
+diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
+index d08b0bc..4b4c188 100644
+--- a/arch/avr32/kernel/setup.c
++++ b/arch/avr32/kernel/setup.c
+@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p)
+ 
+ 	fbmem_size = memparse(p, &p);
+ 	if (*p == '@') {
+-		fbmem_start = memparse(p, &p);
++		fbmem_start = memparse(p + 1, &p);
+ 		ret = add_reserved_region(fbmem_start,
+ 					  fbmem_start + fbmem_size - 1,
+ 					  "Framebuffer");
+diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S
+new file mode 100644
+index 0000000..ce9ac96
+--- /dev/null
++++ b/arch/avr32/kernel/vmlinux.lds.S
+@@ -0,0 +1,143 @@
 +/*
-+ * We can reduce the code size a bit by using a constant here. Since
-+ * this file is completely chip-specific, it's safe to not use
-+ * ioremap. Generic drivers should of course never do this.
++ * AVR32 linker script for the Linux kernel
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
 + */
-+#define AT32_PM_BASE	0xfff00000
- 
- #define PBMEM(base)					\
- 	{						\
-@@ -88,6 +94,8 @@
- 	.index		= _index,				\
- }
- 
-+static DEFINE_SPINLOCK(pm_lock);
-+
- unsigned long at32ap7000_osc_rates[3] = {
- 	[0] = 32768,
- 	/* FIXME: these are ATSTK1002-specific */
-@@ -104,11 +112,11 @@
- {
- 	unsigned long div, mul, rate;
- 
--	if (!(control & SM_BIT(PLLEN)))
-+	if (!(control & PM_BIT(PLLEN)))
- 		return 0;
- 
--	div = SM_BFEXT(PLLDIV, control) + 1;
--	mul = SM_BFEXT(PLLMUL, control) + 1;
-+	div = PM_BFEXT(PLLDIV, control) + 1;
-+	mul = PM_BFEXT(PLLMUL, control) + 1;
- 
- 	rate = clk->parent->get_rate(clk->parent);
- 	rate = (rate + div / 2) / div;
-@@ -121,7 +129,7 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_PLL0);
-+	control = pm_readl(PLL0);
- 
- 	return pll_get_rate(clk, control);
- }
-@@ -130,7 +138,7 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_PLL1);
-+	control = pm_readl(PLL1);
- 
- 	return pll_get_rate(clk, control);
- }
-@@ -187,108 +195,139 @@
- 
- static void cpu_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_CPU_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(CPU_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_CPU_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(CPU_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long cpu_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(CPUDIV))
--		shift = SM_BFEXT(CPUSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(CPUDIV))
-+		shift = PM_BFEXT(CPUSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
-+static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply)
-+{
-+	u32 control;
-+	unsigned long parent_rate, child_div, actual_rate, div;
++#define LOAD_OFFSET 0x00000000
++#include <asm-generic/vmlinux.lds.h>
++#include <asm/cache.h>
++#include <asm/thread_info.h>
++
++OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
++OUTPUT_ARCH(avr32)
++ENTRY(_start)
++
++/* Big endian */
++jiffies = jiffies_64 + 4;
++
++SECTIONS
++{
++	. = CONFIG_ENTRY_ADDRESS;
++	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
++		_stext = .;
++		__init_begin = .;
++			_sinittext = .;
++			*(.text.reset)
++			*(.init.text)
++			/*
++			 * .exit.text is discarded at runtime, not
++			 * link time, to deal with references from
++			 * __bug_table
++			 */
++			*(.exit.text)
++			_einittext = .;
++		. = ALIGN(4);
++		__tagtable_begin = .;
++			*(.taglist.init)
++		__tagtable_end = .;
++			*(.init.data)
++		. = ALIGN(16);
++		__setup_start = .;
++			*(.init.setup)
++		__setup_end = .;
++		. = ALIGN(4);
++		__initcall_start = .;
++			INITCALLS
++		__initcall_end = .;
++		__con_initcall_start = .;
++			*(.con_initcall.init)
++		__con_initcall_end = .;
++		__security_initcall_start = .;
++			*(.security_initcall.init)
++		__security_initcall_end = .;
++#ifdef CONFIG_BLK_DEV_INITRD
++		. = ALIGN(32);
++		__initramfs_start = .;
++			*(.init.ramfs)
++		__initramfs_end = .;
++#endif
++		. = ALIGN(PAGE_SIZE);
++		__init_end = .;
++	}
++
++	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
++		_evba = .;
++		_text = .;
++		*(.ex.text)
++		. = 0x50;
++		*(.tlbx.ex.text)
++		. = 0x60;
++		*(.tlbr.ex.text)
++		. = 0x70;
++		*(.tlbw.ex.text)
++		. = 0x100;
++		*(.scall.text)
++		*(.irq.text)
++		TEXT_TEXT
++		SCHED_TEXT
++		LOCK_TEXT
++		KPROBES_TEXT
++		*(.fixup)
++		*(.gnu.warning)
++		_etext = .;
++	} = 0xd703d703
++
++	. = ALIGN(4);
++	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
++		__start___ex_table = .;
++		*(__ex_table)
++		__stop___ex_table = .;
++	}
++
++	BUG_TABLE
++
++	RODATA
++
++	. = ALIGN(THREAD_SIZE);
++
++	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
++		_data = .;
++		_sdata = .;
++		/*
++		 * First, the init task union, aligned to an 8K boundary.
++		 */
++		*(.data.init_task)
 +
-+	parent_rate = clk->parent->get_rate(clk->parent);
-+	control = pm_readl(CKSEL);
++		/* Then, the cacheline aligned data */
++		. = ALIGN(L1_CACHE_BYTES);
++		*(.data.cacheline_aligned)
 +
-+	if (control & PM_BIT(HSBDIV))
-+		child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1);
-+	else
-+		child_div = 1;
++		/* And the rest... */
++		*(.data.rel*)
++		DATA_DATA
++		CONSTRUCTORS
 +
-+	if (rate > 3 * (parent_rate / 4) || child_div == 1) {
-+		actual_rate = parent_rate;
-+		control &= ~PM_BIT(CPUDIV);
-+	} else {
-+		unsigned int cpusel;
-+		div = (parent_rate + rate / 2) / rate;
-+		if (div > child_div)
-+			div = child_div;
-+		cpusel = (div > 1) ? (fls(div) - 2) : 0;
-+		control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control);
-+		actual_rate = parent_rate / (1 << (cpusel + 1));
++		_edata = .;
 +	}
 +
-+	pr_debug("clk %s: new rate %lu (actual rate %lu)\n",
-+			clk->name, rate, actual_rate);
 +
-+	if (apply)
-+		pm_writel(CKSEL, control);
++	. = ALIGN(8);
++	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
++		__bss_start = .;
++		*(.bss)
++		*(COMMON)
++		. = ALIGN(8);
++		__bss_stop = .;
++		_end = .;
++	}
 +
-+	return actual_rate;
-+}
++	/* When something in the kernel is NOT compiled as a module, the module
++	 * cleanup code and data are put into these segments. Both can then be
++	 * thrown away, as cleanup code is never called unless it's a module.
++	 */
++	/DISCARD/       	: {
++		*(.exit.data)
++		*(.exitcall.exit)
++	}
 +
- static void hsb_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_HSB_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(HSB_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_HSB_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(HSB_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long hsb_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(HSBDIV))
--		shift = SM_BFEXT(HSBSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(HSBDIV))
-+		shift = PM_BFEXT(HSBSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
- static void pba_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_PBA_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(PBA_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_PBA_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(PBA_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long pba_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(PBADIV))
--		shift = SM_BFEXT(PBASEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(PBADIV))
-+		shift = PM_BFEXT(PBASEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
- 
- static void pbb_clk_mode(struct clk *clk, int enabled)
- {
--	struct at32_sm *sm = &system_manager;
- 	unsigned long flags;
- 	u32 mask;
- 
--	spin_lock_irqsave(&sm->lock, flags);
--	mask = sm_readl(sm, PM_PBB_MASK);
-+	spin_lock_irqsave(&pm_lock, flags);
-+	mask = pm_readl(PBB_MASK);
- 	if (enabled)
- 		mask |= 1 << clk->index;
- 	else
- 		mask &= ~(1 << clk->index);
--	sm_writel(sm, PM_PBB_MASK, mask);
--	spin_unlock_irqrestore(&sm->lock, flags);
-+	pm_writel(PBB_MASK, mask);
-+	spin_unlock_irqrestore(&pm_lock, flags);
- }
- 
- static unsigned long pbb_clk_get_rate(struct clk *clk)
- {
- 	unsigned long cksel, shift = 0;
- 
--	cksel = sm_readl(&system_manager, PM_CKSEL);
--	if (cksel & SM_BIT(PBBDIV))
--		shift = SM_BFEXT(PBBSEL, cksel) + 1;
-+	cksel = pm_readl(CKSEL);
-+	if (cksel & PM_BIT(PBBDIV))
-+		shift = PM_BFEXT(PBBSEL, cksel) + 1;
- 
- 	return bus_clk_get_rate(clk, shift);
- }
-@@ -296,6 +335,7 @@
- static struct clk cpu_clk = {
- 	.name		= "cpu",
- 	.get_rate	= cpu_clk_get_rate,
-+	.set_rate	= cpu_clk_set_rate,
- 	.users		= 1,
- };
- static struct clk hsb_clk = {
-@@ -327,12 +367,12 @@
- {
- 	u32 control;
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 	if (enabled)
--		control |= SM_BIT(CEN);
-+		control |= PM_BIT(CEN);
- 	else
--		control &= ~SM_BIT(CEN);
--	sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control);
-+		control &= ~PM_BIT(CEN);
-+	pm_writel(GCCTRL(clk->index), control);
- }
- 
- static unsigned long genclk_get_rate(struct clk *clk)
-@@ -340,9 +380,9 @@
- 	u32 control;
- 	unsigned long div = 1;
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
--	if (control & SM_BIT(DIVEN))
--		div = 2 * (SM_BFEXT(DIV, control) + 1);
-+	control = pm_readl(GCCTRL(clk->index));
-+	if (control & PM_BIT(DIVEN))
-+		div = 2 * (PM_BFEXT(DIV, control) + 1);
- 
- 	return clk->parent->get_rate(clk->parent) / div;
- }
-@@ -353,23 +393,22 @@
- 	unsigned long parent_rate, actual_rate, div;
- 
- 	parent_rate = clk->parent->get_rate(clk->parent);
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 
- 	if (rate > 3 * parent_rate / 4) {
- 		actual_rate = parent_rate;
--		control &= ~SM_BIT(DIVEN);
-+		control &= ~PM_BIT(DIVEN);
- 	} else {
- 		div = (parent_rate + rate) / (2 * rate) - 1;
--		control = SM_BFINS(DIV, div, control) | SM_BIT(DIVEN);
-+		control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN);
- 		actual_rate = parent_rate / (2 * (div + 1));
- 	}
- 
--	printk("clk %s: new rate %lu (actual rate %lu)\n",
--	       clk->name, rate, actual_rate);
-+	dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n",
-+		clk->name, rate, actual_rate);
- 
- 	if (apply)
--		sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index,
--			  control);
-+		pm_writel(GCCTRL(clk->index), control);
- 
- 	return actual_rate;
- }
-@@ -378,24 +417,24 @@
- {
- 	u32 control;
- 
--	printk("clk %s: new parent %s (was %s)\n",
--	       clk->name, parent->name, clk->parent->name);
-+	dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n",
-+		clk->name, parent->name, clk->parent->name);
- 
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
-+	control = pm_readl(GCCTRL(clk->index));
- 
- 	if (parent == &osc1 || parent == &pll1)
--		control |= SM_BIT(OSCSEL);
-+		control |= PM_BIT(OSCSEL);
- 	else if (parent == &osc0 || parent == &pll0)
--		control &= ~SM_BIT(OSCSEL);
-+		control &= ~PM_BIT(OSCSEL);
- 	else
- 		return -EINVAL;
- 
- 	if (parent == &pll0 || parent == &pll1)
--		control |= SM_BIT(PLLSEL);
-+		control |= PM_BIT(PLLSEL);
- 	else
--		control &= ~SM_BIT(PLLSEL);
-+		control &= ~PM_BIT(PLLSEL);
++	DWARF_DEBUG
++}
+diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
+deleted file mode 100644
+index db0438f..0000000
+--- a/arch/avr32/kernel/vmlinux.lds.c
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * AVR32 linker script for the Linux kernel
+- *
+- * Copyright (C) 2004-2006 Atmel Corporation
+- *
+- * This program is free software; you can redistribute it and/or modify
+- * it under the terms of the GNU General Public License version 2 as
+- * published by the Free Software Foundation.
+- */
+-#define LOAD_OFFSET 0x00000000
+-#include <asm-generic/vmlinux.lds.h>
+-
+-OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
+-OUTPUT_ARCH(avr32)
+-ENTRY(_start)
+-
+-/* Big endian */
+-jiffies = jiffies_64 + 4;
+-
+-SECTIONS
+-{
+-	. = CONFIG_ENTRY_ADDRESS;
+-	.init		: AT(ADDR(.init) - LOAD_OFFSET) {
+-		_stext = .;
+-		__init_begin = .;
+-			_sinittext = .;
+-			*(.text.reset)
+-			*(.init.text)
+-			/*
+-			 * .exit.text is discarded at runtime, not
+-			 * link time, to deal with references from
+-			 * __bug_table
+-			 */
+-			*(.exit.text)
+-			_einittext = .;
+-		. = ALIGN(4);
+-		__tagtable_begin = .;
+-			*(.taglist.init)
+-		__tagtable_end = .;
+-			*(.init.data)
+-		. = ALIGN(16);
+-		__setup_start = .;
+-			*(.init.setup)
+-		__setup_end = .;
+-		. = ALIGN(4);
+-		__initcall_start = .;
+-			INITCALLS
+-		__initcall_end = .;
+-		__con_initcall_start = .;
+-			*(.con_initcall.init)
+-		__con_initcall_end = .;
+-		__security_initcall_start = .;
+-			*(.security_initcall.init)
+-		__security_initcall_end = .;
+-#ifdef CONFIG_BLK_DEV_INITRD
+-		. = ALIGN(32);
+-		__initramfs_start = .;
+-			*(.init.ramfs)
+-		__initramfs_end = .;
+-#endif
+-		. = ALIGN(4096);
+-		__init_end = .;
+-	}
+-
+-	. = ALIGN(8192);
+-	.text		: AT(ADDR(.text) - LOAD_OFFSET) {
+-		_evba = .;
+-		_text = .;
+-		*(.ex.text)
+-		. = 0x50;
+-		*(.tlbx.ex.text)
+-		. = 0x60;
+-		*(.tlbr.ex.text)
+-		. = 0x70;
+-		*(.tlbw.ex.text)
+-		. = 0x100;
+-		*(.scall.text)
+-		*(.irq.text)
+-		TEXT_TEXT
+-		SCHED_TEXT
+-		LOCK_TEXT
+-		KPROBES_TEXT
+-		*(.fixup)
+-		*(.gnu.warning)
+-		_etext = .;
+-	} = 0xd703d703
+-
+-	. = ALIGN(4);
+-	__ex_table	: AT(ADDR(__ex_table) - LOAD_OFFSET) {
+-		__start___ex_table = .;
+-		*(__ex_table)
+-		__stop___ex_table = .;
+-	}
+-
+-	BUG_TABLE
+-
+-	RODATA
+-
+-	. = ALIGN(8192);
+-
+-	.data		: AT(ADDR(.data) - LOAD_OFFSET) {
+-		_data = .;
+-		_sdata = .;
+-		/*
+-		 * First, the init task union, aligned to an 8K boundary.
+-		 */
+-		*(.data.init_task)
+-
+-		/* Then, the cacheline aligned data */
+-		. = ALIGN(32);
+-		*(.data.cacheline_aligned)
+-
+-		/* And the rest... */
+-		*(.data.rel*)
+-		DATA_DATA
+-		CONSTRUCTORS
+-
+-		_edata = .;
+-	}
+-
+-
+-	. = ALIGN(8);
+-	.bss    	: AT(ADDR(.bss) - LOAD_OFFSET) {
+-		__bss_start = .;
+-		*(.bss)
+-		*(COMMON)
+-		. = ALIGN(8);
+-		__bss_stop = .;
+-		_end = .;
+-	}
+-
+-	/* When something in the kernel is NOT compiled as a module, the module
+-	 * cleanup code and data are put into these segments. Both can then be
+-	 * thrown away, as cleanup code is never called unless it's a module.
+-	 */
+-	/DISCARD/       	: {
+-		*(.exit.data)
+-		*(.exitcall.exit)
+-	}
+-
+-	DWARF_DEBUG
+-}
+diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig
+index eb30783..43c5b9f 100644
+--- a/arch/avr32/mach-at32ap/Kconfig
++++ b/arch/avr32/mach-at32ap/Kconfig
+@@ -26,6 +26,13 @@ config AP7000_8_BIT_SMC
  
--	sm_writel(&system_manager, PM_GCCTRL + 4 * clk->index, control);
-+	pm_writel(GCCTRL(clk->index), control);
- 	clk->parent = parent;
+ endchoice
  
- 	return 0;
-@@ -408,11 +447,11 @@
++config GPIO_DEV
++	bool "GPIO /dev interface"
++	select CONFIGFS_FS
++	default n
++	help
++	  Say `Y' to enable a /dev interface to the GPIO pins.
++
+ endmenu
  
- 	BUG_ON(clk->index > 7);
+ endif # PLATFORM_AT32AP
+diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
+index a8b4450..250372a 100644
+--- a/arch/avr32/mach-at32ap/Makefile
++++ b/arch/avr32/mach-at32ap/Makefile
+@@ -2,3 +2,4 @@ obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
+ obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
+ obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
+ obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
++obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
+diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
+index 64cc558..8375f89 100644
+--- a/arch/avr32/mach-at32ap/at32ap7000.c
++++ b/arch/avr32/mach-at32ap/at32ap7000.c
+@@ -25,12 +25,6 @@
+ #include "pio.h"
+ #include "pm.h"
  
--	control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
--	if (control & SM_BIT(OSCSEL))
--		parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1;
-+	control = pm_readl(GCCTRL(clk->index));
-+	if (control & PM_BIT(OSCSEL))
-+		parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
- 	else
--		parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0;
-+		parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0;
+-/*
+- * We can reduce the code size a bit by using a constant here. Since
+- * this file is completely chip-specific, it's safe to not use
+- * ioremap. Generic drivers should of course never do this.
+- */
+-#define AT32_PM_BASE	0xfff00000
  
- 	clk->parent = parent;
- }
-@@ -420,21 +459,53 @@
- /* --------------------------------------------------------------------
-  *  System peripherals
-  * -------------------------------------------------------------------- */
--static struct resource sm_resource[] = {
--	PBMEM(0xfff00000),
--	NAMED_IRQ(19, "eim"),
--	NAMED_IRQ(20, "pm"),
--	NAMED_IRQ(21, "rtc"),
-+static struct resource at32_pm0_resource[] = {
-+	{
-+		.start	= 0xfff00000,
-+		.end	= 0xfff0007f,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(20),
- };
--struct platform_device at32_sm_device = {
--	.name		= "sm",
--	.id		= 0,
--	.resource	= sm_resource,
--	.num_resources	= ARRAY_SIZE(sm_resource),
-+
-+static struct resource at32ap700x_rtc0_resource[] = {
-+	{
-+		.start	= 0xfff00080,
-+		.end	= 0xfff000af,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(21),
-+};
-+
-+static struct resource at32_wdt0_resource[] = {
-+	{
-+		.start	= 0xfff000b0,
-+		.end	= 0xfff000bf,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct resource at32_eic0_resource[] = {
-+	{
-+		.start	= 0xfff00100,
-+		.end	= 0xfff0013f,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	IRQ(19),
- };
--static struct clk at32_sm_pclk = {
-+
-+DEFINE_DEV(at32_pm, 0);
-+DEFINE_DEV(at32ap700x_rtc, 0);
-+DEFINE_DEV(at32_wdt, 0);
-+DEFINE_DEV(at32_eic, 0);
-+
-+/*
-+ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this
-+ * is always running.
-+ */
-+static struct clk at32_pm_pclk = {
- 	.name		= "pclk",
--	.dev		= &at32_sm_device.dev,
-+	.dev		= &at32_pm0_device.dev,
- 	.parent		= &pbb_clk,
- 	.mode		= pbb_clk_mode,
- 	.get_rate	= pbb_clk_get_rate,
-@@ -491,6 +562,17 @@
+ #define PBMEM(base)					\
+ 	{						\
+@@ -562,6 +556,17 @@ static struct clk pico_clk = {
  	.users		= 1,
  };
  
@@ -2584,25 +2652,15 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
  /* --------------------------------------------------------------------
   * HMATRIX
   * -------------------------------------------------------------------- */
-@@ -583,12 +665,14 @@
- 
- void __init at32_add_system_devices(void)
- {
--	system_manager.eim_first_irq = EIM_IRQ_BASE;
--
--	platform_device_register(&at32_sm_device);
-+	platform_device_register(&at32_pm0_device);
- 	platform_device_register(&at32_intc0_device);
-+	platform_device_register(&at32ap700x_rtc0_device);
-+	platform_device_register(&at32_wdt0_device);
-+	platform_device_register(&at32_eic0_device);
+@@ -661,6 +666,7 @@ void __init at32_add_system_devices(void)
+ 	platform_device_register(&at32_eic0_device);
  	platform_device_register(&smc0_device);
  	platform_device_register(&pdc_device);
 +	platform_device_register(&dmaca0_device);
  
  	platform_device_register(&at32_systc0_device);
  
-@@ -894,6 +978,83 @@
+@@ -966,6 +972,83 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
  }
  
  /* --------------------------------------------------------------------
@@ -2686,7 +2744,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
   *  LCDC
   * -------------------------------------------------------------------- */
  static struct atmel_lcdfb_info atmel_lcdfb0_data;
-@@ -1013,6 +1174,228 @@
+@@ -1168,6 +1251,143 @@ at32_add_device_ssc(unsigned int id, unsigned int flags)
  }
  
  /* --------------------------------------------------------------------
@@ -2694,12 +2752,10 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
 + * -------------------------------------------------------------------- */
 +static struct resource usba0_resource[] __initdata = {
 +	{
-+		.name		= "fifo",
 +		.start		= 0xff300000,
 +		.end		= 0xff3fffff,
 +		.flags		= IORESOURCE_MEM,
 +	}, {
-+		.name		= "regs",
 +		.start		= 0xfff03000,
 +		.end		= 0xfff033ff,
 +		.flags		= IORESOURCE_MEM,
@@ -2758,89 +2814,6 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
 +}
 +
 +/* --------------------------------------------------------------------
-+ *  SSC
-+ * -------------------------------------------------------------------- */
-+static struct resource ssc0_resource[] = {
-+	PBMEM(0xffe01c00),
-+	IRQ(10),
-+};
-+DEFINE_DEV(ssc, 0);
-+DEV_CLK(pclk, ssc0, pba, 7);
-+
-+static struct resource ssc1_resource[] = {
-+	PBMEM(0xffe02000),
-+	IRQ(11),
-+};
-+DEFINE_DEV(ssc, 1);
-+DEV_CLK(pclk, ssc1, pba, 8);
-+
-+static struct resource ssc2_resource[] = {
-+	PBMEM(0xffe02400),
-+	IRQ(12),
-+};
-+DEFINE_DEV(ssc, 2);
-+DEV_CLK(pclk, ssc2, pba, 9);
-+
-+struct platform_device *__init
-+at32_add_device_ssc(unsigned int id, unsigned int flags)
-+{
-+	struct platform_device *pdev;
-+
-+	switch (id) {
-+	case 0:
-+		pdev = &ssc0_device;
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PA(21), PERIPH_A, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PA(22), PERIPH_A, 0);	/* RK */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PA(23), PERIPH_A, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PA(24), PERIPH_A, 0);	/* TF */
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PA(25), PERIPH_A, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PA(26), PERIPH_A, 0);	/* RD */
-+		break;
-+	case 1:
-+		pdev = &ssc1_device;
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PA(0), PERIPH_B, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PA(1), PERIPH_B, 0);	/* RK */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PA(2), PERIPH_B, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PA(3), PERIPH_B, 0);	/* TF */
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PA(4), PERIPH_B, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PA(5), PERIPH_B, 0);	/* RD */
-+		break;
-+	case 2:
-+		pdev = &ssc2_device;
-+		if (flags & ATMEL_SSC_TD)
-+			select_peripheral(PB(13), PERIPH_A, 0);	/* TD */
-+		if (flags & ATMEL_SSC_RD)
-+			select_peripheral(PB(14), PERIPH_A, 0);	/* RD */
-+		if (flags & ATMEL_SSC_TK)
-+			select_peripheral(PB(15), PERIPH_A, 0);	/* TK */
-+		if (flags & ATMEL_SSC_TF)
-+			select_peripheral(PB(16), PERIPH_A, 0);	/* TF */
-+		if (flags & ATMEL_SSC_RF)
-+			select_peripheral(PB(17), PERIPH_A, 0);	/* RF */
-+		if (flags & ATMEL_SSC_RK)
-+			select_peripheral(PB(18), PERIPH_A, 0);	/* RK */
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	platform_device_register(pdev);
-+	return pdev;
-+}
-+
-+/* --------------------------------------------------------------------
 + *  AC97C
 + * -------------------------------------------------------------------- */
 +static struct resource atmel_ac97c0_resource[] = {
@@ -2915,16 +2888,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
   *  GCLK
   * -------------------------------------------------------------------- */
  static struct clk gclk0 = {
-@@ -1066,7 +1449,7 @@
- 	&hsb_clk,
- 	&pba_clk,
- 	&pbb_clk,
--	&at32_sm_pclk,
-+	&at32_pm_pclk,
- 	&at32_intc0_pclk,
- 	&hmatrix_clk,
- 	&ebi_clk,
-@@ -1075,6 +1458,7 @@
+@@ -1230,6 +1450,7 @@ struct clk *at32_clock_list[] = {
  	&smc0_mck,
  	&pdc_hclk,
  	&pdc_pclk,
@@ -2932,7 +2896,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
  	&pico_clk,
  	&pio0_mck,
  	&pio1_mck,
-@@ -1092,8 +1476,18 @@
+@@ -1247,11 +1468,18 @@ struct clk *at32_clock_list[] = {
  	&macb1_pclk,
  	&atmel_spi0_spi_clk,
  	&atmel_spi1_spi_clk,
@@ -2940,44 +2904,18 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
 +	&atmel_mci0_mci_clk,
  	&atmel_lcdfb0_hck1,
  	&atmel_lcdfb0_pixclk,
-+	&usba0_pclk,
+ 	&ssc0_pclk,
+ 	&ssc1_pclk,
+ 	&ssc2_pclk,
 +	&usba0_hclk,
-+	&ssc0_pclk,
-+	&ssc1_pclk,
-+	&ssc2_pclk,
++	&usba0_pclk,
 +	&atmel_ac97c0_pclk,
 +	&abdac0_pclk,
 +	&abdac0_sample_clk,
  	&gclk0,
  	&gclk1,
  	&gclk2,
-@@ -1113,18 +1507,20 @@
- 
- void __init at32_clock_init(void)
- {
--	struct at32_sm *sm = &system_manager;
- 	u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
- 	int i;
- 
--	if (sm_readl(sm, PM_MCCTRL) & SM_BIT(PLLSEL))
-+	if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) {
- 		main_clock = &pll0;
--	else
-+		cpu_clk.parent = &pll0;
-+	} else {
- 		main_clock = &osc0;
-+		cpu_clk.parent = &osc0;
-+	}
- 
--	if (sm_readl(sm, PM_PLL0) & SM_BIT(PLLOSC))
-+	if (pm_readl(PLL0) & PM_BIT(PLLOSC))
- 		pll0.parent = &osc1;
--	if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC))
-+	if (pm_readl(PLL1) & PM_BIT(PLLOSC))
- 		pll1.parent = &osc1;
- 
- 	genclk_init_parent(&gclk0);
-@@ -1133,6 +1529,7 @@
+@@ -1293,6 +1521,7 @@ void __init at32_clock_init(void)
  	genclk_init_parent(&gclk3);
  	genclk_init_parent(&gclk4);
  	genclk_init_parent(&atmel_lcdfb0_pixclk);
@@ -2985,476 +2923,136 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap7000.c linux-avr32
  
  	/*
  	 * Turn on all clocks that have at least one user already, and
-@@ -1157,8 +1554,8 @@
- 			pbb_mask |= 1 << clk->index;
- 	}
- 
--	sm_writel(sm, PM_CPU_MASK, cpu_mask);
--	sm_writel(sm, PM_HSB_MASK, hsb_mask);
--	sm_writel(sm, PM_PBA_MASK, pba_mask);
--	sm_writel(sm, PM_PBB_MASK, pbb_mask);
-+	pm_writel(CPU_MASK, cpu_mask);
-+	pm_writel(HSB_MASK, hsb_mask);
-+	pm_writel(PBA_MASK, pba_mask);
-+	pm_writel(PBB_MASK, pbb_mask);
- }
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap.c linux-avr32.git/arch/avr32/mach-at32ap/at32ap.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/at32ap.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/at32ap.c	2007-07-12 13:59:49.000000000 +0200
-@@ -11,41 +11,10 @@
- #include <linux/init.h>
- #include <linux/platform_device.h>
- 
--#include <asm/io.h>
--
- #include <asm/arch/init.h>
--#include <asm/arch/sm.h>
--
--struct at32_sm system_manager;
--
--static int __init at32_sm_init(void)
--{
--	struct resource *regs;
--	struct at32_sm *sm = &system_manager;
--	int ret = -ENXIO;
--
--	regs = platform_get_resource(&at32_sm_device, IORESOURCE_MEM, 0);
--	if (!regs)
--		goto fail;
--
--	spin_lock_init(&sm->lock);
--	sm->pdev = &at32_sm_device;
--
--	ret = -ENOMEM;
--	sm->regs = ioremap(regs->start, regs->end - regs->start + 1);
--	if (!sm->regs)
--		goto fail;
--
--	return 0;
--
--fail:
--	printk(KERN_ERR "Failed to initialize System Manager: %d\n", ret);
--	return ret;
--}
- 
- void __init setup_platform(void)
- {
--	at32_sm_init();
- 	at32_clock_init();
- 	at32_portmux_init();
+diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
+index 0f8c89c..4642117 100644
+--- a/arch/avr32/mach-at32ap/clock.c
++++ b/arch/avr32/mach-at32ap/clock.c
+@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk)
+ 	return clk->parent;
  }
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/cpufreq.c linux-avr32.git/arch/avr32/mach-at32ap/cpufreq.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/cpufreq.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/mach-at32ap/cpufreq.c	2007-07-12 13:59:49.000000000 +0200
-@@ -0,0 +1,112 @@
-+/*
-+ * Copyright (C) 2004-2007 Atmel Corporation
-+ *
-+ * Based on MIPS implementation arch/mips/kernel/time.c
-+ *   Copyright 2001 MontaVista Software Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/*#define DEBUG*/
-+
-+#include <linux/kernel.h>
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/cpufreq.h>
-+#include <linux/io.h>
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <asm/system.h>
-+
-+static struct clk *cpuclk;
-+
-+static int at32_verify_speed(struct cpufreq_policy *policy)
-+{
-+	if (policy->cpu != 0)
-+		return -EINVAL;
-+
-+	cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-+			policy->cpuinfo.max_freq);
-+	return 0;
-+}
-+
-+static unsigned int at32_get_speed(unsigned int cpu)
-+{
-+	/* No SMP support */
-+	if (cpu)
-+		return 0;
-+	return (unsigned int)((clk_get_rate(cpuclk) + 500) / 1000);
-+}
+ EXPORT_SYMBOL(clk_get_parent);
 +
-+static int at32_set_target(struct cpufreq_policy *policy,
-+			  unsigned int target_freq,
-+			  unsigned int relation)
-+{
-+	struct cpufreq_freqs freqs;
-+	long freq;
 +
-+	/* Convert target_freq from kHz to Hz */
-+	freq = clk_round_rate(cpuclk, target_freq * 1000);
 +
-+	/* Check if policy->min <= new_freq <= policy->max */
-+	if(freq < (policy->min * 1000) || freq > (policy->max * 1000))
-+		return -EINVAL;
++#ifdef CONFIG_DEBUG_FS
 +
-+	pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000);
++/* /sys/kernel/debug/at32ap_clk */
 +
-+	freqs.old = at32_get_speed(0);
-+	freqs.new = (freq + 500) / 1000;
-+	freqs.cpu = 0;
-+	freqs.flags = 0;
++#include <linux/io.h>
++#include <linux/debugfs.h>
++#include <linux/seq_file.h>
++#include "pm.h"
 +
-+	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-+	clk_set_rate(cpuclk, freq);
-+	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 +
-+	pr_debug("cpufreq: set frequency %lu Hz\n", freq);
++#define	NEST_DELTA	2
++#define	NEST_MAX	6
 +
-+	return 0;
-+}
++struct clkinf {
++	struct seq_file	*s;
++	unsigned	nest;
++};
 +
-+static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy)
++static void
++dump_clock(struct clk *parent, struct clkinf *r)
 +{
-+	if (policy->cpu != 0)
-+		return -EINVAL;
++	unsigned	nest = r->nest;
++	char		buf[16 + NEST_MAX];
++	struct clk	*clk;
++	unsigned	i;
++
++	/* skip clocks coupled to devices that aren't registered */
++	if (parent->dev && !parent->dev->bus_id[0] && !parent->users)
++		return;
 +
-+	cpuclk = clk_get(NULL, "cpu");
-+	if (IS_ERR(cpuclk)) {
-+		pr_debug("cpufreq: could not get CPU clk\n");
-+		return PTR_ERR(cpuclk);
++	/* <nest spaces> name <pad to end> */
++	memset(buf, ' ', sizeof(buf) - 1);
++	buf[sizeof(buf) - 1] = 0;
++	i = strlen(parent->name);
++	memcpy(buf + nest, parent->name,
++			min(i, (unsigned)(sizeof(buf) - 1 - nest)));
++
++	seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz",
++		buf, parent->set_parent ? '*' : ' ',
++		parent->users,
++		parent->users ? "on" : "off",	/* NOTE: not-paranoid!! */
++		clk_get_rate(parent));
++	if (parent->dev)
++		seq_printf(r->s, ", for %s", parent->dev->bus_id);
++	seq_printf(r->s, "\n");
++
++	/* cost of this scan is small, but not linear... */
++	r->nest = nest + NEST_DELTA;
++	for (i = 3; i < at32_nr_clocks; i++) {
++		clk = at32_clock_list[i];
++		if (clk->parent == parent)
++			dump_clock(clk, r);
++	}
++	r->nest = nest;
++}
++
++static int clk_show(struct seq_file *s, void *unused)
++{
++	struct clkinf	r;
++	int		i;
++
++	/* show all the power manager registers */
++	seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
++	seq_printf(s, "CKSEL   = %8x\n", pm_readl(CKSEL));
++	seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK));
++	seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK));
++	seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK));
++	seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK));
++	seq_printf(s, "PLL0    = %8x\n", pm_readl(PLL0));
++	seq_printf(s, "PLL1    = %8x\n", pm_readl(PLL1));
++	seq_printf(s, "IMR     = %8x\n", pm_readl(IMR));
++	for (i = 0; i < 8; i++) {
++		if (i == 5)
++			continue;
++		seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i)));
 +	}
 +
-+	policy->cpuinfo.min_freq = (clk_round_rate(cpuclk, 1) + 500) / 1000;
-+	policy->cpuinfo.max_freq = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000;
-+	policy->cpuinfo.transition_latency = 0;
-+	policy->cur = at32_get_speed(0);
-+	policy->min = policy->cpuinfo.min_freq;
-+	policy->max = policy->cpuinfo.max_freq;
-+	policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
++	seq_printf(s, "\n");
 +
-+	printk("cpufreq: AT32AP CPU frequency driver\n");
++	/* show clock tree as derived from the three oscillators
++	 * we "know" are at the head of the list
++	 */
++	r.s = s;
++	r.nest = 0;
++	dump_clock(at32_clock_list[0], &r);
++	dump_clock(at32_clock_list[1], &r);
++	dump_clock(at32_clock_list[2], &r);
 +
 +	return 0;
 +}
 +
-+static struct cpufreq_driver at32_driver = {
-+	.name		= "at32ap",
-+	.owner		= THIS_MODULE,
-+	.init		= at32_cpufreq_driver_init,
-+	.verify		= at32_verify_speed,
-+	.target		= at32_set_target,
-+	.get		= at32_get_speed,
-+	.flags		= CPUFREQ_STICKY,
-+};
-+
-+static int __init at32_cpufreq_init(void)
++static int clk_open(struct inode *inode, struct file *file)
 +{
-+	return cpufreq_register_driver(&at32_driver);
++	return single_open(file, clk_show, NULL);
 +}
 +
-+arch_initcall(at32_cpufreq_init);
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/extint.c linux-avr32.git/arch/avr32/mach-at32ap/extint.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/extint.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/extint.c	2007-07-12 13:59:49.000000000 +0200
-@@ -17,42 +17,83 @@
- 
- #include <asm/io.h>
- 
--#include <asm/arch/sm.h>
--
--#include "sm.h"
-+/* EIC register offsets */
-+#define EIC_IER					0x0000
-+#define EIC_IDR					0x0004
-+#define EIC_IMR					0x0008
-+#define EIC_ISR					0x000c
-+#define EIC_ICR					0x0010
-+#define EIC_MODE				0x0014
-+#define EIC_EDGE				0x0018
-+#define EIC_LEVEL				0x001c
-+#define EIC_TEST				0x0020
-+#define EIC_NMIC				0x0024
-+
-+/* Bitfields in TEST */
-+#define EIC_TESTEN_OFFSET			31
-+#define EIC_TESTEN_SIZE				1
-+
-+/* Bitfields in NMIC */
-+#define EIC_EN_OFFSET				0
-+#define EIC_EN_SIZE				1
-+
-+/* Bit manipulation macros */
-+#define EIC_BIT(name)					\
-+	(1 << EIC_##name##_OFFSET)
-+#define EIC_BF(name,value)				\
-+	(((value) & ((1 << EIC_##name##_SIZE) - 1))	\
-+	 << EIC_##name##_OFFSET)
-+#define EIC_BFEXT(name,value)				\
-+	(((value) >> EIC_##name##_OFFSET)		\
-+	 & ((1 << EIC_##name##_SIZE) - 1))
-+#define EIC_BFINS(name,value,old)			\
-+	(((old) & ~(((1 << EIC_##name##_SIZE) - 1)	\
-+		    << EIC_##name##_OFFSET))		\
-+	 | EIC_BF(name,value))
-+
-+/* Register access macros */
-+#define eic_readl(port,reg)				\
-+	__raw_readl((port)->regs + EIC_##reg)
-+#define eic_writel(port,reg,value)			\
-+	__raw_writel((value), (port)->regs + EIC_##reg)
-+
-+struct eic {
-+	void __iomem *regs;
-+	struct irq_chip *chip;
-+	unsigned int first_irq;
++static const struct file_operations clk_operations = {
++	.open		= clk_open,
++	.read		= seq_read,
++	.llseek		= seq_lseek,
++	.release	= single_release,
 +};
- 
--static void eim_ack_irq(unsigned int irq)
-+static void eic_ack_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_mask_irq(unsigned int irq)
-+static void eic_mask_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_mask_ack_irq(unsigned int irq)
-+static void eic_mask_ack_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_ICR, 1 << (irq - sm->eim_first_irq));
--	sm_writel(sm, EIM_IDR, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, ICR, 1 << (irq - eic->first_irq));
-+	eic_writel(eic, IDR, 1 << (irq - eic->first_irq));
- }
- 
--static void eim_unmask_irq(unsigned int irq)
-+static void eic_unmask_irq(unsigned int irq)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
--	sm_writel(sm, EIM_IER, 1 << (irq - sm->eim_first_irq));
-+	struct eic *eic = get_irq_chip_data(irq);
-+	eic_writel(eic, IER, 1 << (irq - eic->first_irq));
- }
- 
--static int eim_set_irq_type(unsigned int irq, unsigned int flow_type)
-+static int eic_set_irq_type(unsigned int irq, unsigned int flow_type)
- {
--	struct at32_sm *sm = get_irq_chip_data(irq);
-+	struct eic *eic = get_irq_chip_data(irq);
- 	struct irq_desc *desc;
--	unsigned int i = irq - sm->eim_first_irq;
-+	unsigned int i = irq - eic->first_irq;
- 	u32 mode, edge, level;
--	unsigned long flags;
- 	int ret = 0;
- 
- 	flow_type &= IRQ_TYPE_SENSE_MASK;
-@@ -60,11 +101,10 @@
- 		flow_type = IRQ_TYPE_LEVEL_LOW;
- 
- 	desc = &irq_desc[irq];
--	spin_lock_irqsave(&sm->lock, flags);
- 
--	mode = sm_readl(sm, EIM_MODE);
--	edge = sm_readl(sm, EIM_EDGE);
--	level = sm_readl(sm, EIM_LEVEL);
-+	mode = eic_readl(eic, MODE);
-+	edge = eic_readl(eic, EDGE);
-+	level = eic_readl(eic, LEVEL);
- 
- 	switch (flow_type) {
- 	case IRQ_TYPE_LEVEL_LOW:
-@@ -89,9 +129,9 @@
- 	}
- 
- 	if (ret == 0) {
--		sm_writel(sm, EIM_MODE, mode);
--		sm_writel(sm, EIM_EDGE, edge);
--		sm_writel(sm, EIM_LEVEL, level);
-+		eic_writel(eic, MODE, mode);
-+		eic_writel(eic, EDGE, edge);
-+		eic_writel(eic, LEVEL, level);
- 
- 		if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
- 			flow_type |= IRQ_LEVEL;
-@@ -99,35 +139,33 @@
- 		desc->status |= flow_type;
- 	}
- 
--	spin_unlock_irqrestore(&sm->lock, flags);
--
- 	return ret;
- }
- 
--struct irq_chip eim_chip = {
--	.name		= "eim",
--	.ack		= eim_ack_irq,
--	.mask		= eim_mask_irq,
--	.mask_ack	= eim_mask_ack_irq,
--	.unmask		= eim_unmask_irq,
--	.set_type	= eim_set_irq_type,
-+struct irq_chip eic_chip = {
-+	.name		= "eic",
-+	.ack		= eic_ack_irq,
-+	.mask		= eic_mask_irq,
-+	.mask_ack	= eic_mask_ack_irq,
-+	.unmask		= eic_unmask_irq,
-+	.set_type	= eic_set_irq_type,
- };
- 
--static void demux_eim_irq(unsigned int irq, struct irq_desc *desc)
-+static void demux_eic_irq(unsigned int irq, struct irq_desc *desc)
- {
--	struct at32_sm *sm = desc->handler_data;
-+	struct eic *eic = desc->handler_data;
- 	struct irq_desc *ext_desc;
- 	unsigned long status, pending;
- 	unsigned int i, ext_irq;
- 
--	status = sm_readl(sm, EIM_ISR);
--	pending = status & sm_readl(sm, EIM_IMR);
-+	status = eic_readl(eic, ISR);
-+	pending = status & eic_readl(eic, IMR);
- 
- 	while (pending) {
- 		i = fls(pending) - 1;
- 		pending &= ~(1 << i);
- 
--		ext_irq = i + sm->eim_first_irq;
-+		ext_irq = i + eic->first_irq;
- 		ext_desc = irq_desc + ext_irq;
- 		if (ext_desc->status & IRQ_LEVEL)
- 			handle_level_irq(ext_irq, ext_desc);
-@@ -136,51 +174,85 @@
- 	}
- }
- 
--static int __init eim_init(void)
-+static int __init eic_probe(struct platform_device *pdev)
- {
--	struct at32_sm *sm = &system_manager;
-+	struct eic *eic;
-+	struct resource *regs;
- 	unsigned int i;
- 	unsigned int nr_irqs;
- 	unsigned int int_irq;
-+	int ret;
- 	u32 pattern;
- 
--	/*
--	 * The EIM is really the same module as SM, so register
--	 * mapping, etc. has been taken care of already.
--	 */
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	int_irq = platform_get_irq(pdev, 0);
-+	if (!regs || !int_irq) {
-+		dev_dbg(&pdev->dev, "missing regs and/or irq resource\n");
-+		return -ENXIO;
-+	}
 +
-+	ret = -ENOMEM;
-+	eic = kzalloc(sizeof(struct eic), GFP_KERNEL);
-+	if (!eic) {
-+		dev_dbg(&pdev->dev, "no memory for eic structure\n");
-+		goto err_kzalloc;
-+	}
-+
-+	eic->first_irq = EIM_IRQ_BASE + 32 * pdev->id;
-+	eic->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!eic->regs) {
-+		dev_dbg(&pdev->dev, "failed to map regs\n");
-+		goto err_ioremap;
-+	}
- 
- 	/*
- 	 * Find out how many interrupt lines that are actually
- 	 * implemented in hardware.
- 	 */
--	sm_writel(sm, EIM_IDR, ~0UL);
--	sm_writel(sm, EIM_MODE, ~0UL);
--	pattern = sm_readl(sm, EIM_MODE);
-+	eic_writel(eic, IDR, ~0UL);
-+	eic_writel(eic, MODE, ~0UL);
-+	pattern = eic_readl(eic, MODE);
- 	nr_irqs = fls(pattern);
- 
- 	/* Trigger on falling edge unless overridden by driver */
--	sm_writel(sm, EIM_MODE, 0UL);
--	sm_writel(sm, EIM_EDGE, 0UL);
-+	eic_writel(eic, MODE, 0UL);
-+	eic_writel(eic, EDGE, 0UL);
- 
--	sm->eim_chip = &eim_chip;
-+	eic->chip = &eic_chip;
- 
- 	for (i = 0; i < nr_irqs; i++) {
- 		/* NOTE the handler we set here is ignored by the demux */
--		set_irq_chip_and_handler(sm->eim_first_irq + i, &eim_chip,
-+		set_irq_chip_and_handler(eic->first_irq + i, &eic_chip,
- 					 handle_level_irq);
--		set_irq_chip_data(sm->eim_first_irq + i, sm);
-+		set_irq_chip_data(eic->first_irq + i, eic);
- 	}
- 
--	int_irq = platform_get_irq_byname(sm->pdev, "eim");
--
--	set_irq_chained_handler(int_irq, demux_eim_irq);
--	set_irq_data(int_irq, sm);
-+	set_irq_chained_handler(int_irq, demux_eic_irq);
-+	set_irq_data(int_irq, eic);
- 
--	printk("EIM: External Interrupt Module at 0x%p, IRQ %u\n",
--	       sm->regs, int_irq);
--	printk("EIM: Handling %u external IRQs, starting with IRQ %u\n",
--	       nr_irqs, sm->eim_first_irq);
-+	dev_info(&pdev->dev,
-+		 "External Interrupt Controller at 0x%p, IRQ %u\n",
-+		 eic->regs, int_irq);
-+	dev_info(&pdev->dev,
-+		 "Handling %u external IRQs, starting with IRQ %u\n",
-+		 nr_irqs, eic->first_irq);
- 
- 	return 0;
++static int __init clk_debugfs_init(void)
++{
++	(void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO,
++			NULL, NULL, &clk_operations);
 +
-+err_ioremap:
-+	kfree(eic);
-+err_kzalloc:
-+	return ret;
++	return 0;
 +}
++postcore_initcall(clk_debugfs_init);
 +
-+static struct platform_driver eic_driver = {
-+	.driver = {
-+		.name = "at32_eic",
-+	},
-+};
-+
-+static int __init eic_init(void)
-+{
-+	return platform_driver_probe(&eic_driver, eic_probe);
- }
--arch_initcall(eim_init);
-+arch_initcall(eic_init);
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32.git/arch/avr32/mach-at32ap/gpio-dev.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/mach-at32ap/gpio-dev.c	2007-07-12 13:59:49.000000000 +0200
-@@ -0,0 +1,570 @@
++#endif
+diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c
+new file mode 100644
+index 0000000..8cf6d11
+--- /dev/null
++++ b/arch/avr32/mach-at32ap/gpio-dev.c
+@@ -0,0 +1,573 @@
 +/*
 + * GPIO /dev and configfs interface
 + *
@@ -3464,10 +3062,13 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32.g
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
++#include <linux/kernel.h>
 +#include <linux/configfs.h>
 +#include <linux/cdev.h>
++#include <linux/device.h>
 +#include <linux/fs.h>
 +#include <linux/interrupt.h>
++#include <linux/module.h>
 +#include <linux/poll.h>
 +#include <linux/uaccess.h>
 +#include <linux/wait.h>
@@ -4009,7 +3610,7 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32.g
 +
 +	/* Configfs initialization */
 +	config_group_init(&gpio_subsys.su_group);
-+	init_MUTEX(&gpio_subsys.su_sem);
++	mutex_init(&gpio_subsys.su_mutex);
 +	err = configfs_register_subsystem(&gpio_subsys);
 +	if (err)
 +		goto err_register_subsys;
@@ -4025,36 +3626,172 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/gpio-dev.c linux-avr32.g
 +	return err;
 +}
 +late_initcall(gpio_dev_init);
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/Kconfig linux-avr32.git/arch/avr32/mach-at32ap/Kconfig
---- linux-2.6.22.1/arch/avr32/mach-at32ap/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/Kconfig	2007-07-12 13:59:49.000000000 +0200
-@@ -26,6 +26,13 @@
+diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c
+index 5e22a75..704607f 100644
+--- a/arch/avr32/mach-at32ap/hsmc.c
++++ b/arch/avr32/mach-at32ap/hsmc.c
+@@ -29,16 +29,25 @@ struct hsmc {
  
- endchoice
+ static struct hsmc *hsmc;
  
-+config GPIO_DEV
-+	bool "GPIO /dev interface"
-+	select CONFIGFS_FS
-+	default n
-+	help
-+	  Say `Y' to enable a /dev interface to the GPIO pins.
+-int smc_set_configuration(int cs, const struct smc_config *config)
++void smc_set_timing(struct smc_config *config,
++		    const struct smc_timing *timing)
+ {
++	int recover;
++	int cycle;
 +
- endmenu
+ 	unsigned long mul;
+-	unsigned long offset;
+-	u32 setup, pulse, cycle, mode;
  
- endif # PLATFORM_AT32AP
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/Makefile linux-avr32.git/arch/avr32/mach-at32ap/Makefile
---- linux-2.6.22.1/arch/avr32/mach-at32ap/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/Makefile	2007-07-12 13:59:49.000000000 +0200
-@@ -1,3 +1,5 @@
- obj-y				+= at32ap.o clock.o intc.o extint.o pio.o hsmc.o
- obj-$(CONFIG_CPU_AT32AP7000)	+= at32ap7000.o
- obj-$(CONFIG_CPU_AT32AP7000)	+= time-tc.o
-+obj-$(CONFIG_CPU_FREQ_AT32AP)	+= cpufreq.o
-+obj-$(CONFIG_GPIO_DEV)		+= gpio-dev.o
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c linux-avr32.git/arch/avr32/mach-at32ap/pio.c
---- linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/pio.c	2007-07-12 13:59:49.000000000 +0200
-@@ -158,6 +158,82 @@
+-	if (!hsmc)
+-		return -ENODEV;
+-	if (cs >= NR_CHIP_SELECTS)
+-		return -EINVAL;
++	/* Reset all SMC timings */
++	config->ncs_read_setup	= 0;
++	config->nrd_setup	= 0;
++	config->ncs_write_setup	= 0;
++	config->nwe_setup	= 0;
++	config->ncs_read_pulse	= 0;
++	config->nrd_pulse	= 0;
++	config->ncs_write_pulse	= 0;
++	config->nwe_pulse	= 0;
++	config->read_cycle	= 0;
++	config->write_cycle	= 0;
+ 
+ 	/*
+ 	 * cycles = x / T = x * f
+@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config)
+ 
+ #define ns2cyc(x) ((((x) * mul) + 65535) >> 16)
+ 
+-	setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup))
+-		 | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup))
+-		 | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup))
+-		 | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup)));
+-	pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse))
+-		 | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse))
+-		 | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse))
+-		 | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse)));
+-	cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle))
+-		 | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle)));
++	if (timing->ncs_read_setup > 0)
++		config->ncs_read_setup = ns2cyc(timing->ncs_read_setup);
++
++	if (timing->nrd_setup > 0)
++		config->nrd_setup = ns2cyc(timing->nrd_setup);
++
++	if (timing->ncs_write_setup > 0)
++		config->ncs_write_setup = ns2cyc(timing->ncs_write_setup);
++
++	if (timing->nwe_setup > 0)
++		config->nwe_setup = ns2cyc(timing->nwe_setup);
++
++	if (timing->ncs_read_pulse > 0)
++		config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse);
++
++	if (timing->nrd_pulse > 0)
++		config->nrd_pulse = ns2cyc(timing->nrd_pulse);
++
++	if (timing->ncs_write_pulse > 0)
++		config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse);
++
++	if (timing->nwe_pulse > 0)
++		config->nwe_pulse = ns2cyc(timing->nwe_pulse);
++
++	if (timing->read_cycle > 0)
++		config->read_cycle = ns2cyc(timing->read_cycle);
++
++	if (timing->write_cycle > 0)
++		config->write_cycle = ns2cyc(timing->write_cycle);
++
++	/* Extend read cycle in needed */
++	if (timing->ncs_read_recover > 0)
++		recover = ns2cyc(timing->ncs_read_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_read_setup + config->ncs_read_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend read cycle in needed */
++	if (timing->nrd_recover > 0)
++		recover = ns2cyc(timing->nrd_recover);
++	else
++		recover = 1;
++
++	cycle = config->nrd_setup + config->nrd_pulse + recover;
++
++	if (config->read_cycle < cycle)
++		config->read_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->ncs_write_recover > 0)
++		recover = ns2cyc(timing->ncs_write_recover);
++	else
++		recover = 1;
++
++	cycle = config->ncs_write_setup + config->ncs_write_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++
++	/* Extend write cycle in needed */
++	if (timing->nwe_recover > 0)
++		recover = ns2cyc(timing->nwe_recover);
++	else
++		recover = 1;
++
++	cycle = config->nwe_setup + config->nwe_pulse + recover;
++
++	if (config->write_cycle < cycle)
++		config->write_cycle = cycle;
++}
++EXPORT_SYMBOL(smc_set_timing);
++
++int smc_set_configuration(int cs, const struct smc_config *config)
++{
++	unsigned long offset;
++	u32 setup, pulse, cycle, mode;
++
++	if (!hsmc)
++		return -ENODEV;
++	if (cs >= NR_CHIP_SELECTS)
++		return -EINVAL;
++
++	setup = (HSMC_BF(NWE_SETUP, config->nwe_setup)
++		 | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup)
++		 | HSMC_BF(NRD_SETUP, config->nrd_setup)
++		 | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup));
++	pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse)
++		 | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse)
++		 | HSMC_BF(NRD_PULSE, config->nrd_pulse)
++		 | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse));
++	cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle)
++		 | HSMC_BF(NRD_CYCLE, config->read_cycle));
+ 
+ 	switch (config->bus_width) {
+ 	case 1:
+diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
+index 1eb99b8..c978c36 100644
+--- a/arch/avr32/mach-at32ap/pio.c
++++ b/arch/avr32/mach-at32ap/pio.c
+@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
+ 			pio_writel(pio, SODR, mask);
+ 		else
+ 			pio_writel(pio, CODR, mask);
++		if (flags & AT32_GPIOF_MULTIDRV)
++			pio_writel(pio, MDER, mask);
++		else
++			pio_writel(pio, MDDR, mask);
+ 		pio_writel(pio, PUDR, mask);
+ 		pio_writel(pio, OER, mask);
+ 	} else {
+@@ -158,6 +162,82 @@ fail:
  	dump_stack();
  }
  
@@ -4137,383 +3874,30 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/pio.c linux-avr32.git/ar
  /*--------------------------------------------------------------------------*/
  
  /* GPIO API */
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/pm.h linux-avr32.git/arch/avr32/mach-at32ap/pm.h
---- linux-2.6.22.1/arch/avr32/mach-at32ap/pm.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/arch/avr32/mach-at32ap/pm.h	2007-07-12 13:59:49.000000000 +0200
-@@ -0,0 +1,112 @@
+diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h
+index a1f8ace..47efd0d 100644
+--- a/arch/avr32/mach-at32ap/pm.h
++++ b/arch/avr32/mach-at32ap/pm.h
+@@ -4,6 +4,14 @@
+ #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
+ #define __ARCH_AVR32_MACH_AT32AP_PM_H__
+ 
 +/*
-+ * Register definitions for the Power Manager (PM)
++ * We can reduce the code size a bit by using a constant here. Since
++ * this file is only used on AVR32 AP CPUs with segmentation enabled,
++ * it's safe to not use ioremap. Generic drivers should of course
++ * never do this.
 + */
-+#ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__
-+#define __ARCH_AVR32_MACH_AT32AP_PM_H__
-+
-+/* PM register offsets */
-+#define PM_MCCTRL				0x0000
-+#define PM_CKSEL				0x0004
-+#define PM_CPU_MASK				0x0008
-+#define PM_HSB_MASK				0x000c
-+#define PM_PBA_MASK				0x0010
-+#define PM_PBB_MASK				0x0014
-+#define PM_PLL0					0x0020
-+#define PM_PLL1					0x0024
-+#define PM_IER					0x0040
-+#define PM_IDR					0x0044
-+#define PM_IMR					0x0048
-+#define PM_ISR					0x004c
-+#define PM_ICR					0x0050
-+#define PM_GCCTRL(x)				(0x0060 + 4 * (x))
-+#define PM_RCAUSE				0x00c0
-+
-+/* Bitfields in CKSEL */
-+#define PM_CPUSEL_OFFSET			0
-+#define PM_CPUSEL_SIZE				3
-+#define PM_CPUDIV_OFFSET			7
-+#define PM_CPUDIV_SIZE				1
-+#define PM_HSBSEL_OFFSET			8
-+#define PM_HSBSEL_SIZE				3
-+#define PM_HSBDIV_OFFSET			15
-+#define PM_HSBDIV_SIZE				1
-+#define PM_PBASEL_OFFSET			16
-+#define PM_PBASEL_SIZE				3
-+#define PM_PBADIV_OFFSET			23
-+#define PM_PBADIV_SIZE				1
-+#define PM_PBBSEL_OFFSET			24
-+#define PM_PBBSEL_SIZE				3
-+#define PM_PBBDIV_OFFSET			31
-+#define PM_PBBDIV_SIZE				1
-+
-+/* Bitfields in PLL0 */
-+#define PM_PLLEN_OFFSET				0
-+#define PM_PLLEN_SIZE				1
-+#define PM_PLLOSC_OFFSET			1
-+#define PM_PLLOSC_SIZE				1
-+#define PM_PLLOPT_OFFSET			2
-+#define PM_PLLOPT_SIZE				3
-+#define PM_PLLDIV_OFFSET			8
-+#define PM_PLLDIV_SIZE				8
-+#define PM_PLLMUL_OFFSET			16
-+#define PM_PLLMUL_SIZE				8
-+#define PM_PLLCOUNT_OFFSET			24
-+#define PM_PLLCOUNT_SIZE			6
-+#define PM_PLLTEST_OFFSET			31
-+#define PM_PLLTEST_SIZE				1
-+
-+/* Bitfields in ICR */
-+#define PM_LOCK0_OFFSET				0
-+#define PM_LOCK0_SIZE				1
-+#define PM_LOCK1_OFFSET				1
-+#define PM_LOCK1_SIZE				1
-+#define PM_WAKE_OFFSET				2
-+#define PM_WAKE_SIZE				1
-+#define PM_CKRDY_OFFSET				5
-+#define PM_CKRDY_SIZE				1
-+#define PM_MSKRDY_OFFSET			6
-+#define PM_MSKRDY_SIZE				1
-+
-+/* Bitfields in GCCTRL0 */
-+#define PM_OSCSEL_OFFSET			0
-+#define PM_OSCSEL_SIZE				1
-+#define PM_PLLSEL_OFFSET			1
-+#define PM_PLLSEL_SIZE				1
-+#define PM_CEN_OFFSET				2
-+#define PM_CEN_SIZE				1
-+#define PM_DIVEN_OFFSET				4
-+#define PM_DIVEN_SIZE				1
-+#define PM_DIV_OFFSET				8
-+#define PM_DIV_SIZE				8
-+
-+/* Bitfields in RCAUSE */
-+#define PM_POR_OFFSET				0
-+#define PM_POR_SIZE				1
-+#define PM_EXT_OFFSET				2
-+#define PM_EXT_SIZE				1
-+#define PM_WDT_OFFSET				3
-+#define PM_WDT_SIZE				1
-+#define PM_NTAE_OFFSET				4
-+#define PM_NTAE_SIZE				1
-+
-+/* Bit manipulation macros */
-+#define PM_BIT(name)					\
-+	(1 << PM_##name##_OFFSET)
-+#define PM_BF(name,value)				\
-+	(((value) & ((1 << PM_##name##_SIZE) - 1))	\
-+	 << PM_##name##_OFFSET)
-+#define PM_BFEXT(name,value)				\
-+	(((value) >> PM_##name##_OFFSET)		\
-+	 & ((1 << PM_##name##_SIZE) - 1))
-+#define PM_BFINS(name,value,old)\
-+	(((old) & ~(((1 << PM_##name##_SIZE) - 1)	\
-+		    << PM_##name##_OFFSET))		\
-+	 | PM_BF(name,value))
++#define AT32_PM_BASE	0xfff00000
 +
-+/* Register access macros */
-+#define pm_readl(reg)							\
-+	__raw_readl((void __iomem *)AT32_PM_BASE + PM_##reg)
-+#define pm_writel(reg,value)						\
-+	__raw_writel((value), (void __iomem *)AT32_PM_BASE + PM_##reg)
-+
-+#endif /* __ARCH_AVR32_MACH_AT32AP_PM_H__ */
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mach-at32ap/sm.h linux-avr32.git/arch/avr32/mach-at32ap/sm.h
---- linux-2.6.22.1/arch/avr32/mach-at32ap/sm.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mach-at32ap/sm.h	1970-01-01 01:00:00.000000000 +0100
-@@ -1,242 +0,0 @@
--/*
-- * Register definitions for SM
-- *
-- * System Manager
-- */
--#ifndef __ASM_AVR32_SM_H__
--#define __ASM_AVR32_SM_H__
--
--/* SM register offsets */
--#define SM_PM_MCCTRL                            0x0000
--#define SM_PM_CKSEL                             0x0004
--#define SM_PM_CPU_MASK                          0x0008
--#define SM_PM_HSB_MASK                          0x000c
--#define SM_PM_PBA_MASK                         0x0010
--#define SM_PM_PBB_MASK                         0x0014
--#define SM_PM_PLL0                              0x0020
--#define SM_PM_PLL1                              0x0024
--#define SM_PM_VCTRL                             0x0030
--#define SM_PM_VMREF                             0x0034
--#define SM_PM_VMV                               0x0038
--#define SM_PM_IER                               0x0040
--#define SM_PM_IDR                               0x0044
--#define SM_PM_IMR                               0x0048
--#define SM_PM_ISR                               0x004c
--#define SM_PM_ICR                               0x0050
--#define SM_PM_GCCTRL                            0x0060
--#define SM_RTC_CTRL                             0x0080
--#define SM_RTC_VAL                              0x0084
--#define SM_RTC_TOP                              0x0088
--#define SM_RTC_IER                              0x0090
--#define SM_RTC_IDR                              0x0094
--#define SM_RTC_IMR                              0x0098
--#define SM_RTC_ISR                              0x009c
--#define SM_RTC_ICR                              0x00a0
--#define SM_WDT_CTRL                             0x00b0
--#define SM_WDT_CLR                              0x00b4
--#define SM_WDT_EXT                              0x00b8
--#define SM_RC_RCAUSE                            0x00c0
--#define SM_EIM_IER                              0x0100
--#define SM_EIM_IDR                              0x0104
--#define SM_EIM_IMR                              0x0108
--#define SM_EIM_ISR                              0x010c
--#define SM_EIM_ICR                              0x0110
--#define SM_EIM_MODE                             0x0114
--#define SM_EIM_EDGE                             0x0118
--#define SM_EIM_LEVEL                            0x011c
--#define SM_EIM_TEST                             0x0120
--#define SM_EIM_NMIC                             0x0124
--
--/* Bitfields in PM_MCCTRL */
--
--/* Bitfields in PM_CKSEL */
--#define SM_CPUSEL_OFFSET                        0
--#define SM_CPUSEL_SIZE                          3
--#define SM_CPUDIV_OFFSET                        7
--#define SM_CPUDIV_SIZE                          1
--#define SM_HSBSEL_OFFSET                        8
--#define SM_HSBSEL_SIZE                          3
--#define SM_HSBDIV_OFFSET                        15
--#define SM_HSBDIV_SIZE                          1
--#define SM_PBASEL_OFFSET                       16
--#define SM_PBASEL_SIZE                         3
--#define SM_PBADIV_OFFSET                       23
--#define SM_PBADIV_SIZE                         1
--#define SM_PBBSEL_OFFSET                       24
--#define SM_PBBSEL_SIZE                         3
--#define SM_PBBDIV_OFFSET                       31
--#define SM_PBBDIV_SIZE                         1
--
--/* Bitfields in PM_CPU_MASK */
--
--/* Bitfields in PM_HSB_MASK */
--
--/* Bitfields in PM_PBA_MASK */
--
--/* Bitfields in PM_PBB_MASK */
--
--/* Bitfields in PM_PLL0 */
--#define SM_PLLEN_OFFSET                         0
--#define SM_PLLEN_SIZE                           1
--#define SM_PLLOSC_OFFSET                        1
--#define SM_PLLOSC_SIZE                          1
--#define SM_PLLOPT_OFFSET                        2
--#define SM_PLLOPT_SIZE                          3
--#define SM_PLLDIV_OFFSET                        8
--#define SM_PLLDIV_SIZE                          8
--#define SM_PLLMUL_OFFSET                        16
--#define SM_PLLMUL_SIZE                          8
--#define SM_PLLCOUNT_OFFSET                      24
--#define SM_PLLCOUNT_SIZE                        6
--#define SM_PLLTEST_OFFSET                       31
--#define SM_PLLTEST_SIZE                         1
--
--/* Bitfields in PM_PLL1 */
--
--/* Bitfields in PM_VCTRL */
--#define SM_VAUTO_OFFSET                         0
--#define SM_VAUTO_SIZE                           1
--#define SM_PM_VCTRL_VAL_OFFSET                  8
--#define SM_PM_VCTRL_VAL_SIZE                    7
--
--/* Bitfields in PM_VMREF */
--#define SM_REFSEL_OFFSET                        0
--#define SM_REFSEL_SIZE                          4
--
--/* Bitfields in PM_VMV */
--#define SM_PM_VMV_VAL_OFFSET                    0
--#define SM_PM_VMV_VAL_SIZE                      8
--
--/* Bitfields in PM_IER */
--
--/* Bitfields in PM_IDR */
--
--/* Bitfields in PM_IMR */
--
--/* Bitfields in PM_ISR */
--
--/* Bitfields in PM_ICR */
--#define SM_LOCK0_OFFSET                         0
--#define SM_LOCK0_SIZE                           1
--#define SM_LOCK1_OFFSET                         1
--#define SM_LOCK1_SIZE                           1
--#define SM_WAKE_OFFSET                          2
--#define SM_WAKE_SIZE                            1
--#define SM_VOK_OFFSET                           3
--#define SM_VOK_SIZE                             1
--#define SM_VMRDY_OFFSET                         4
--#define SM_VMRDY_SIZE                           1
--#define SM_CKRDY_OFFSET                         5
--#define SM_CKRDY_SIZE                           1
--
--/* Bitfields in PM_GCCTRL */
--#define SM_OSCSEL_OFFSET                        0
--#define SM_OSCSEL_SIZE                          1
--#define SM_PLLSEL_OFFSET                        1
--#define SM_PLLSEL_SIZE                          1
--#define SM_CEN_OFFSET                           2
--#define SM_CEN_SIZE                             1
--#define SM_CPC_OFFSET                           3
--#define SM_CPC_SIZE                             1
--#define SM_DIVEN_OFFSET                         4
--#define SM_DIVEN_SIZE                           1
--#define SM_DIV_OFFSET                           8
--#define SM_DIV_SIZE                             8
--
--/* Bitfields in RTC_CTRL */
--#define SM_PCLR_OFFSET                          1
--#define SM_PCLR_SIZE                            1
--#define SM_TOPEN_OFFSET                         2
--#define SM_TOPEN_SIZE                           1
--#define SM_CLKEN_OFFSET                         3
--#define SM_CLKEN_SIZE                           1
--#define SM_PSEL_OFFSET                          8
--#define SM_PSEL_SIZE                            16
--
--/* Bitfields in RTC_VAL */
--#define SM_RTC_VAL_VAL_OFFSET                   0
--#define SM_RTC_VAL_VAL_SIZE                     31
--
--/* Bitfields in RTC_TOP */
--#define SM_RTC_TOP_VAL_OFFSET                   0
--#define SM_RTC_TOP_VAL_SIZE                     32
--
--/* Bitfields in RTC_IER */
--
--/* Bitfields in RTC_IDR */
--
--/* Bitfields in RTC_IMR */
--
--/* Bitfields in RTC_ISR */
--
--/* Bitfields in RTC_ICR */
--#define SM_TOPI_OFFSET                          0
--#define SM_TOPI_SIZE                            1
--
--/* Bitfields in WDT_CTRL */
--#define SM_KEY_OFFSET                           24
--#define SM_KEY_SIZE                             8
--
--/* Bitfields in WDT_CLR */
--
--/* Bitfields in WDT_EXT */
--
--/* Bitfields in RC_RCAUSE */
--#define SM_POR_OFFSET                           0
--#define SM_POR_SIZE                             1
--#define SM_BOD_OFFSET                           1
--#define SM_BOD_SIZE                             1
--#define SM_EXT_OFFSET                           2
--#define SM_EXT_SIZE                             1
--#define SM_WDT_OFFSET                           3
--#define SM_WDT_SIZE                             1
--#define SM_NTAE_OFFSET                          4
--#define SM_NTAE_SIZE                            1
--#define SM_SERP_OFFSET                          5
--#define SM_SERP_SIZE                            1
--
--/* Bitfields in EIM_IER */
--
--/* Bitfields in EIM_IDR */
--
--/* Bitfields in EIM_IMR */
--
--/* Bitfields in EIM_ISR */
--
--/* Bitfields in EIM_ICR */
--
--/* Bitfields in EIM_MODE */
--
--/* Bitfields in EIM_EDGE */
--#define SM_INT0_OFFSET                          0
--#define SM_INT0_SIZE                            1
--#define SM_INT1_OFFSET                          1
--#define SM_INT1_SIZE                            1
--#define SM_INT2_OFFSET                          2
--#define SM_INT2_SIZE                            1
--#define SM_INT3_OFFSET                          3
--#define SM_INT3_SIZE                            1
--
--/* Bitfields in EIM_LEVEL */
--
--/* Bitfields in EIM_TEST */
--#define SM_TESTEN_OFFSET                        31
--#define SM_TESTEN_SIZE                          1
--
--/* Bitfields in EIM_NMIC */
--#define SM_EN_OFFSET                            0
--#define SM_EN_SIZE                              1
--
--/* Bit manipulation macros */
--#define SM_BIT(name)                            (1 << SM_##name##_OFFSET)
--#define SM_BF(name,value)                       (((value) & ((1 << SM_##name##_SIZE) - 1)) << SM_##name##_OFFSET)
--#define SM_BFEXT(name,value)                    (((value) >> SM_##name##_OFFSET) & ((1 << SM_##name##_SIZE) - 1))
--#define SM_BFINS(name,value,old)                (((old) & ~(((1 << SM_##name##_SIZE) - 1) << SM_##name##_OFFSET)) | SM_BF(name,value))
--
--/* Register access macros */
--#define sm_readl(port,reg)					\
--	__raw_readl((port)->regs + SM_##reg)
--#define sm_writel(port,reg,value)				\
--	__raw_writel((value), (port)->regs + SM_##reg)
--
--#endif /* __ASM_AVR32_SM_H__ */
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/Makefile linux-avr32.git/arch/avr32/Makefile
---- linux-2.6.22.1/arch/avr32/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/Makefile	2007-06-06 11:33:46.000000000 +0200
-@@ -31,6 +31,7 @@
- core-$(CONFIG_LOADER_U_BOOT)		+= arch/avr32/boot/u-boot/
- core-y					+= arch/avr32/kernel/
- core-y					+= arch/avr32/mm/
-+drivers-y				+= arch/avr32/drivers/
- libs-y					+= arch/avr32/lib/
- 
- archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap
-diff -x .git -Nur linux-2.6.22.1/arch/avr32/mm/dma-coherent.c linux-avr32.git/arch/avr32/mm/dma-coherent.c
---- linux-2.6.22.1/arch/avr32/mm/dma-coherent.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/arch/avr32/mm/dma-coherent.c	2007-07-12 13:59:49.000000000 +0200
-@@ -41,6 +41,13 @@
+ /* PM register offsets */
+ #define PM_MCCTRL				0x0000
+ #define PM_CKSEL				0x0004
+diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c
+index 099212d..26f29c6 100644
+--- a/arch/avr32/mm/dma-coherent.c
++++ b/arch/avr32/mm/dma-coherent.c
+@@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size,
  	struct page *page, *free, *end;
  	int order;
  
@@ -4527,388 +3911,516 @@ diff -x .git -Nur linux-2.6.22.1/arch/avr32/mm/dma-coherent.c linux-avr32.git/ar
  	size = PAGE_ALIGN(size);
  	order = get_order(size);
  
-diff -x .git -Nur linux-2.6.22.1/drivers/char/watchdog/at32ap700x_wdt.c linux-avr32.git/drivers/char/watchdog/at32ap700x_wdt.c
---- linux-2.6.22.1/drivers/char/watchdog/at32ap700x_wdt.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/char/watchdog/at32ap700x_wdt.c	2007-07-12 13:59:59.000000000 +0200
-@@ -0,0 +1,325 @@
-+/*
-+ * Watchdog driver for Atmel AT32AP700X devices
-+ *
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/miscdevice.h>
-+#include <linux/fs.h>
+diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c
+index 82cf708..480760b 100644
+--- a/arch/avr32/mm/init.c
++++ b/arch/avr32/mm/init.c
+@@ -224,19 +224,9 @@ void free_initmem(void)
+ 
+ #ifdef CONFIG_BLK_DEV_INITRD
+ 
+-static int keep_initrd;
+-
+ void free_initrd_mem(unsigned long start, unsigned long end)
+ {
+-	if (!keep_initrd)
+-		free_area(start, end, "initrd");
+-}
+-
+-static int __init keepinitrd_setup(char *__unused)
+-{
+-	keep_initrd = 1;
+-	return 1;
++	free_area(start, end, "initrd");
+ }
+ 
+-__setup("keepinitrd", keepinitrd_setup);
+ #endif
+diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
+index 9f3a4cd..6f5bcd6 100644
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -80,6 +80,14 @@ config I2C_AT91
+ 	  This supports the use of the I2C interface on Atmel AT91
+ 	  processors.
+ 
++config I2C_ATMELTWI
++	tristate "Atmel Two-Wire Interface (TWI)"
++	depends on I2C && (ARCH_AT91 || PLATFORM_AT32AP)
++	help
++	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
++	  AT91-based device and want to use its built-in TWI
++	  functionality.
++
+ config I2C_AU1550
+ 	tristate "Au1550/Au1200 SMBus interface"
+ 	depends on SOC_AU1550 || SOC_AU1200
+diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
+index 5b752e4..e4644a8 100644
+--- a/drivers/i2c/busses/Makefile
++++ b/drivers/i2c/busses/Makefile
+@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO)	+= i2c-viapro.o
+ obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
+ obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
++obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
+ 
+ ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
+ EXTRA_CFLAGS += -DDEBUG
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c
+new file mode 100644
+index 0000000..3f78b31
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.c
+@@ -0,0 +1,436 @@
++/*
++ * i2c Support for Atmel's Two-Wire Interface (TWI)
++ *
++ * Based on the work of Copyright (C) 2004 Rick Bronson
++ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
++ * Ported to AVR32 and heavily modified by Espen Krangnes
++ * <ekrangnes at atmel.com>
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * Borrowed heavily from the original work by:
++ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ *
++ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
++ * bugs removed, interrupt routine markedly rewritten
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ */
++#undef VERBOSE_DEBUG
++
++#include <linux/module.h>
++#include <linux/slab.h>
++#include <linux/i2c.h>
++#include <linux/init.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/interrupt.h>
 +#include <linux/platform_device.h>
-+#include <linux/watchdog.h>
-+#include <linux/uaccess.h>
++#include <linux/completion.h>
 +#include <linux/io.h>
 +
-+#define TIMEOUT_MIN		1
-+#define TIMEOUT_DEFAULT		CONFIG_AT32AP700X_WDT_TIMEOUT
-+#define TIMEOUT_MAX		2
-+
-+/* Watchdog registers and write/read macro */
-+#define	WDT_CTRL		0x00
-+#define WDT_CTRL_EN		   0
-+#define WDT_CTRL_PSEL		   8
-+#define WDT_CTRL_KEY		  24
++#include "i2c-atmeltwi.h"
 +
-+#define WDT_CLR			0x04
++static unsigned int baudrate = 100 * 1000;
++module_param(baudrate, uint, S_IRUGO);
++MODULE_PARM_DESC(baudrate, "The TWI baudrate");
 +
-+#define WDT_BIT(name)		(1 << WDT_##name)
-+#define WDT_BF(name,value)	((value) << WDT_##name)
 +
-+#define wdt_readl(dev,reg)				\
-+	__raw_readl((dev)->regs + WDT_##reg)
-+#define wdt_writel(dev,reg,value)			\
-+	__raw_writel((value), (dev)->regs + WDT_##reg)
++struct atmel_twi {
++	void __iomem *regs;
++	struct i2c_adapter adapter;
++	struct clk *pclk;
++	struct completion comp;
++	u32 mask;
++	u8 *buf;
++	u16 len;
++	u16 acks_left;
++	int status;
++	unsigned int irq;
 +
-+struct wdt_at32ap700x {
-+	void __iomem		*regs;
-+	int			timeout;
-+	int			users;
-+	struct miscdevice	miscdev;
 +};
-+
-+static struct wdt_at32ap700x *wdt;
++#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
 +
 +/*
-+ * Disable the watchdog.
++ * (Re)Initialize the TWI hardware registers.
 + */
-+static void inline at32_wdt_stop(void)
++static int twi_hwinit(struct atmel_twi *twi)
 +{
-+	unsigned long psel = wdt_readl(wdt, CTRL) & WDT_BF(CTRL_PSEL, 0x0f);
-+	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0x55));
-+	wdt_writel(wdt, CTRL, psel | WDT_BF(CTRL_KEY, 0xaa));
-+}
++	unsigned long cdiv, ckdiv = 0;
 +
-+/*
-+ * Enable and reset the watchdog.
-+ */
-+static void inline at32_wdt_start(void)
-+{
-+	/* 0xf is 2^16 divider = 2 sec, 0xe is 2^15 divider = 1 sec */
-+	unsigned long psel = (wdt->timeout > 1) ? 0xf : 0xe;
++	/* REVISIT: wait till SCL is high before resetting; otherwise,
++	 * some versions will wedge forever.
++	 */
 +
-+	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
-+			| WDT_BF(CTRL_PSEL, psel)
-+			| WDT_BF(CTRL_KEY, 0x55));
-+	wdt_writel(wdt, CTRL, WDT_BIT(CTRL_EN)
-+			| WDT_BF(CTRL_PSEL, psel)
-+			| WDT_BF(CTRL_KEY, 0xaa));
-+}
++	twi_writel(twi, IDR, ~0UL);
++	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
++	twi_readl(twi, SR);
 +
-+/*
-+ * Pat the watchdog timer.
-+ */
-+static void inline at32_wdt_pat(void)
-+{
-+	wdt_writel(wdt, CLR, 0x42);
-+}
++	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
 +
-+/*
-+ * Watchdog device is opened, and watchdog starts running.
-+ */
-+static int at32_wdt_open(struct inode *inode, struct file *file)
-+{
-+	if (test_and_set_bit(1, &wdt->users))
-+		return -EBUSY;
++	while (cdiv > 255) {
++		ckdiv++;
++		cdiv = cdiv >> 1;
++	}
 +
-+	at32_wdt_start();
-+	return nonseekable_open(inode, file);
-+}
++	/* REVISIT: there are various errata to consider re CDIV and CHDIV
++	 * here, at least on at91 parts.
++	 */
 +
-+/*
-+ * Close the watchdog device. If CONFIG_WATCHDOG_NOWAYOUT is _not_ defined then
-+ * the watchdog is also disabled.
-+ */
-+static int at32_wdt_close(struct inode *inode, struct file *file)
-+{
-+#ifndef CONFIG_WATCHDOG_NOWAYOUT
-+	at32_wdt_stop();
-+#endif
-+	clear_bit(1, &wdt->users);
++	if (ckdiv > 7)
++		return -EINVAL;
++	else
++		twi_writel(twi, CWGR, TWI_BF(CKDIV, ckdiv)
++				| TWI_BF(CHDIV, cdiv)
++				| TWI_BF(CLDIV, cdiv));
 +	return 0;
 +}
 +
 +/*
-+ * Change the watchdog time interval.
++ * Waits for the i2c status register to set the specified bitmask
++ * Returns 0 if timed out ... ~100ms is much longer than the SMBus
++ * limit, but I2C has no limit at all.
 + */
-+static int at32_wdt_settimeout(int time)
++static int twi_complete(struct atmel_twi *twi, u32 mask)
 +{
-+	/*
-+	 * All counting occurs at 1 / SLOW_CLOCK (32 kHz) and max prescaler is
-+	 * 2 ^ 16 allowing up to 2 seconds timeout.
-+	 */
-+	if ((time < TIMEOUT_MIN) || (time > TIMEOUT_MAX))
-+		return -EINVAL;
++	int timeout = msecs_to_jiffies(100);
 +
-+	/*
-+	 * Set new watchdog time. It will be used when at32_wdt_start() is
-+	 * called.
-+	 */
-+	wdt->timeout = time;
++	mask |= TWI_BIT(TXCOMP);
++	twi->mask = mask | TWI_BIT(NACK) | TWI_BIT(OVRE);
++	init_completion(&twi->comp);
++
++	twi_writel(twi, IER, mask);
++
++	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
++		/* RESET TWI interface */
++		twi_writel(twi, CR, TWI_BIT(SWRST));
++
++		/* Reinitialize TWI */
++		twi_hwinit(twi);
++
++		return -ETIMEDOUT;
++	}
 +	return 0;
 +}
 +
-+static struct watchdog_info at32_wdt_info = {
-+	.identity	= "at32ap700x watchdog",
-+	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
-+};
-+
 +/*
-+ * Handle commands from user-space.
++ * Generic i2c master transfer entrypoint.
 + */
-+static int at32_wdt_ioctl(struct inode *inode, struct file *file,
-+		unsigned int cmd, unsigned long arg)
++static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
 +{
-+	int ret = -ENOTTY;
-+	int time;
-+	void __user *argp = (void __user *)arg;
-+	int __user *p = argp;
++	struct atmel_twi *twi = to_atmel_twi(adap);
++	int i;
 +
-+	switch (cmd) {
-+	case WDIOC_KEEPALIVE:
-+		at32_wdt_pat();
-+		ret = 0;
-+		break;
-+	case WDIOC_GETSUPPORT:
-+		ret = copy_to_user(argp, &at32_wdt_info,
-+				sizeof(at32_wdt_info)) ? -EFAULT : 0;
-+		break;
-+	case WDIOC_SETTIMEOUT:
-+		ret = get_user(time, p);
-+		if (ret)
-+			break;
-+		ret = at32_wdt_settimeout(time);
-+		if (ret)
-+			break;
-+		/* Enable new time value */
-+		at32_wdt_start();
-+		/* fall through */
-+	case WDIOC_GETTIMEOUT:
-+		ret = put_user(wdt->timeout, p);
-+		break;
-+	case WDIOC_GETSTATUS: /* fall through */
-+	case WDIOC_GETBOOTSTATUS:
-+		ret = put_user(0, p);
-+		break;
-+	case WDIOC_SETOPTIONS:
-+		ret = get_user(time, p);
-+		if (ret)
-+			break;
-+		if (time & WDIOS_DISABLECARD)
-+			at32_wdt_stop();
-+		if (time & WDIOS_ENABLECARD)
-+			at32_wdt_start();
-+		ret = 0;
-+		break;
-+	}
++	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
 +
-+	return ret;
-+}
++	twi->status = 0;
++	for (i = 0; i < num; i++, pmsg++) {
++		twi->len = pmsg->len;
++		twi->buf = pmsg->buf;
++		twi->acks_left = pmsg->len;
++		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
++			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
++		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
 +
-+static ssize_t at32_wdt_write(struct file *file, const char *data, size_t len,
-+				loff_t *ppos)
-+{
-+	at32_wdt_pat();
-+	return len;
++		dev_dbg(&adap->dev,
++			"#%d: %s %d byte%s %s dev 0x%02x\n",
++			i,
++			pmsg->flags & I2C_M_RD ? "reading" : "writing",
++			pmsg->len,
++			pmsg->len > 1 ? "s" : "",
++			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++
++		/* enable */
++		twi_writel(twi, CR, TWI_BIT(MSEN));
++
++		if (pmsg->flags & I2C_M_RD) {
++			/* cleanup after previous RX overruns */
++			while (twi_readl(twi, SR) & TWI_BIT(RXRDY))
++				twi_readl(twi, RHR);
++
++			if (twi->len == 1)
++				twi_writel(twi, CR,
++					TWI_BIT(START) | TWI_BIT(STOP));
++			else
++				twi_writel(twi, CR, TWI_BIT(START));
++
++			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "RX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++		} else {
++			twi_writel(twi, THR, twi->buf[0]);
++			twi->acks_left--;
++			/* REVISIT: some chips don't start automagically:
++			 * twi_writel(twi, CR, TWI_BIT(START));
++			 */
++			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
++				dev_dbg(&adap->dev, "TX[%d] timeout. "
++					"Stopped with %d bytes left\n",
++					i, twi->acks_left);
++				return -ETIMEDOUT;
++			}
++			/* REVISIT: an erratum workaround may be needed here;
++			 * see sam9261 "STOP not generated" (START either).
++			 */
++		}
++
++		/* Disable TWI interface */
++		twi_writel(twi, CR, TWI_BIT(MSDIS));
++
++		if (twi->status)
++			return twi->status;
++
++		/* WARNING:  This driver lies about properly supporting
++		 * repeated start, or it would *ALWAYS* return here.  It
++		 * has issued a STOP.  Continuing is a false claim -- that
++		 * a second (or third, etc.) message is part of the same
++		 * "combined" (no STOPs between parts) message.
++		 */
++
++	} /* end cur msg */
++
++	return i;
 +}
 +
-+static const struct file_operations at32_wdt_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.ioctl		= at32_wdt_ioctl,
-+	.open		= at32_wdt_open,
-+	.release	= at32_wdt_close,
-+	.write		= at32_wdt_write,
-+};
 +
-+static int __init at32_wdt_probe(struct platform_device *pdev)
++static irqreturn_t twi_interrupt(int irq, void *dev_id)
 +{
-+	struct resource	*regs;
-+	int ret;
++	struct atmel_twi *twi = dev_id;
++	int status = twi_readl(twi, SR);
 +
-+	if (wdt) {
-+		dev_dbg(&pdev->dev, "only 1 wdt instance supported.\n");
-+		return -EBUSY;
-+	}
++	/* Save state for later debug prints */
++	int old_status = status;
 +
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_dbg(&pdev->dev, "missing mmio resource\n");
-+		return -ENXIO;
-+	}
++	if (twi->mask & status) {
 +
-+	wdt = kzalloc(sizeof(struct wdt_at32ap700x), GFP_KERNEL);
-+	if (!wdt) {
-+		dev_dbg(&pdev->dev, "no memory for wdt structure\n");
-+		return -ENOMEM;
-+	}
++		status &= twi->mask;
 +
-+	wdt->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!wdt->regs) {
-+		ret = -ENOMEM;
-+		dev_dbg(&pdev->dev, "could not map I/O memory\n");
-+		goto err_free;
-+	}
-+	wdt->users = 0;
-+	wdt->miscdev.minor = WATCHDOG_MINOR;
-+	wdt->miscdev.name = "watchdog";
-+	wdt->miscdev.fops = &at32_wdt_fops;
++		if (status & TWI_BIT(RXRDY)) {
++			if ((status & TWI_BIT(OVRE)) && twi->acks_left) {
++				/* Note weakness in fault reporting model:
++				 * we can't say "the first N of these data
++				 * bytes are valid".
++				 */
++				dev_err(&twi->adapter.dev,
++					"OVERRUN RX! %04x, lost %d\n",
++					old_status, twi->acks_left);
++				twi->acks_left = 0;
++				twi_writel(twi, CR, TWI_BIT(STOP));
++				twi->status = -EOVERFLOW;
++			} else if (twi->acks_left > 0) {
++				twi->buf[twi->len - twi->acks_left] =
++					twi_readl(twi, RHR);
++				twi->acks_left--;
++			}
++			if (status & TWI_BIT(TXCOMP))
++				goto done;
++			if (twi->acks_left == 1)
++				twi_writel(twi, CR, TWI_BIT(STOP));
 +
-+	if (at32_wdt_settimeout(TIMEOUT_DEFAULT)) {
-+		at32_wdt_settimeout(TIMEOUT_MAX);
-+		dev_dbg(&pdev->dev,
-+			"default timeout invalid, set to %d sec.\n",
-+			TIMEOUT_MAX);
-+	}
++		} else if (status & (TWI_BIT(NACK) | TWI_BIT(TXCOMP))) {
++			goto done;
 +
-+	ret = misc_register(&wdt->miscdev);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "failed to register wdt miscdev\n");
-+		goto err_iounmap;
++		} else if (status & TWI_BIT(TXRDY)) {
++			if (twi->acks_left > 0) {
++				twi->acks_left--;
++				twi_writel(twi, THR,
++					twi->buf[twi->len - twi->acks_left]);
++			} else
++				twi_writel(twi, CR, TWI_BIT(STOP));
++		}
++
++		if (twi->acks_left == 0)
++			twi_writel(twi, IDR, ~TWI_BIT(TXCOMP));
 +	}
 +
-+	platform_set_drvdata(pdev, wdt);
-+	wdt->miscdev.parent = &pdev->dev;
-+	dev_info(&pdev->dev, "AT32AP700X WDT at 0x%p\n", wdt->regs);
++	/* enabling this message helps trigger overruns/underruns ... */
++	dev_vdbg(&twi->adapter.dev,
++		"ISR: SR 0x%04X, mask 0x%04X, acks %i\n",
++		old_status,
++		twi->acks_left ? twi->mask : TWI_BIT(TXCOMP),
++		twi->acks_left);
 +
-+	return 0;
++	return IRQ_HANDLED;
 +
-+err_iounmap:
-+	iounmap(wdt->regs);
-+err_free:
-+	kfree(wdt);
-+	wdt = NULL;
-+	return ret;
-+}
++done:
++	/* Note weak fault reporting model:  we can't report how many
++	 * bytes we sent before the NAK, or let upper layers choose
++	 * whether to continue.  The I2C stack doesn't allow that...
++	 */
++	if (status & TWI_BIT(NACK)) {
++		dev_dbg(&twi->adapter.dev, "NACK received! %d to go\n",
++			twi->acks_left);
++		twi->status = -EPIPE;
 +
-+static int __exit at32_wdt_remove(struct platform_device *pdev)
-+{
-+	if (wdt && platform_get_drvdata(pdev) == wdt) {
-+		misc_deregister(&wdt->miscdev);
-+		iounmap(wdt->regs);
-+		kfree(wdt);
-+		wdt = NULL;
-+		platform_set_drvdata(pdev, NULL);
++	/* TX underrun morphs automagically into a premature STOP;
++	 * we'll probably observe UVRE even when it's not documented.
++	 */
++	} else if (twi->acks_left && (twi->mask & TWI_BIT(TXRDY))) {
++		dev_err(&twi->adapter.dev, "UNDERRUN TX!  %04x, %d to go\n",
++			old_status, twi->acks_left);
++		twi->status = -ENOSR;
 +	}
 +
-+	return 0;
-+}
++	twi_writel(twi, IDR, ~0UL);
++	complete(&twi->comp);
 +
-+static void at32_wdt_shutdown(struct platform_device *pdev)
-+{
-+	at32_wdt_stop();
-+}
++	dev_dbg(&twi->adapter.dev, "ISR: SR 0x%04X, acks %i --> %d\n",
++		old_status, twi->acks_left, twi->status);
 +
-+#ifdef CONFIG_PM
-+static int at32_wdt_suspend(struct platform_device *pdev, pm_message_t message)
-+{
-+	at32_wdt_stop();
-+	return 0;
++	return IRQ_HANDLED;
 +}
 +
-+static int at32_wdt_resume(struct platform_device *pdev)
++
++/*
++ * Return list of supported functionality.
++ *
++ * NOTE:  see warning above about repeated starts; this driver is falsely
++ * claiming to support "combined" transfers.  The mid-message STOPs mean
++ * some slaves will never work with this driver.  (Use i2c-gpio...)
++ */
++static u32 twi_func(struct i2c_adapter *adapter)
 +{
-+	if (wdt->users)
-+		at32_wdt_start();
-+	return 0;
++	return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL)
++		& ~I2C_FUNC_SMBUS_QUICK;
 +}
-+#else
-+#define at32_wdt_suspend NULL
-+#define at32_wdt_resume NULL
-+#endif
 +
-+static struct platform_driver at32_wdt_driver = {
-+	.remove		= __exit_p(at32_wdt_remove),
-+	.suspend	= at32_wdt_suspend,
-+	.resume		= at32_wdt_resume,
-+	.driver		= {
-+		.name	= "at32_wdt",
-+		.owner	= THIS_MODULE,
-+	},
-+	.shutdown	= at32_wdt_shutdown,
++static struct i2c_algorithm twi_algorithm = {
++	.master_xfer	= twi_xfer,
++	.functionality	= twi_func,
 +};
 +
-+static int __init at32_wdt_init(void)
++/*
++ * Main initialization routine.
++ */
++static int __init twi_probe(struct platform_device *pdev)
 +{
-+	return platform_driver_probe(&at32_wdt_driver, at32_wdt_probe);
-+}
-+module_init(at32_wdt_init);
++	struct atmel_twi *twi;
++	struct resource *regs;
++	struct clk *pclk;
++	struct i2c_adapter *adapter;
++	int rc, irq;
 +
-+static void __exit at32_wdt_exit(void)
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	clk_enable(pclk);
++
++	rc = -ENOMEM;
++	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
++	if (!twi) {
++		dev_dbg(&pdev->dev, "can't allocate interface!\n");
++		goto err_alloc_twi;
++	}
++
++	twi->pclk = pclk;
++	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!twi->regs)
++		goto err_ioremap;
++
++	irq = platform_get_irq(pdev, 0);
++	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
++	if (rc) {
++		dev_dbg(&pdev->dev, "can't bind irq!\n");
++		goto err_irq;
++	}
++	twi->irq = irq;
++
++	rc = twi_hwinit(twi);
++	if (rc) {
++		dev_err(&pdev->dev, "Unable to set baudrate\n");
++		goto err_hw_init;
++	}
++
++	adapter = &twi->adapter;
++	sprintf(adapter->name, "TWI");
++	adapter->algo = &twi_algorithm;
++	adapter->class = I2C_CLASS_ALL;
++	adapter->nr = pdev->id;
++	adapter->dev.parent = &pdev->dev;
++
++	platform_set_drvdata(pdev, twi);
++
++	rc = i2c_add_numbered_adapter(adapter);
++	if (rc) {
++		dev_dbg(&pdev->dev, "Adapter %s registration failed\n",
++			adapter->name);
++		goto err_register;
++	}
++
++	dev_info(&pdev->dev,
++		"Atmel TWI/I2C adapter (baudrate %dk) at 0x%08lx.\n",
++		 baudrate/1000, (unsigned long)regs->start);
++
++	return 0;
++
++
++err_register:
++	platform_set_drvdata(pdev, NULL);
++
++err_hw_init:
++	free_irq(irq, twi);
++
++err_irq:
++	iounmap(twi->regs);
++
++err_ioremap:
++	kfree(twi);
++
++err_alloc_twi:
++	clk_disable(pclk);
++	clk_put(pclk);
++
++	return rc;
++}
++
++static int __exit twi_remove(struct platform_device *pdev)
 +{
-+	platform_driver_unregister(&at32_wdt_driver);
++	struct atmel_twi *twi = platform_get_drvdata(pdev);
++	int res;
++
++	platform_set_drvdata(pdev, NULL);
++	res = i2c_del_adapter(&twi->adapter);
++	twi_writel(twi, CR, TWI_BIT(MSDIS));
++	iounmap(twi->regs);
++	clk_disable(twi->pclk);
++	clk_put(twi->pclk);
++	free_irq(twi->irq, twi);
++	kfree(twi);
++
++	return res;
 +}
-+module_exit(at32_wdt_exit);
 +
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("Watchdog driver for Atmel AT32AP700X");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
-diff -x .git -Nur linux-2.6.22.1/drivers/char/watchdog/Kconfig linux-avr32.git/drivers/char/watchdog/Kconfig
---- linux-2.6.22.1/drivers/char/watchdog/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/char/watchdog/Kconfig	2007-07-12 13:59:59.000000000 +0200
-@@ -187,6 +187,26 @@
- 
- 	  Say N if you are unsure.
- 
-+# AVR32 Architecture
++static struct platform_driver twi_driver = {
++	.remove		= __exit_p(twi_remove),
++	.driver		= {
++		.name	= "atmel_twi",
++		.owner	= THIS_MODULE,
++	},
++};
 +
-+config AT32AP700X_WDT
-+	tristate "AT32AP700x watchdog"
-+	depends on WATCHDOG && CPU_AT32AP7000
-+	help
-+	  Watchdog timer embedded into AT32AP700x devices. This will reboot
-+	  your system when the timeout is reached.
-+
-+config AT32AP700X_WDT_TIMEOUT
-+	int "Timeout value for AT32AP700x watchdog"
-+	depends on AT32AP700X_WDT
-+	default "2"
-+	range 1 2
-+	help
-+	  Sets the timeout value for the watchdog in AT32AP700x devices.
-+	  Limited by hardware to be 1 or 2 seconds.
-+
-+	  Set to 2 seconds by default.
-+
- # X86 (i386 + ia64 + x86_64) Architecture
- 
- config ACQUIRE_WDT
-diff -x .git -Nur linux-2.6.22.1/drivers/char/watchdog/Makefile linux-avr32.git/drivers/char/watchdog/Makefile
---- linux-2.6.22.1/drivers/char/watchdog/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/char/watchdog/Makefile	2007-07-12 13:59:59.000000000 +0200
-@@ -36,6 +36,9 @@
- obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
- obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
- 
-+# AVR32 Architecture
-+obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
-+
- # X86 (i386 + ia64 + x86_64) Architecture
- obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
- obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
-diff -x .git -Nur linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h linux-avr32.git/drivers/i2c/busses/atmeltwi.h
---- linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/i2c/busses/atmeltwi.h	2007-06-06 11:33:51.000000000 +0200
++static int __init atmel_twi_init(void)
++{
++	return platform_driver_probe(&twi_driver, twi_probe);
++}
++
++static void __exit atmel_twi_exit(void)
++{
++	platform_driver_unregister(&twi_driver);
++}
++
++module_init(atmel_twi_init);
++module_exit(atmel_twi_exit);
++
++MODULE_AUTHOR("Espen Krangnes");
++MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/i2c/busses/i2c-atmeltwi.h b/drivers/i2c/busses/i2c-atmeltwi.h
+new file mode 100644
+index 0000000..1aca065
+--- /dev/null
++++ b/drivers/i2c/busses/i2c-atmeltwi.h
 @@ -0,0 +1,117 @@
 +/*
 + * Register definitions for the Atmel Two-Wire Interface
 + */
 +
-+#ifndef __ASM_AVR32_TWI_H__
-+#define __ASM_AVR32_TWI_H__
++#ifndef __ATMELTWI_H__
++#define __ATMELTWI_H__
 +
 +/* TWI register offsets */
 +#define TWI_CR					0x0000
@@ -5002,1026 +4514,367 @@ diff -x .git -Nur linux-2.6.22.1/drivers/i2c/busses/atmeltwi.h linux-avr32.git/d
 +/* Bit manipulation macros */
 +#define TWI_BIT(name)					\
 +	(1 << TWI_##name##_OFFSET)
-+#define TWI_BF(name,value)				\
++#define TWI_BF(name, value)				\
 +	(((value) & ((1 << TWI_##name##_SIZE) - 1))	\
 +	 << TWI_##name##_OFFSET)
-+#define TWI_BFEXT(name,value)				\
++#define TWI_BFEXT(name, value)				\
 +	(((value) >> TWI_##name##_OFFSET)		\
 +	 & ((1 << TWI_##name##_SIZE) - 1))
-+#define TWI_BFINS(name,value,old)			\
++#define TWI_BFINS(name, value, old)			\
 +	(((old) & ~(((1 << TWI_##name##_SIZE) - 1)	\
 +		    << TWI_##name##_OFFSET))		\
-+	 | TWI_BF(name,value))
++	 | TWI_BF(name, (value)))
 +
 +/* Register access macros */
-+#define twi_readl(port,reg)				\
++#define twi_readl(port, reg)				\
 +	__raw_readl((port)->regs + TWI_##reg)
-+#define twi_writel(port,reg,value)			\
++#define twi_writel(port, reg, value)			\
 +	__raw_writel((value), (port)->regs + TWI_##reg)
 +
-+#endif /* __ASM_AVR32_TWI_H__ */
-diff -x .git -Nur linux-2.6.22.1/drivers/i2c/busses/i2c-atmeltwi.c linux-avr32.git/drivers/i2c/busses/i2c-atmeltwi.c
---- linux-2.6.22.1/drivers/i2c/busses/i2c-atmeltwi.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/i2c/busses/i2c-atmeltwi.c	2007-07-13 11:24:16.000000000 +0200
-@@ -0,0 +1,383 @@
++#endif /* __ATMELTWI_H__ */
+diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
+index 73e248f..9e848cc 100644
+--- a/drivers/misc/Kconfig
++++ b/drivers/misc/Kconfig
+@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY
+ 
+ 	  If you are not sure, say Y here.
+ 
++config ATMEL_SSC
++	tristate "Device driver for Atmel SSC peripheral"
++	depends on AVR32 || ARCH_AT91
++	---help---
++	  This option enables device driver support for Atmel Syncronized
++	  Serial Communication peripheral (SSC).
++
++	  The SSC peripheral supports a wide variety of serial frame based
++	  communications, i.e. I2S, SPI, etc.
+ 
+ endif # MISC_DEVICES
+diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
+index b5ce0e3..40d8ed1 100644
+--- a/drivers/misc/Makefile
++++ b/drivers/misc/Makefile
+@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4)		+= ioc4.o
+ obj-$(CONFIG_SONY_LAPTOP)	+= sony-laptop.o
+ obj-$(CONFIG_THINKPAD_ACPI)	+= thinkpad_acpi.o
+ obj-$(CONFIG_EEPROM_93CX6)	+= eeprom_93cx6.o
++obj-$(CONFIG_ATMEL_SSC)		+= atmel-ssc.o
+diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c
+new file mode 100644
+index 0000000..058ccac
+--- /dev/null
++++ b/drivers/misc/atmel-ssc.c
+@@ -0,0 +1,174 @@
 +/*
-+ * i2c Support for Atmel's Two-Wire Interface (TWI)
-+ *
-+ * Based on the work of Copyright (C) 2004 Rick Bronson
-+ * Converted to 2.6 by Andrew Victor <andrew at sanpeople.com>
-+ * Ported to AVR32 and heavily modified by Espen Krangnes
-+ * <ekrangnes at atmel.com>
-+ *
-+ * Copyright (C) 2006 Atmel Corporation
-+ *
-+ * Borrowed heavily from the original work by:
-+ * Copyright (C) 2000 Philip Edelbrock <phil at stimpy.netroedge.com>
++ * Atmel SSC driver
 + *
-+ * Partialy rewriten by Karel Hojdar <cmkaho at seznam.cz>
-+ * bugs removed, interrupt routine markedly rewritten
++ * Copyright (C) 2007 Atmel Corporation
 + *
 + * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
 + */
 +
-+
-+#include <linux/err.h>
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/i2c.h>
-+#include <linux/init.h>
-+#include <linux/clk.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
 +#include <linux/platform_device.h>
-+#include <linux/completion.h>
-+#include <asm/io.h>
-+#include <linux/time.h>
-+#include "atmeltwi.h"
-+
-+static unsigned int baudrate = CONFIG_I2C_ATMELTWI_BAUDRATE;
-+module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
-+MODULE_PARM_DESC(baudrate, "The TWI baudrate");
-+
-+
-+struct atmel_twi {
-+	void __iomem *regs;
-+	struct i2c_adapter adapter;
-+	struct clk *pclk;
-+	spinlock_t lock;
-+	struct completion comp;
-+	u32 intmask;
-+	u8 *buf;
-+	u8 len;
-+	u8 acks_left;
-+	u8 nack;
-+	unsigned int irq;
++#include <linux/list.h>
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/io.h>
++#include <linux/list.h>
++#include <linux/spinlock.h>
++#include <linux/atmel-ssc.h>
 +
-+};
-+#define to_atmel_twi(adap) container_of(adap, struct atmel_twi, adapter)
++/* Serialize access to ssc_list and user count */
++static DEFINE_SPINLOCK(user_lock);
++static LIST_HEAD(ssc_list);
 +
-+/*
-+ * Initialize the TWI hardware registers.
-+ */
-+static int __devinit twi_hwinit(struct atmel_twi *twi)
++struct ssc_device *ssc_request(unsigned int ssc_num)
 +{
-+	unsigned long cdiv, ckdiv=0;
++	int ssc_valid = 0;
++	struct ssc_device *ssc;
 +
-+	twi_writel(twi, IDR, ~0UL);
-+	twi_writel(twi, CR, TWI_BIT(SWRST));	/*Reset peripheral*/
-+	twi_readl(twi, SR);
++	spin_lock(&user_lock);
++	list_for_each_entry(ssc, &ssc_list, list) {
++		if (ssc->pdev->id == ssc_num) {
++			ssc_valid = 1;
++			break;
++		}
++	}
 +
-+	cdiv = (clk_get_rate(twi->pclk) / (2 * baudrate)) - 4;
++	if (!ssc_valid) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "could not find requested device\n");
++		return ERR_PTR(-ENODEV);
++	}
 +
-+	while (cdiv > 255) {
-+		ckdiv++;
-+		cdiv = cdiv >> 1;
++	if (ssc->user) {
++		spin_unlock(&user_lock);
++		dev_dbg(&ssc->pdev->dev, "module busy\n");
++		return ERR_PTR(-EBUSY);
 +	}
++	ssc->user++;
++	spin_unlock(&user_lock);
 +
-+	if (ckdiv > 7)
-+		return -EINVAL;
-+	else
-+		twi_writel(twi, CWGR, (TWI_BF(CKDIV, ckdiv)
-+			       | TWI_BF(CHDIV, cdiv)
-+			       | TWI_BF(CLDIV, cdiv)));
-+	return 0;
++	clk_enable(ssc->clk);
++
++	return ssc;
 +}
++EXPORT_SYMBOL(ssc_request);
 +
-+/*
-+ * Waits for the i2c status register to set the specified bitmask
-+ * Returns 0 if timed out (~100ms).
-+ */
-+static short twi_complete(struct atmel_twi *twi, u32 mask)
++void ssc_free(struct ssc_device *ssc)
 +{
-+	int timeout = msecs_to_jiffies(100);
-+
-+	twi->intmask = mask;
-+	init_completion(&twi->comp);
-+
-+	twi_writel(twi, IER, mask);
-+
-+	if (!wait_for_completion_timeout(&twi->comp, timeout)) {
-+		/* RESET TWI interface */
-+		twi_writel(twi, CR, TWI_BIT(SWRST));
-+
-+		/* Reinitialize TWI */
-+		twi_hwinit(twi);
-+
-+		return -ETIMEDOUT;
++	spin_lock(&user_lock);
++	if (ssc->user) {
++		ssc->user--;
++		clk_disable(ssc->clk);
++	} else {
++		dev_dbg(&ssc->pdev->dev, "device already free\n");
 +	}
-+	return 0;
++	spin_unlock(&user_lock);
 +}
++EXPORT_SYMBOL(ssc_free);
 +
-+/*
-+ * Generic i2c master transfer entrypoint.
-+ */
-+static int twi_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
++static int __init ssc_probe(struct platform_device *pdev)
 +{
-+	struct atmel_twi *twi = to_atmel_twi(adap);
-+	struct i2c_msg *pmsg;
-+	int i;
++	int retval = 0;
++	struct resource *regs;
++	struct ssc_device *ssc;
 +
-+	/* get first message */
-+	pmsg = msgs;
++	ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL);
++	if (!ssc) {
++		dev_dbg(&pdev->dev, "out of memory\n");
++		retval = -ENOMEM;
++		goto out;
++	}
 +
-+	dev_dbg(&adap->dev, "twi_xfer: processing %d messages:\n", num);
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs) {
++		dev_dbg(&pdev->dev, "no mmio resource defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
 +
-+	twi->nack = 0;
-+	for (i = 0; i < num; i++, pmsg++) {
-+		twi->len = pmsg->len;
-+		twi->buf = pmsg->buf;
-+		twi->acks_left = pmsg->len;
-+		twi_writel(twi, MMR, TWI_BF(DADR, pmsg->addr) |
-+			(pmsg->flags & I2C_M_RD ? TWI_BIT(MREAD) : 0));
-+		twi_writel(twi, IADR, TWI_BF(IADR, pmsg->addr));
++	ssc->clk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(ssc->clk)) {
++		dev_dbg(&pdev->dev, "no pclk clock defined\n");
++		retval = -ENXIO;
++		goto out_free;
++	}
 +
-+		dev_dbg(&adap->dev,"#%d: internal addr %d %s byte%s %s 0x%02x\n",
-+			i,pmsg->len, pmsg->flags & I2C_M_RD ? "reading" : "writing",
-+			pmsg->len > 1 ? "s" : "",
-+			pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
++	ssc->pdev = pdev;
++	ssc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!ssc->regs) {
++		dev_dbg(&pdev->dev, "ioremap failed\n");
++		retval = -EINVAL;
++		goto out_clk;
++	}
 +
-+		/* enable */
-+		twi_writel(twi, CR, TWI_BIT(MSEN));
++	/* disable all interrupts */
++	clk_enable(ssc->clk);
++	ssc_writel(ssc->regs, IDR, ~0UL);
++	ssc_readl(ssc->regs, SR);
++	clk_disable(ssc->clk);
 +
-+		if (pmsg->flags & I2C_M_RD) {
-+			if (twi->len == 1)
-+				twi_writel(twi, CR,
-+					TWI_BIT(START) | TWI_BIT(STOP));
-+			else
-+				twi_writel(twi, CR, TWI_BIT(START));
++	ssc->irq = platform_get_irq(pdev, 0);
++	if (!ssc->irq) {
++		dev_dbg(&pdev->dev, "could not get irq\n");
++		retval = -ENXIO;
++		goto out_unmap;
++	}
 +
-+			if (twi_complete(twi, TWI_BIT(RXRDY)) == -ETIMEDOUT) {
-+				dev_dbg(&adap->dev, "RXRDY timeout. Stopped with %d bytes left\n",
-+					twi->acks_left);
-+				return -ETIMEDOUT;
-+			}
-+		} else {
-+			twi_writel(twi, THR, twi->buf[0]);
-+			if (twi_complete(twi, TWI_BIT(TXRDY)) == -ETIMEDOUT) {
-+				dev_dbg(&adap->dev, "TXRDY timeout. Stopped with %d bytes left\n",
-+				twi->acks_left);
-+				return -ETIMEDOUT;
-+			}
++	spin_lock(&user_lock);
++	list_add_tail(&ssc->list, &ssc_list);
++	spin_unlock(&user_lock);
 +
-+			if (twi->nack)
-+			    return -ENODEV;
-+		}
++	platform_set_drvdata(pdev, ssc);
 +
-+		/* Disable TWI interface */
-+		twi_writel(twi, CR, TWI_BIT(MSDIS));
++	dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n",
++			ssc->regs, ssc->irq);
 +
-+	} /* end cur msg */
++	goto out;
 +
-+	return i;
++out_unmap:
++	iounmap(ssc->regs);
++out_clk:
++	clk_put(ssc->clk);
++out_free:
++	kfree(ssc);
++out:
++	return retval;
 +}
 +
-+
-+static irqreturn_t twi_interrupt(int irq, void *dev_id)
++static int __devexit ssc_remove(struct platform_device *pdev)
 +{
-+	struct atmel_twi *twi = dev_id;
-+	int status = twi_readl(twi, SR);
++	struct ssc_device *ssc = platform_get_drvdata(pdev);
 +
-+	/* Save state for later debug prints */
-+	int old_mask = twi->intmask;
-+	int old_status = status;
++	spin_lock(&user_lock);
++	iounmap(ssc->regs);
++	clk_put(ssc->clk);
++	list_del(&ssc->list);
++	kfree(ssc);
++	spin_unlock(&user_lock);
 +
-+	if (twi->intmask & status) {
-+		if (status & TWI_BIT(NACK))
-+			goto nack;
++	return 0;
++}
 +
-+		status &= twi->intmask;
-+
-+		if (status & TWI_BIT(TXCOMP))
-+		    goto complete;
-+
-+		else if (status & TWI_BIT(RXRDY)) {
-+			if ( twi->acks_left > 0 ) {
-+			    twi->buf[twi->len - twi->acks_left] =
-+				twi_readl(twi, RHR);
-+			    twi->acks_left--;
-+			}
-+			if ( twi->acks_left == 1 )
-+				twi_writel(twi, CR, TWI_BIT(STOP));
-+
-+			if (twi->acks_left == 0 ) {
-+				twi->intmask = TWI_BIT(TXCOMP);
-+				twi_writel(twi, IER, TWI_BIT(TXCOMP));
-+			}
-+		} else if (status & TWI_BIT(TXRDY)) {
-+			twi->acks_left--;
-+			if ( twi->acks_left == 0 ) {
-+				twi->intmask = TWI_BIT(TXCOMP);
-+				twi_writel(twi, IER, TWI_BIT(TXCOMP));
-+			} else if (twi->acks_left > 0)
-+				twi_writel(twi, THR, twi->buf[twi->len - twi->acks_left]);
-+		}
-+	}
-+
-+	dev_dbg(&twi->adapter.dev,
-+		"TWI ISR, SR 0x%08X, intmask 0x%08X, acks_left %i.\n",
-+		old_status, old_mask, twi->acks_left);
-+
-+	return IRQ_HANDLED;
-+
-+nack:
-+	dev_dbg(&twi->adapter.dev, "NACK received!\n");
-+	twi->nack = 1;
-+
-+complete:
-+	twi_writel(twi, IDR, ~0UL);
-+	complete(&twi->comp);
-+
-+	dev_dbg(&twi->adapter.dev,
-+		"TWI ISR, SR 0x%08X, intmask 0x%08X, \
-+		acks_left %i - completed.\n",
-+		old_status, old_mask, twi->acks_left);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+
-+/*
-+ * Return list of supported functionality.
-+ */
-+static u32 twi_func(struct i2c_adapter *adapter)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
-+}
-+
-+/* For now, we only handle combined mode (smbus) */
-+static struct i2c_algorithm twi_algorithm = {
-+	.master_xfer	= twi_xfer,
-+	.functionality	= twi_func,
-+};
-+
-+/*
-+ * Main initialization routine.
-+ */
-+static int __devinit twi_probe(struct platform_device *pdev)
-+{
-+	struct atmel_twi *twi;
-+	struct resource *regs;
-+	struct clk *pclk;
-+	struct i2c_adapter *adapter;
-+	int rc, irq;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs)
-+		return -ENXIO;
-+
-+	pclk = clk_get(&pdev->dev, "pclk");
-+	if (IS_ERR(pclk))
-+		return PTR_ERR(pclk);
-+	clk_enable(pclk);
-+
-+	rc = -ENOMEM;
-+	twi = kzalloc(sizeof(struct atmel_twi), GFP_KERNEL);
-+	if (!twi) {
-+		dev_err(&pdev->dev, "can't allocate interface!\n");
-+		goto err_alloc_twi;
-+	}
-+
-+	twi->pclk = pclk;
-+	twi->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!twi->regs)
-+		goto err_ioremap;
-+
-+	irq = platform_get_irq(pdev,0);
-+	rc = request_irq(irq, twi_interrupt, 0, "twi", twi);
-+	if (rc) {
-+		dev_err(&pdev->dev, "can't bind irq!\n");
-+		goto err_irq;
-+	}
-+	twi->irq = irq;
-+
-+	rc = twi_hwinit(twi);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Unable to set baudrate\n");
-+		goto err_hw_init;
-+	}
-+
-+	adapter = &twi->adapter;
-+	sprintf(adapter->name, "TWI");
-+	adapter->algo = &twi_algorithm;
-+	adapter->class = I2C_CLASS_HWMON;
-+	adapter->dev.parent = &pdev->dev;
-+
-+	platform_set_drvdata(pdev, twi);
-+
-+	rc = i2c_add_adapter(adapter);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Adapter %s registration failed\n",
-+			adapter->name);
-+		goto err_register;
-+	}
-+
-+	dev_info(&pdev->dev, "Atmel TWI i2c bus device (baudrate %dk) at 0x%08lx.\n",
-+		 baudrate/1000, (unsigned long)regs->start);
-+
-+	return 0;
-+
-+
-+err_register:
-+	platform_set_drvdata(pdev, NULL);
-+
-+err_hw_init:
-+	free_irq(irq, twi);
-+
-+err_irq:
-+	iounmap(twi->regs);
-+
-+err_ioremap:
-+	kfree(twi);
-+
-+err_alloc_twi:
-+	clk_disable(pclk);
-+	clk_put(pclk);
-+
-+	return rc;
-+}
-+
-+static int __devexit twi_remove(struct platform_device *pdev)
-+{
-+	struct atmel_twi *twi = platform_get_drvdata(pdev);
-+	int res;
-+
-+	platform_set_drvdata(pdev, NULL);
-+	res = i2c_del_adapter(&twi->adapter);
-+	twi_writel(twi, CR, TWI_BIT(MSDIS));
-+	iounmap(twi->regs);
-+	clk_disable(twi->pclk);
-+	clk_put(twi->pclk);
-+	free_irq(twi->irq, twi);
-+	kfree(twi);
-+
-+	return res;
-+}
-+
-+static struct platform_driver twi_driver = {
-+	.probe		= twi_probe,
-+	.remove		= __devexit_p(twi_remove),
++static struct platform_driver ssc_driver = {
++	.remove		= __devexit_p(ssc_remove),
 +	.driver		= {
-+		.name	= "atmel_twi",
-+		.owner	= THIS_MODULE,
++		.name		= "ssc",
 +	},
 +};
 +
-+static int __init atmel_twi_init(void)
++static int __init ssc_init(void)
 +{
-+	return platform_driver_register(&twi_driver);
++	return platform_driver_probe(&ssc_driver, ssc_probe);
 +}
++module_init(ssc_init);
 +
-+static void __exit atmel_twi_exit(void)
++static void __exit ssc_exit(void)
 +{
-+	platform_driver_unregister(&twi_driver);
++	platform_driver_unregister(&ssc_driver);
 +}
++module_exit(ssc_exit);
 +
-+module_init(atmel_twi_init);
-+module_exit(atmel_twi_exit);
-+
-+MODULE_AUTHOR("Espen Krangnes");
-+MODULE_DESCRIPTION("I2C driver for Atmel TWI");
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91");
 +MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/i2c/busses/Kconfig linux-avr32.git/drivers/i2c/busses/Kconfig
---- linux-2.6.22.1/drivers/i2c/busses/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/i2c/busses/Kconfig	2007-07-12 13:59:59.000000000 +0200
-@@ -4,6 +4,26 @@
+diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
+index e23082f..1de1716 100644
+--- a/drivers/mmc/host/Kconfig
++++ b/drivers/mmc/host/Kconfig
+@@ -74,6 +74,16 @@ config MMC_AT91
  
- menu "I2C Hardware Bus support"
+ 	  If unsure, say N.
  
-+config I2C_ATMELTWI
-+	tristate "Atmel TWI/I2C"
-+	depends on I2C
-+	help
-+	  Atmel on-chip TWI controller. Say Y if you have an AT32 or
-+	  AT91-based device and want to use its built-in TWI
-+	  functionality. Atmel's TWI is compatible with Philips' I2C
-+	  protocol. If in doubt, say NO
-+
-+config I2C_ATMELTWI_BAUDRATE
-+	prompt "Atmel TWI baudrate"
-+	depends on I2C_ATMELTWI
-+	int
-+	default 100000
++config MMC_ATMELMCI
++	tristate "Atmel Multimedia Card Interface support"
++	depends on AVR32 && MMC
 +	help
-+	  Set the TWI/I2C baudrate. This will alter the default value. A
-+	  different baudrate can be set by using a module parameter as well. If
-+	  no parameter is provided when loading, this is the value that will be
-+	  used.
-+
- config I2C_ALI1535
- 	tristate "ALI 1535"
- 	depends on PCI
-diff -x .git -Nur linux-2.6.22.1/drivers/i2c/busses/Makefile linux-avr32.git/drivers/i2c/busses/Makefile
---- linux-2.6.22.1/drivers/i2c/busses/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/i2c/busses/Makefile	2007-07-12 13:59:59.000000000 +0200
-@@ -52,6 +52,7 @@
- obj-$(CONFIG_I2C_VOODOO3)	+= i2c-voodoo3.o
- obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
- obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
-+obj-$(CONFIG_I2C_ATMELTWI)	+= i2c-atmeltwi.o
++	  This selects the Atmel Multimedia Card Interface. If you have
++	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
++	  slot, say Y or M here.
++
++	  If unsure, say N.
++
+ config MMC_IMX
+ 	tristate "Motorola i.MX Multimedia Card Interface support"
+ 	depends on ARCH_IMX
+diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
+index 6685f64..4b8e6e2 100644
+--- a/drivers/mmc/host/Makefile
++++ b/drivers/mmc/host/Makefile
+@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD)		+= wbsd.o
+ obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
+ obj-$(CONFIG_MMC_OMAP)		+= omap.o
+ obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
++obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
+ obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
  
- ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
- EXTRA_CFLAGS += -DDEBUG
-diff -x .git -Nur linux-2.6.22.1/drivers/input/mouse/gpio_mouse.c linux-avr32.git/drivers/input/mouse/gpio_mouse.c
---- linux-2.6.22.1/drivers/input/mouse/gpio_mouse.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/input/mouse/gpio_mouse.c	2007-07-13 11:24:16.000000000 +0200
-@@ -0,0 +1,196 @@
+diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c
+new file mode 100644
+index 0000000..45323c9
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.c
+@@ -0,0 +1,1161 @@
 +/*
-+ * Driver for simulating a mouse on GPIO lines.
++ * Atmel MultiMedia Card Interface driver
 + *
-+ * Copyright (C) 2007 Atmel Corporation
++ * Copyright (C) 2004-2006 Atmel Corporation
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
-+
++#include <linux/blkdev.h>
++#include <linux/clk.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
 +#include <linux/init.h>
-+#include <linux/version.h>
++#include <linux/interrupt.h>
++#include <linux/ioport.h>
 +#include <linux/module.h>
 +#include <linux/platform_device.h>
-+#include <linux/input-polldev.h>
-+#include <linux/gpio_mouse.h>
-+
-+#include <asm/gpio.h>
-+
-+/*
-+ * Timer function which is run every scan_ms ms when the device is opened.
-+ * The dev input varaible is set to the the input_dev pointer.
-+ */
-+static void gpio_mouse_scan(struct input_polled_dev *dev)
-+{
-+	struct gpio_mouse_platform_data *gpio = dev->private;
-+	struct input_dev *input = dev->input;
-+	int x, y;
-+
-+	if (gpio->bleft >= 0)
-+		input_report_key(input, BTN_LEFT,
-+				gpio_get_value(gpio->bleft) ^ gpio->polarity);
-+	if (gpio->bmiddle >= 0)
-+		input_report_key(input, BTN_MIDDLE,
-+				gpio_get_value(gpio->bmiddle) ^ gpio->polarity);
-+	if (gpio->bright >= 0)
-+		input_report_key(input, BTN_RIGHT,
-+				gpio_get_value(gpio->bright) ^ gpio->polarity);
-+
-+	x = (gpio_get_value(gpio->right) ^ gpio->polarity)
-+		- (gpio_get_value(gpio->left) ^ gpio->polarity);
-+	y = (gpio_get_value(gpio->down) ^ gpio->polarity)
-+		- (gpio_get_value(gpio->up) ^ gpio->polarity);
-+
-+	input_report_rel(input, REL_X, x);
-+	input_report_rel(input, REL_Y, y);
-+	input_sync(input);
-+}
-+
-+static int __init gpio_mouse_probe(struct platform_device *pdev)
-+{
-+	struct gpio_mouse_platform_data *pdata = pdev->dev.platform_data;
-+	struct input_polled_dev *input_poll;
-+	struct input_dev *input;
-+	int pin, i;
-+	int error;
-+
-+	if (!pdata) {
-+		dev_err(&pdev->dev, "no platform data\n");
-+		error = -ENXIO;
-+		goto out;
-+	}
-+
-+	if (pdata->scan_ms < 0) {
-+		dev_err(&pdev->dev, "invalid scan time\n");
-+		error = -EINVAL;
-+		goto out;
-+	}
 +
-+	for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) {
-+		pin = pdata->pins[i];
++#include <linux/mmc/host.h>
 +
-+		if (pin < 0) {
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
 +
-+			if (i <= GPIO_MOUSE_PIN_RIGHT) {
-+				/* Mouse direction is required. */
-+				dev_err(&pdev->dev,
-+					"missing GPIO for directions\n");
-+				error = -EINVAL;
-+				goto out_free_gpios;
-+			}
++#include "atmel-mci.h"
 +
-+			if (i == GPIO_MOUSE_PIN_BLEFT)
-+				dev_dbg(&pdev->dev, "no left button defined\n");
++#define DRIVER_NAME "atmel_mci"
 +
-+		} else {
-+			error = gpio_request(pin, "gpio_mouse");
-+			if (error) {
-+				dev_err(&pdev->dev, "fail %d pin (%d idx)\n",
-+					pin, i);
-+				goto out_free_gpios;
-+			}
++#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
++				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
 +
-+			gpio_direction_input(pin);
-+		}
-+	}
++enum {
++	EVENT_CMD_COMPLETE = 0,
++	EVENT_DATA_COMPLETE,
++	EVENT_DATA_ERROR,
++	EVENT_STOP_SENT,
++	EVENT_STOP_COMPLETE,
++	EVENT_DMA_ERROR,
++	EVENT_CARD_DETECT,
++};
 +
-+	input_poll = input_allocate_polled_device();
-+	if (!input_poll) {
-+		dev_err(&pdev->dev, "not enough memory for input device\n");
-+		error = -ENOMEM;
-+		goto out_free_gpios;
-+	}
++struct atmel_mci_dma {
++	struct dma_request_sg	req;
++	unsigned short		rx_periph_id;
++	unsigned short		tx_periph_id;
++};
 +
-+	platform_set_drvdata(pdev, input_poll);
++struct atmel_mci {
++	struct mmc_host		*mmc;
++	void __iomem		*regs;
++	struct atmel_mci_dma	dma;
 +
-+	/* set input-polldev handlers */
-+	input_poll->private = pdata;
-+	input_poll->poll = gpio_mouse_scan;
-+	input_poll->poll_interval = pdata->scan_ms;
++	struct mmc_request	*mrq;
++	struct mmc_command	*cmd;
++	struct mmc_data		*data;
 +
-+	input = input_poll->input;
-+	input->name = pdev->name;
-+	input->id.bustype = BUS_HOST;
-+	input->dev.parent = &pdev->dev;
++	u32			cmd_status;
++	u32			data_status;
++	u32			stop_status;
++	u32			stop_cmdr;
 +
-+	input_set_capability(input, EV_REL, REL_X);
-+	input_set_capability(input, EV_REL, REL_Y);
-+	if (pdata->bleft >= 0)
-+		input_set_capability(input, EV_KEY, BTN_LEFT);
-+	if (pdata->bmiddle >= 0)
-+		input_set_capability(input, EV_KEY, BTN_MIDDLE);
-+	if (pdata->bright >= 0)
-+		input_set_capability(input, EV_KEY, BTN_RIGHT);
++	struct tasklet_struct	tasklet;
++	unsigned long		pending_events;
++	unsigned long		completed_events;
 +
-+	error = input_register_polled_device(input_poll);
-+	if (error) {
-+		dev_err(&pdev->dev, "could not register input device\n");
-+		goto out_free_polldev;
-+	}
++	int			present;
++	int			detect_pin;
++	int			wp_pin;
 +
-+	dev_dbg(&pdev->dev, "%d ms scan time, buttons: %s%s%s\n",
-+			pdata->scan_ms,
-+			pdata->bleft < 0 ? "" : "left ",
-+			pdata->bmiddle < 0 ? "" : "middle ",
-+			pdata->bright < 0 ? "" : "right");
++	unsigned long		bus_hz;
++	unsigned long		mapbase;
++	struct clk		*mck;
++	struct platform_device	*pdev;
 +
-+	return 0;
++#ifdef CONFIG_DEBUG_FS
++	struct dentry		*debugfs_root;
++	struct dentry		*debugfs_regs;
++	struct dentry		*debugfs_req;
++	struct dentry		*debugfs_pending_events;
++	struct dentry		*debugfs_completed_events;
++#endif
++};
 +
-+ out_free_polldev:
-+	input_free_polled_device(input_poll);
-+	platform_set_drvdata(pdev, NULL);
-+
-+ out_free_gpios:
-+	while (--i >= 0) {
-+		pin = pdata->pins[i];
-+		if (pin)
-+			gpio_free(pin);
-+	}
-+ out:
-+	return error;
-+}
-+
-+static int __devexit gpio_mouse_remove(struct platform_device *pdev)
-+{
-+	struct input_polled_dev *input = platform_get_drvdata(pdev);
-+	struct gpio_mouse_platform_data *pdata = input->private;
-+	int pin, i;
-+
-+	input_unregister_polled_device(input);
-+	input_free_polled_device(input);
-+
-+	for (i = 0; i < GPIO_MOUSE_PIN_MAX; i++) {
-+		pin = pdata->pins[i];
-+		if (pin >= 0)
-+			gpio_free(pin);
-+	}
-+
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+struct platform_driver gpio_mouse_device_driver = {
-+	.remove		= __devexit_p(gpio_mouse_remove),
-+	.driver		= {
-+		.name	= "gpio_mouse",
-+	}
-+};
-+
-+static int __init gpio_mouse_init(void)
-+{
-+	return platform_driver_probe(&gpio_mouse_device_driver,
-+			gpio_mouse_probe);
-+}
-+module_init(gpio_mouse_init);
-+
-+static void __exit gpio_mouse_exit(void)
-+{
-+	platform_driver_unregister(&gpio_mouse_device_driver);
-+}
-+module_exit(gpio_mouse_exit);
-+
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("GPIO mouse driver");
-+MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/input/mouse/Kconfig linux-avr32.git/drivers/input/mouse/Kconfig
---- linux-2.6.22.1/drivers/input/mouse/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/input/mouse/Kconfig	2007-07-13 11:24:16.000000000 +0200
-@@ -216,4 +216,20 @@
- 	help
- 	  Say Y here to support HIL pointers.
- 
-+config MOUSE_GPIO
-+	tristate "GPIO mouse"
-+	depends on GENERIC_GPIO
-+	select INPUT_POLLDEV
-+	help
-+	  This driver simulates a mouse on GPIO lines of various CPUs (and some
-+	  other chips).
-+
-+	  Say Y here if your device has buttons or a simple joystick connected
-+	  directly to GPIO lines. Your board-specific setup logic must also
-+	  provide a platform device and platform data saying which GPIOs are
-+	  used.
-+
-+	  To compile this driver as a module, choose M here: the
-+	  module will be called gpio_mouse.
-+
- endif
-diff -x .git -Nur linux-2.6.22.1/drivers/input/mouse/Makefile linux-avr32.git/drivers/input/mouse/Makefile
---- linux-2.6.22.1/drivers/input/mouse/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/input/mouse/Makefile	2007-07-13 11:24:16.000000000 +0200
-@@ -15,6 +15,7 @@
- obj-$(CONFIG_MOUSE_SERIAL)	+= sermouse.o
- obj-$(CONFIG_MOUSE_HIL)		+= hil_ptr.o
- obj-$(CONFIG_MOUSE_VSXXXAA)	+= vsxxxaa.o
-+obj-$(CONFIG_MOUSE_GPIO)	+= gpio_mouse.o
- 
- psmouse-objs := psmouse-base.o synaptics.o
- 
-diff -x .git -Nur linux-2.6.22.1/drivers/leds/Kconfig linux-avr32.git/drivers/leds/Kconfig
---- linux-2.6.22.1/drivers/leds/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/leds/Kconfig	2007-07-12 14:00:02.000000000 +0200
-@@ -95,6 +95,14 @@
- 	help
- 	  This option enables support for the front LED on Cobalt Server
- 
-+config LEDS_GPIO
-+	tristate "LED Support for GPIO connected LEDs"
-+	depends on LEDS_CLASS && GENERIC_GPIO
-+	help
-+	  This option enables support for the LEDs connected to GPIO
-+	  outputs. To be useful the particular board must have LEDs
-+	  and they must be connected to the GPIO lines.
-+
- comment "LED Triggers"
- 
- config LEDS_TRIGGERS
-diff -x .git -Nur linux-2.6.22.1/drivers/leds/leds-gpio.c linux-avr32.git/drivers/leds/leds-gpio.c
---- linux-2.6.22.1/drivers/leds/leds-gpio.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/leds/leds-gpio.c	2007-07-12 14:00:02.000000000 +0200
-@@ -0,0 +1,199 @@
-+/*
-+ * LEDs driver for GPIOs
-+ *
-+ * Copyright (C) 2007 8D Technologies inc.
-+ * Raphael Assenat <raph@8d.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+#include <linux/workqueue.h>
-+
-+#include <asm/gpio.h>
-+
-+struct gpio_led_data {
-+	struct led_classdev cdev;
-+	unsigned gpio;
-+	struct work_struct work;
-+	u8 new_level;
-+	u8 can_sleep;
-+	u8 active_low;
-+};
-+
-+static void gpio_led_work(struct work_struct *work)
-+{
-+	struct gpio_led_data	*led_dat =
-+		container_of(work, struct gpio_led_data, work);
-+
-+	gpio_set_value_cansleep(led_dat->gpio, led_dat->new_level);
-+}
-+
-+static void gpio_led_set(struct led_classdev *led_cdev,
-+	enum led_brightness value)
-+{
-+	struct gpio_led_data *led_dat =
-+		container_of(led_cdev, struct gpio_led_data, cdev);
-+	int level;
-+
-+	if (value == LED_OFF)
-+		level = 0;
-+	else
-+		level = 1;
-+
-+	if (led_dat->active_low)
-+		level = !level;
-+
-+	/* setting GPIOs with I2C/etc requires a preemptible task context */
-+	if (led_dat->can_sleep) {
-+		if (preempt_count()) {
-+			led_dat->new_level = level;
-+			schedule_work(&led_dat->work);
-+		} else
-+			gpio_set_value_cansleep(led_dat->gpio, level);
-+	} else
-+		gpio_set_value(led_dat->gpio, level);
-+}
-+
-+static int __init gpio_led_probe(struct platform_device *pdev)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led *cur_led;
-+	struct gpio_led_data *leds_data, *led_dat;
-+	int i, ret = 0;
-+
-+	if (!pdata)
-+		return -EBUSY;
-+
-+	leds_data = kzalloc(sizeof(struct gpio_led_data) * pdata->num_leds,
-+				GFP_KERNEL);
-+	if (!leds_data)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		cur_led = &pdata->leds[i];
-+		led_dat = &leds_data[i];
-+
-+		led_dat->cdev.name = cur_led->name;
-+		led_dat->cdev.default_trigger = cur_led->default_trigger;
-+		led_dat->gpio = cur_led->gpio;
-+		led_dat->can_sleep = gpio_cansleep(cur_led->gpio);
-+		led_dat->active_low = cur_led->active_low;
-+		led_dat->cdev.brightness_set = gpio_led_set;
-+		led_dat->cdev.brightness = cur_led->active_low ? LED_FULL : LED_OFF;
-+
-+		ret = gpio_request(led_dat->gpio, led_dat->cdev.name);
-+		if (ret < 0)
-+			goto err;
-+
-+		gpio_direction_output(led_dat->gpio, led_dat->active_low);
-+
-+		ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
-+		if (ret < 0) {
-+			gpio_free(led_dat->gpio);
-+			goto err;
-+		}
-+
-+		INIT_WORK(&led_dat->work, gpio_led_work);
-+	}
-+
-+	platform_set_drvdata(pdev, leds_data);
-+
-+	return 0;
-+
-+err:
-+	if (i > 0) {
-+		for (i = i - 1; i >= 0; i--) {
-+			led_classdev_unregister(&leds_data[i].cdev);
-+			gpio_free(leds_data[i].gpio);
-+		}
-+	}
-+
-+	flush_scheduled_work();
-+	kfree(leds_data);
-+
-+	return ret;
-+}
-+
-+static int __exit gpio_led_remove(struct platform_device *pdev)
-+{
-+	int i;
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++) {
-+		led_classdev_unregister(&leds_data[i].cdev);
-+		gpio_free(leds_data[i].gpio);
-+	}
-+	
-+	kfree(leds_data);
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+static int gpio_led_suspend(struct platform_device *pdev, pm_message_t state)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+	int i;
-+	
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++)
-+		led_classdev_suspend(&leds_data[i].cdev);
-+
-+	return 0;
-+}
-+
-+static int gpio_led_resume(struct platform_device *pdev)
-+{
-+	struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
-+	struct gpio_led_data *leds_data;
-+	int i;
-+
-+	leds_data = platform_get_drvdata(pdev);
-+
-+	for (i = 0; i < pdata->num_leds; i++)
-+		led_classdev_resume(&leds_data[i].cdev);
-+
-+	return 0;
-+}
-+#else
-+#define gpio_led_suspend NULL
-+#define gpio_led_resume NULL
-+#endif
-+
-+static struct platform_driver gpio_led_driver = {
-+	.remove		= __exit_p(gpio_led_remove),
-+	.suspend	= gpio_led_suspend,
-+	.resume		= gpio_led_resume,
-+	.driver		= {
-+		.name	= "leds-gpio",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init gpio_led_init(void)
-+{
-+	return platform_driver_probe(&gpio_led_driver, gpio_led_probe);
-+}
-+
-+static void __exit gpio_led_exit(void)
-+{
-+	platform_driver_unregister(&gpio_led_driver);
-+}
-+
-+module_init(gpio_led_init);
-+module_exit(gpio_led_exit);
-+
-+MODULE_AUTHOR("Raphael Assenat <raph@8d.com>");
-+MODULE_DESCRIPTION("GPIO LED driver");
-+MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/leds/Makefile linux-avr32.git/drivers/leds/Makefile
---- linux-2.6.22.1/drivers/leds/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/leds/Makefile	2007-07-12 14:00:02.000000000 +0200
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_LEDS_WRAP)			+= leds-wrap.o
- obj-$(CONFIG_LEDS_H1940)		+= leds-h1940.o
- obj-$(CONFIG_LEDS_COBALT)		+= leds-cobalt.o
-+obj-$(CONFIG_LEDS_GPIO)			+= leds-gpio.o
- 
- # LED Triggers
- obj-$(CONFIG_LEDS_TRIGGER_TIMER)	+= ledtrig-timer.o
-diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/drivers/mmc/host/atmel-mci.c
---- linux-2.6.22.1/drivers/mmc/host/atmel-mci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/mmc/host/atmel-mci.c	2007-07-12 14:00:03.000000000 +0200
-@@ -0,0 +1,1217 @@
-+/*
-+ * Atmel MultiMedia Card Interface driver
-+ *
-+ * Copyright (C) 2004-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/blkdev.h>
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/mmc/host.h>
-+
-+#include <asm/dma-controller.h>
-+#include <asm/io.h>
-+#include <asm/arch/board.h>
-+#include <asm/arch/gpio.h>
-+
-+#include "atmel-mci.h"
-+
-+#define DRIVER_NAME "atmel_mci"
-+
-+#define MCI_CMD_ERROR_FLAGS	(MCI_BIT(RINDE)	| MCI_BIT(RDIRE) |	\
-+				 MCI_BIT(RCRCE) | MCI_BIT(RENDE) |	\
-+				 MCI_BIT(RTOE))
-+#define MCI_DATA_ERROR_FLAGS	(MCI_BIT(DCRCE) | MCI_BIT(DTOE) |	\
-+				 MCI_BIT(OVRE) | MCI_BIT(UNRE))
-+
-+enum {
-+	EVENT_CMD_COMPLETE = 0,
-+	EVENT_CMD_ERROR,
-+	EVENT_DATA_COMPLETE,
-+	EVENT_DATA_ERROR,
-+	EVENT_STOP_SENT,
-+	EVENT_STOP_COMPLETE,
-+	EVENT_STOP_ERROR,
-+	EVENT_DMA_ERROR,
-+	EVENT_CARD_DETECT,
-+};
-+
-+struct atmel_mci_dma {
-+	struct dma_request_sg	req;
-+	unsigned short		rx_periph_id;
-+	unsigned short		tx_periph_id;
-+};
-+
-+struct atmel_mci {
-+	struct mmc_host		*mmc;
-+	void __iomem		*regs;
-+	struct atmel_mci_dma	dma;
-+
-+	struct mmc_request	*mrq;
-+	struct mmc_command	*cmd;
-+	struct mmc_data		*data;
-+
-+	u32			stop_cmdr;
-+	u32			stop_iflags;
-+
-+	struct tasklet_struct	tasklet;
-+	unsigned long		pending_events;
-+	unsigned long		completed_events;
-+	u32			error_status;
-+
-+	int			present;
-+	int			detect_pin;
-+	int			wp_pin;
-+
-+	unsigned long		bus_hz;
-+	unsigned long		mapbase;
-+	struct clk		*mck;
-+	struct platform_device	*pdev;
-+
-+#ifdef CONFIG_DEBUG_FS
-+	struct dentry		*debugfs_root;
-+	struct dentry		*debugfs_regs;
-+	struct dentry		*debugfs_req;
-+	struct dentry		*debugfs_pending_events;
-+	struct dentry		*debugfs_completed_events;
-+#endif
-+};
-+
-+/* Those printks take an awful lot of time... */
-+#ifndef DEBUG
-+static unsigned int fmax = 15000000U;
-+#else
-+static unsigned int fmax = 1000000U;
-+#endif
-+module_param(fmax, uint, 0444);
-+MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
++/* Those printks take an awful lot of time... */
++#ifndef DEBUG
++static unsigned int fmax = 15000000U;
++#else
++static unsigned int fmax = 1000000U;
++#endif
++module_param(fmax, uint, 0444);
++MODULE_PARM_DESC(fmax, "Max frequency in Hz of the MMC bus clock");
 +
 +/* Test bit macros for completed events */
 +#define mci_cmd_is_complete(host)			\
 +	test_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_cmd_error_is_complete(host)			\
-+	test_bit(EVENT_CMD_ERROR, &host->completed_events)
 +#define mci_data_is_complete(host)			\
 +	test_bit(EVENT_DATA_COMPLETE, &host->completed_events)
 +#define mci_data_error_is_complete(host)		\
@@ -6030,8 +4883,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	test_bit(EVENT_STOP_SENT, &host->completed_events)
 +#define mci_stop_is_complete(host)			\
 +	test_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_stop_error_is_complete(host)		\
-+	test_bit(EVENT_STOP_ERROR, &host->completed_events)
 +#define mci_dma_error_is_complete(host)			\
 +	test_bit(EVENT_DMA_ERROR, &host->completed_events)
 +#define mci_card_detect_is_complete(host)			\
@@ -6040,8 +4891,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +/* Test and clear bit macros for pending events */
 +#define mci_clear_cmd_is_pending(host)			\
 +	test_and_clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_CMD_ERROR, &host->pending_events)
 +#define mci_clear_data_is_pending(host)			\
 +	test_and_clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
 +#define mci_clear_data_error_is_pending(host)		\
@@ -6050,8 +4899,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	test_and_clear_bit(EVENT_STOP_SENT, &host->pending_events)
 +#define mci_clear_stop_is_pending(host)			\
 +	test_and_clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_is_pending(host)		\
-+	test_and_clear_bit(EVENT_STOP_ERROR, &host->pending_events)
 +#define mci_clear_dma_error_is_pending(host)		\
 +	test_and_clear_bit(EVENT_DMA_ERROR, &host->pending_events)
 +#define mci_clear_card_detect_is_pending(host)		\
@@ -6060,8 +4907,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +/* Test and set bit macros for completed events */
 +#define mci_set_cmd_is_completed(host)			\
 +	test_and_set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_CMD_ERROR, &host->completed_events)
 +#define mci_set_data_is_completed(host)			\
 +	test_and_set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
 +#define mci_set_data_error_is_completed(host)		\
@@ -6070,8 +4915,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	test_and_set_bit(EVENT_STOP_SENT, &host->completed_events)
 +#define mci_set_stop_is_completed(host)			\
 +	test_and_set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_is_completed(host)		\
-+	test_and_set_bit(EVENT_STOP_ERROR, &host->completed_events)
 +#define mci_set_dma_error_is_completed(host)		\
 +	test_and_set_bit(EVENT_DMA_ERROR, &host->completed_events)
 +#define mci_set_card_detect_is_completed(host)		\
@@ -6080,8 +4923,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +/* Set bit macros for completed events */
 +#define mci_set_cmd_complete(host)			\
 +	set_bit(EVENT_CMD_COMPLETE, &host->completed_events)
-+#define mci_set_cmd_error_complete(host)		\
-+	set_bit(EVENT_CMD_ERROR, &host->completed_events)
 +#define mci_set_data_complete(host)			\
 +	set_bit(EVENT_DATA_COMPLETE, &host->completed_events)
 +#define mci_set_data_error_complete(host)		\
@@ -6090,8 +4931,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	set_bit(EVENT_STOP_SENT, &host->completed_events)
 +#define mci_set_stop_complete(host)			\
 +	set_bit(EVENT_STOP_COMPLETE, &host->completed_events)
-+#define mci_set_stop_error_complete(host)		\
-+	set_bit(EVENT_STOP_ERROR, &host->completed_events)
 +#define mci_set_dma_error_complete(host)		\
 +	set_bit(EVENT_DMA_ERROR, &host->completed_events)
 +#define mci_set_card_detect_complete(host)		\
@@ -6100,8 +4939,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +/* Set bit macros for pending events */
 +#define mci_set_cmd_pending(host)			\
 +	set_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_set_cmd_error_pending(host)			\
-+	set_bit(EVENT_CMD_ERROR, &host->pending_events)
 +#define mci_set_data_pending(host)			\
 +	set_bit(EVENT_DATA_COMPLETE, &host->pending_events)
 +#define mci_set_data_error_pending(host)		\
@@ -6110,8 +4947,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	set_bit(EVENT_STOP_SENT, &host->pending_events)
 +#define mci_set_stop_pending(host)			\
 +	set_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_set_stop_error_pending(host)		\
-+	set_bit(EVENT_STOP_ERROR, &host->pending_events)
 +#define mci_set_dma_error_pending(host)			\
 +	set_bit(EVENT_DMA_ERROR, &host->pending_events)
 +#define mci_set_card_detect_pending(host)		\
@@ -6120,8 +4955,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +/* Clear bit macros for pending events */
 +#define mci_clear_cmd_pending(host)			\
 +	clear_bit(EVENT_CMD_COMPLETE, &host->pending_events)
-+#define mci_clear_cmd_error_pending(host)		\
-+	clear_bit(EVENT_CMD_ERROR, &host->pending_events)
 +#define mci_clear_data_pending(host)			\
 +	clear_bit(EVENT_DATA_COMPLETE, &host->pending_events)
 +#define mci_clear_data_error_pending(host)		\
@@ -6130,8 +4963,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	clear_bit(EVENT_STOP_SENT, &host->pending_events)
 +#define mci_clear_stop_pending(host)			\
 +	clear_bit(EVENT_STOP_COMPLETE, &host->pending_events)
-+#define mci_clear_stop_error_pending(host)		\
-+	clear_bit(EVENT_STOP_ERROR, &host->pending_events)
 +#define mci_clear_dma_error_pending(host)		\
 +	clear_bit(EVENT_DMA_ERROR, &host->pending_events)
 +#define mci_clear_card_detect_pending(host)		\
@@ -6385,28 +5216,23 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +		dtocyc = 15;
 +	}
 +
-+	pr_debug("%s: setting timeout to %u cycles\n",
-+		 mmc_hostname(host->mmc),
-+		 dtocyc << dtomul_to_shift[dtomul]);
++	dev_dbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
++			dtocyc << dtomul_to_shift[dtomul]);
 +	mci_writel(host, DTOR, (MCI_BF(DTOMUL, dtomul)
 +				| MCI_BF(DTOCYC, dtocyc)));
 +}
 +
 +/*
-+ * Return mask with interrupt flags to be handled for this command.
++ * Return mask with command flags to be enabled for this command.
 + */
 +static u32 atmci_prepare_command(struct mmc_host *mmc,
-+				 struct mmc_command *cmd,
-+				 u32 *cmd_flags)
++				 struct mmc_command *cmd)
 +{
 +	u32 cmdr;
-+	u32 iflags;
 +
 +	cmd->error = MMC_ERR_NONE;
 +
-+	cmdr = 0;
-+	BUG_ON(MCI_BFEXT(CMDNB, cmdr) != 0);
-+	cmdr = MCI_BFINS(CMDNB, cmd->opcode, cmdr);
++	cmdr = MCI_BF(CMDNB, cmd->opcode);
 +
 +	if (cmd->flags & MMC_RSP_PRESENT) {
 +		if (cmd->flags & MMC_RSP_136)
@@ -6425,16 +5251,11 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
 +		cmdr |= MCI_BIT(OPDCMD);
 +
-+	iflags = MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS;
-+	if (!(cmd->flags & MMC_RSP_CRC))
-+		iflags &= ~MCI_BIT(RCRCE);
++	dev_dbg(&mmc->class_dev,
++		"cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
++		cmd->opcode, cmd->arg, cmd->flags, (unsigned long)cmdr);
 +
-+	pr_debug("%s: cmd: op %02x arg %08x flags %08x, cmdflags %08lx\n",
-+		 mmc_hostname(mmc), cmd->opcode, cmd->arg, cmd->flags,
-+		 (unsigned long)cmdr);
-+
-+	*cmd_flags = cmdr;
-+	return iflags;
++	return cmdr;
 +}
 +
 +static void atmci_start_command(struct atmel_mci *host,
@@ -6510,20 +5331,21 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +
 +	iflags = mci_readl(host, IMR);
 +	if (iflags)
-+		printk("WARNING: IMR=0x%08x\n", mci_readl(host, IMR));
++		dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
++				mci_readl(host, IMR));
 +
 +	WARN_ON(host->mrq != NULL);
 +	host->mrq = mrq;
 +	host->pending_events = 0;
 +	host->completed_events = 0;
 +
-+	iflags = atmci_prepare_command(mmc, mrq->cmd, &cmdflags);
++	iflags = MCI_BIT(CMDRDY);
++	cmdflags = atmci_prepare_command(mmc, mrq->cmd);
 +
 +	if (mrq->stop) {
-+		BUG_ON(!data);
++		WARN_ON(!data);
 +
-+		host->stop_iflags = atmci_prepare_command(mmc, mrq->stop,
-+							  &host->stop_cmdr);
++		host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
 +		host->stop_cmdr |= MCI_BF(TRCMD, MCI_TRCMD_STOP_TRANS);
 +		if (!(data->flags & MMC_DATA_WRITE))
 +			host->stop_cmdr |= MCI_BIT(TRDIR);
@@ -6544,16 +5366,30 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 +{
 +	struct atmel_mci *host = mmc_priv(mmc);
++	u32 mr;
 +
 +	if (ios->clock) {
 +		u32 clkdiv;
 +
++		/* Set clock rate */
 +		clkdiv = host->bus_hz / (2 * ios->clock) - 1;
-+		if (clkdiv > 255)
++		if (clkdiv > 255) {
++			dev_warn(&mmc->class_dev,
++				"clock %u too slow; using %lu\n",
++				ios->clock, host->bus_hz / (2 * 256));
 +			clkdiv = 255;
-+		mci_writel(host, MR, (clkdiv
-+				      | MCI_BIT(WRPROOF)
-+				      | MCI_BIT(RDPROOF)));
++		}
++
++		mr = mci_readl(host, MR);
++		mr = MCI_BFINS(CLKDIV, clkdiv, mr)
++			| MCI_BIT(WRPROOF) | MCI_BIT(RDPROOF);
++		mci_writel(host, MR, mr);
++
++		/* Enable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIEN));
++	} else {
++		/* Disable the MCI controller */
++		mci_writel(host, CR, MCI_BIT(MCIDIS));
 +	}
 +
 +	switch (ios->bus_width) {
@@ -6566,14 +5402,19 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	}
 +
 +	switch (ios->power_mode) {
-+	case MMC_POWER_OFF:
-+		mci_writel(host, CR, MCI_BIT(MCIDIS));
-+		break;
-+	case MMC_POWER_UP:
-+		mci_writel(host, CR, MCI_BIT(SWRST));
-+		break;
 +	case MMC_POWER_ON:
-+		mci_writel(host, CR, MCI_BIT(MCIEN));
++		/* Send init sequence (74 clock cycles) */
++		mci_writel(host, IDR, ~0UL);
++		mci_writel(host, CMDR, MCI_BF(SPCMD, MCI_SPCMD_INIT_CMD));
++		while (!(mci_readl(host, SR) & MCI_BIT(CMDRDY)))
++			cpu_relax();
++		break;
++	default:
++		/*
++		 * TODO: None of the currently available AVR32-based
++		 * boards allow MMC power to be turned off. Implement
++		 * power control when this can be tested properly.
++		 */
 +		break;
 +	}
 +}
@@ -6585,11 +5426,12 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +
 +	if (host->wp_pin >= 0) {
 +		read_only = gpio_get_value(host->wp_pin);
-+		pr_debug("%s: card is %s\n", mmc_hostname(mmc),
-+			 read_only ? "read-only" : "read-write");
++		dev_dbg(&mmc->class_dev, "card is %s\n",
++				read_only ? "read-only" : "read-write");
 +	} else {
-+		pr_debug("%s: no pin for checking read-only switch."
-+			 " Assuming write-enable.\n", mmc_hostname(mmc));
++		dev_dbg(&mmc->class_dev,
++			"no pin for checking read-only switch."
++			" Assuming write-enable.\n");
 +	}
 +
 +	return read_only;
@@ -6617,7 +5459,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	struct atmel_mci *host = mmc_priv(mmc);
 +
 +	atmci_start_command(host, data->stop, host->stop_cmdr | flags);
-+	mci_writel(host, IER, host->stop_iflags);
++	mci_writel(host, IER, MCI_BIT(CMDRDY));
 +}
 +
 +static void atmci_data_complete(struct atmel_mci *host, struct mmc_data *data)
@@ -6636,19 +5478,30 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +		atmci_request_end(host->mmc, data->mrq);
 +}
 +
-+static void atmci_command_error(struct mmc_host *mmc,
-+				struct mmc_command *cmd,
-+				u32 status)
++static void atmci_command_complete(struct atmel_mci *host,
++			struct mmc_command *cmd, u32 status)
 +{
-+	pr_debug("%s: command error: status=0x%08x\n",
-+		 mmc_hostname(mmc), status);
-+
 +	if (status & MCI_BIT(RTOE))
 +		cmd->error = MMC_ERR_TIMEOUT;
-+	else if (status & MCI_BIT(RCRCE))
++	else if ((cmd->flags & MMC_RSP_CRC)
++			&& (status & MCI_BIT(RCRCE)))
 +		cmd->error = MMC_ERR_BADCRC;
-+	else
++	else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE)))
 +		cmd->error = MMC_ERR_FAILED;
++
++	if (cmd->error != MMC_ERR_NONE) {
++		dev_dbg(&host->mmc->class_dev,
++				"command error: op=0x%x status=0x%08x\n",
++				cmd->opcode, status);
++
++		if (cmd->data) {
++			dma_stop_request(host->dma.req.req.dmac,
++					host->dma.req.req.channel);
++			mci_writel(host, IDR, MCI_BIT(NOTBUSY)
++					| MCI_DATA_ERROR_FLAGS);
++			host->data = NULL;
++		}
++	}
 +}
 +
 +static void atmci_tasklet_func(unsigned long priv)
@@ -6658,42 +5511,21 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	struct mmc_request *mrq = host->mrq;
 +	struct mmc_data *data = host->data;
 +
-+	pr_debug("atmci_tasklet: pending/completed/mask %lx/%lx/%x\n",
++	dev_vdbg(&mmc->class_dev,
++		"tasklet: pending/completed/mask %lx/%lx/%x\n",
 +		 host->pending_events, host->completed_events,
 +		 mci_readl(host, IMR));
 +
-+	if (mci_clear_cmd_error_is_pending(host)) {
-+		struct mmc_command *cmd;
-+
-+		mci_set_cmd_error_complete(host);
-+		mci_clear_cmd_pending(host);
-+		cmd = host->mrq->cmd;
-+
-+		if (cmd->data) {
-+			dma_stop_request(host->dma.req.req.dmac,
-+					 host->dma.req.req.channel);
-+			host->data = NULL;
-+		}
-+
-+		atmci_command_error(mmc, cmd, host->error_status);
-+		atmci_request_end(mmc, cmd->mrq);
-+	}
-+	if (mci_clear_stop_error_is_pending(host)) {
-+		mci_set_stop_error_complete(host);
-+		mci_clear_stop_pending(host);
-+		atmci_command_error(mmc, host->mrq->stop,
-+				    host->error_status);
-+		if (!host->data)
-+			atmci_request_end(mmc, host->mrq);
-+	}
 +	if (mci_clear_cmd_is_pending(host)) {
 +		mci_set_cmd_complete(host);
-+		if (!mrq->data || mci_data_is_complete(host)
++		atmci_command_complete(host, mrq->cmd, host->cmd_status);
++		if (!host->data || mci_data_is_complete(host)
 +		    || mci_data_error_is_complete(host))
 +			atmci_request_end(mmc, mrq);
 +	}
 +	if (mci_clear_stop_is_pending(host)) {
 +		mci_set_stop_complete(host);
++		atmci_command_complete(host, mrq->stop, host->stop_status);
 +		if (mci_data_is_complete(host)
 +		    || mci_data_error_is_complete(host))
 +			atmci_request_end(mmc, mrq);
@@ -6705,8 +5537,8 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +		/* DMA controller got bus error => invalid address */
 +		data->error = MMC_ERR_INVALID;
 +
-+		printk(KERN_DEBUG "%s: dma error after %u bytes xfered\n",
-+		       mmc_hostname(mmc), host->data->bytes_xfered);
++		dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n",
++				host->data->bytes_xfered);
 +
 +		if (data->stop
 +		    && !mci_set_stop_sent_is_completed(host))
@@ -6716,7 +5548,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +		atmci_data_complete(host, data);
 +	}
 +	if (mci_clear_data_error_is_pending(host)) {
-+		u32 status = host->error_status;
++		u32 status = host->data_status;
 +
 +		mci_set_data_error_complete(host);
 +		mci_clear_data_pending(host);
@@ -6724,24 +5556,18 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +		dma_stop_request(host->dma.req.req.dmac,
 +				 host->dma.req.req.channel);
 +
-+		printk(KERN_DEBUG "%s: data error: status=0x%08x\n",
-+		       mmc_hostname(host->mmc), status);
-+
 +		if (status & MCI_BIT(DCRCE)) {
-+			printk(KERN_DEBUG "%s: Data CRC error\n",
-+			       mmc_hostname(host->mmc));
++			dev_dbg(&mmc->class_dev, "data CRC error\n");
 +			data->error = MMC_ERR_BADCRC;
 +		} else if (status & MCI_BIT(DTOE)) {
-+			printk(KERN_DEBUG "%s: Data Timeout error\n",
-+			       mmc_hostname(host->mmc));
++			dev_dbg(&mmc->class_dev, "data timeout error\n");
 +			data->error = MMC_ERR_TIMEOUT;
 +		} else {
-+			printk(KERN_DEBUG "%s: Data FIFO error\n",
-+			       mmc_hostname(host->mmc));
++			dev_dbg(&mmc->class_dev, "data FIFO error\n");
 +			data->error = MMC_ERR_FIFO;
 +		}
-+		printk(KERN_DEBUG "%s: Bytes xfered: %u\n",
-+		       mmc_hostname(host->mmc), data->bytes_xfered);
++		dev_dbg(&mmc->class_dev, "bytes xfered: %u\n",
++				data->bytes_xfered);
 +
 +		if (data->stop
 +		    && !mci_set_stop_sent_is_completed(host))
@@ -6765,10 +5591,8 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +
 +		/* Clean up queue if present */
 +		if (mrq) {
-+			if (!mci_cmd_is_complete(host)
-+			    && !mci_cmd_error_is_complete(host)) {
++			if (!mci_cmd_is_complete(host))
 +				mrq->cmd->error = MMC_ERR_TIMEOUT;
-+			}
 +			if (mrq->data && !mci_data_is_complete(host)
 +			    && !mci_data_error_is_complete(host)) {
 +				dma_stop_request(host->dma.req.req.dmac,
@@ -6776,10 +5600,8 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +				host->data->error = MMC_ERR_TIMEOUT;
 +				atmci_data_complete(host, data);
 +			}
-+			if (mrq->stop && !mci_stop_is_complete(host)
-+			    && !mci_stop_error_is_complete(host)) {
++			if (mrq->stop && !mci_stop_is_complete(host))
 +				mrq->stop->error = MMC_ERR_TIMEOUT;
-+			}
 +
 +			host->cmd = NULL;
 +			atmci_request_end(mmc, mrq);
@@ -6802,13 +5624,16 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	cmd->resp[2] = mci_readl(host, RSPR);
 +	cmd->resp[3] = mci_readl(host, RSPR);
 +
-+	mci_writel(host, IDR, MCI_BIT(CMDRDY) | MCI_CMD_ERROR_FLAGS);
++	mci_writel(host, IDR, MCI_BIT(CMDRDY));
 +	host->cmd = NULL;
 +
-+	if (mci_stop_sent_is_complete(host))
++	if (mci_stop_sent_is_complete(host)) {
++		host->stop_status = status;
 +		mci_set_stop_pending(host);
-+	else
++	} else {
++		host->cmd_status = status;
 +		mci_set_cmd_pending(host);
++	}
 +
 +	tasklet_schedule(&host->tasklet);
 +}
@@ -6827,18 +5652,16 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	if (data->stop && !mci_set_stop_sent_is_completed(host))
 +		send_stop_cmd(host->mmc, data, 0);
 +
-+	if (data->flags & MMC_DATA_READ) {
-+		mci_writel(host, IDR, MCI_DATA_ERROR_FLAGS);
-+		mci_set_data_pending(host);
-+		tasklet_schedule(&host->tasklet);
-+	} else {
-+		/*
-+		 * For the WRITE case, wait for NOTBUSY. This function
-+		 * is called when everything has been written to the
-+		 * controller, not when the card is done programming.
-+		 */
-+		mci_writel(host, IER, MCI_BIT(NOTBUSY));
-+	}
++	/*
++	 * Regardless of what the documentation says, we have to wait
++	 * for NOTBUSY even after block read operations.
++	 *
++	 * When the DMA transfer is complete, the controller may still
++	 * be reading the CRC from the card, i.e. the data transfer is
++	 * still in progress and we haven't seen all the potential
++	 * error bits yet.
++	 */
++	mci_writel(host, IER, MCI_BIT(NOTBUSY));
 +}
 +
 +static void atmci_dma_error(struct dma_request *_req)
@@ -6870,24 +5693,10 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	pending = status & mask;
 +
 +	do {
-+		if (pending & MCI_CMD_ERROR_FLAGS) {
-+			mci_writel(host, IDR, (MCI_BIT(CMDRDY)
-+					       | MCI_BIT(NOTBUSY)
-+					       | MCI_CMD_ERROR_FLAGS
-+					       | MCI_DATA_ERROR_FLAGS));
-+			host->error_status = status;
-+			host->cmd = NULL;
-+			if (mci_stop_sent_is_complete(host))
-+				mci_set_stop_error_pending(host);
-+			else
-+				mci_set_cmd_error_pending(host);
-+			tasklet_schedule(&host->tasklet);
-+			break;
-+		}
 +		if (pending & MCI_DATA_ERROR_FLAGS) {
 +			mci_writel(host, IDR, (MCI_BIT(NOTBUSY)
 +					       | MCI_DATA_ERROR_FLAGS));
-+			host->error_status = status;
++			host->data_status = status;
 +			mci_set_data_error_pending(host);
 +			tasklet_schedule(&host->tasklet);
 +			break;
@@ -6919,8 +5728,8 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	int present = !gpio_get_value(irq_to_gpio(irq));
 +
 +	if (present != host->present) {
-+		pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
-+			 present ? "inserted" : "removed");
++		dev_dbg(&mmc->class_dev, "card %s\n",
++			present ? "inserted" : "removed");
 +		host->present = present;
 +		mci_set_card_detect_pending(host);
 +		tasklet_schedule(&host->tasklet);
@@ -6979,7 +5788,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	mmc->ops = &atmci_ops;
 +	mmc->f_min = (host->bus_hz + 511) / 512;
 +	mmc->f_max = min((unsigned int)(host->bus_hz / 2), fmax);
-+	mmc->ocr_avail	= 0x00100000;
++	mmc->ocr_avail	= MMC_VDD_32_33 | MMC_VDD_33_34;
 +	mmc->caps |= MMC_CAP_4_BIT_DATA;
 +
 +	tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
@@ -6992,8 +5801,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	host->present = 1;
 +	if (host->detect_pin >= 0) {
 +		if (gpio_request(host->detect_pin, "mmc_detect")) {
-+			printk(KERN_WARNING "%s: no detect pin available\n",
-+			       mmc_hostname(host->mmc));
++			dev_dbg(&mmc->class_dev, "no detect pin available\n");
 +			host->detect_pin = -1;
 +		} else {
 +			host->present = !gpio_get_value(host->detect_pin);
@@ -7001,8 +5809,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	}
 +	if (host->wp_pin >= 0) {
 +		if (gpio_request(host->wp_pin, "mmc_wp")) {
-+			printk(KERN_WARNING "%s: no WP pin available\n",
-+			       mmc_hostname(host->mmc));
++			dev_dbg(&mmc->class_dev, "no WP pin available\n");
 +			host->wp_pin = -1;
 +		}
 +	}
@@ -7011,14 +5818,12 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +	ret = -ENOMEM;
 +	host->dma.req.req.dmac = find_dma_controller(0);
 +	if (!host->dma.req.req.dmac) {
-+		printk(KERN_ERR
-+		       "mmci: No DMA controller available, aborting\n");
++		dev_dbg(&mmc->class_dev, "no DMA controller available\n");
 +		goto out_free_irq;
 +	}
 +	ret = dma_alloc_channel(host->dma.req.req.dmac);
 +	if (ret < 0) {
-+		printk(KERN_ERR
-+		       "mmci: Unable to allocate DMA channel, aborting\n");
++		dev_dbg(&mmc->class_dev, "unable to allocate DMA channel\n");
 +		goto out_free_irq;
 +	}
 +	host->dma.req.req.channel = ret;
@@ -7031,7 +5836,6 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +
 +	mci_writel(host, CR, MCI_BIT(SWRST));
 +	mci_writel(host, IDR, ~0UL);
-+	mci_writel(host, CR, MCI_BIT(MCIEN));
 +
 +	platform_set_drvdata(pdev, host);
 +
@@ -7043,17 +5847,16 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +				  IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
 +				  DRIVER_NAME, mmc);
 +		if (ret) {
-+			printk(KERN_ERR
-+			       "%s: could not request IRQ %d for detect pin\n",
-+			       mmc_hostname(mmc),
-+			       gpio_to_irq(host->detect_pin));
++			dev_dbg(&mmc->class_dev,
++				"could not request IRQ %d for detect pin\n",
++				gpio_to_irq(host->detect_pin));
 +			gpio_free(host->detect_pin);
 +			host->detect_pin = -1;
 +		}
 +	}
 +
-+	printk(KERN_INFO "%s: Atmel MCI controller at 0x%08lx irq %d\n",
-+	       mmc_hostname(mmc), host->mapbase, irq);
++	dev_info(&mmc->class_dev, "Atmel MCI controller at 0x%08lx irq %d\n",
++			host->mapbase, irq);
 +
 +	atmci_init_debugfs(host);
 +
@@ -7136,9 +5939,11 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.c linux-avr32.git/dr
 +
 +MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
 +MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.h linux-avr32.git/drivers/mmc/host/atmel-mci.h
---- linux-2.6.22.1/drivers/mmc/host/atmel-mci.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/mmc/host/atmel-mci.h	2007-07-12 14:00:03.000000000 +0200
+diff --git a/drivers/mmc/host/atmel-mci.h b/drivers/mmc/host/atmel-mci.h
+new file mode 100644
+index 0000000..60d15c4
+--- /dev/null
++++ b/drivers/mmc/host/atmel-mci.h
 @@ -0,0 +1,192 @@
 +/*
 + * Atmel MultiMedia Card Interface driver
@@ -7332,39 +6137,10 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/atmel-mci.h linux-avr32.git/dr
 +	__raw_writel((value), (port)->regs + MCI_##reg)
 +
 +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */
-diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/Kconfig linux-avr32.git/drivers/mmc/host/Kconfig
---- linux-2.6.22.1/drivers/mmc/host/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/mmc/host/Kconfig	2007-07-12 14:00:03.000000000 +0200
-@@ -74,6 +74,16 @@
- 
- 	  If unsure, say N.
- 
-+config MMC_ATMELMCI
-+	tristate "Atmel Multimedia Card Interface support"
-+	depends on AVR32 && MMC
-+	help
-+	  This selects the Atmel Multimedia Card Interface. If you have
-+	  a AT91 (ARM) or AT32 (AVR32) platform with a Multimedia Card
-+	  slot, say Y or M here.
-+
-+	  If unsure, say N.
-+
- config MMC_IMX
- 	tristate "Motorola i.MX Multimedia Card Interface support"
- 	depends on ARCH_IMX
-diff -x .git -Nur linux-2.6.22.1/drivers/mmc/host/Makefile linux-avr32.git/drivers/mmc/host/Makefile
---- linux-2.6.22.1/drivers/mmc/host/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/mmc/host/Makefile	2007-07-12 14:00:03.000000000 +0200
-@@ -14,5 +14,6 @@
- obj-$(CONFIG_MMC_AU1X)		+= au1xmmc.o
- obj-$(CONFIG_MMC_OMAP)		+= omap.o
- obj-$(CONFIG_MMC_AT91)		+= at91_mci.o
-+obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o
- obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o
- 
-diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32.git/drivers/mtd/chips/cfi_cmdset_0001.c
---- linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/mtd/chips/cfi_cmdset_0001.c	2007-07-12 14:00:03.000000000 +0200
+diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
+index 2f19fa7..94304ca 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0001.c
++++ b/drivers/mtd/chips/cfi_cmdset_0001.c
 @@ -50,6 +50,7 @@
  #define I82802AC	0x00ac
  #define MANUFACTURER_ST         0x0020
@@ -7373,7 +6149,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32
  
  static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
  static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
-@@ -156,6 +157,47 @@
+@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp)
  }
  #endif
  
@@ -7421,7 +6197,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32
  #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
  /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
  static void fixup_intel_strataflash(struct mtd_info *mtd, void* param)
-@@ -233,6 +275,7 @@
+@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param)
  }
  
  static struct cfi_fixup cfi_fixup_table[] = {
@@ -7429,10 +6205,11 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0001.c linux-avr32
  #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
  	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL },
  #endif
-diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32.git/drivers/mtd/chips/cfi_cmdset_0002.c
---- linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/mtd/chips/cfi_cmdset_0002.c	2007-06-06 11:33:56.000000000 +0200
-@@ -186,6 +186,10 @@
+diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
+index 1f64458..205977b 100644
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
  		extp->TopBottom = 2;
  	else
  		extp->TopBottom = 3;
@@ -7443,7 +6220,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32
  }
  
  static void fixup_use_secsi(struct mtd_info *mtd, void *param)
-@@ -218,6 +222,7 @@
+@@ -217,6 +221,7 @@ static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param)
  }
  
  static struct cfi_fixup cfi_fixup_table[] = {
@@ -7451,7 +6228,7 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32
  #ifdef AMD_BOOTLOC_BUG
  	{ CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL },
  #endif
-@@ -230,7 +235,6 @@
+@@ -229,7 +234,6 @@ static struct cfi_fixup cfi_fixup_table[] = {
  #if !FORCE_WORD_WRITE
  	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, },
  #endif
@@ -7459,5223 +6236,6937 @@ diff -x .git -Nur linux-2.6.22.1/drivers/mtd/chips/cfi_cmdset_0002.c linux-avr32
  	{ 0, 0, NULL, NULL }
  };
  static struct cfi_fixup jedec_fixup_table[] = {
-diff -x .git -Nur linux-2.6.22.1/drivers/net/Kconfig linux-avr32.git/drivers/net/Kconfig
---- linux-2.6.22.1/drivers/net/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/net/Kconfig	2007-07-12 14:00:03.000000000 +0200
-@@ -314,7 +314,7 @@
- config MACB
- 	tristate "Atmel MACB support"
- 	depends on NET_ETHERNET && (AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263)
--	select MII
-+	select PHYLIB
- 	help
- 	  The Atmel MACB ethernet interface is found on many AT32 and AT91
- 	  parts. Say Y to include support for the MACB chip.
-diff -x .git -Nur linux-2.6.22.1/drivers/net/macb.c linux-avr32.git/drivers/net/macb.c
---- linux-2.6.22.1/drivers/net/macb.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/net/macb.c	2007-07-13 11:24:16.000000000 +0200
-@@ -17,13 +17,14 @@
- #include <linux/init.h>
- #include <linux/netdevice.h>
- #include <linux/etherdevice.h>
--#include <linux/mii.h>
--#include <linux/mutex.h>
- #include <linux/dma-mapping.h>
--#include <linux/ethtool.h>
- #include <linux/platform_device.h>
-+#include <linux/phy.h>
- 
- #include <asm/arch/board.h>
-+#if defined(CONFIG_ARCH_AT91)
-+#include <asm/arch/cpu.h>
-+#endif
- 
- #include "macb.h"
- 
-@@ -85,172 +86,202 @@
- 		memcpy(bp->dev->dev_addr, addr, sizeof(addr));
- }
- 
--static void macb_enable_mdio(struct macb *bp)
--{
--	unsigned long flags;
--	u32 reg;
--
--	spin_lock_irqsave(&bp->lock, flags);
--	reg = macb_readl(bp, NCR);
--	reg |= MACB_BIT(MPE);
--	macb_writel(bp, NCR, reg);
--	macb_writel(bp, IER, MACB_BIT(MFD));
--	spin_unlock_irqrestore(&bp->lock, flags);
--}
--
--static void macb_disable_mdio(struct macb *bp)
-+static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
- {
--	unsigned long flags;
--	u32 reg;
--
--	spin_lock_irqsave(&bp->lock, flags);
--	reg = macb_readl(bp, NCR);
--	reg &= ~MACB_BIT(MPE);
--	macb_writel(bp, NCR, reg);
--	macb_writel(bp, IDR, MACB_BIT(MFD));
--	spin_unlock_irqrestore(&bp->lock, flags);
--}
--
--static int macb_mdio_read(struct net_device *dev, int phy_id, int location)
--{
--	struct macb *bp = netdev_priv(dev);
-+	struct macb *bp = bus->priv;
- 	int value;
- 
--	mutex_lock(&bp->mdio_mutex);
--
--	macb_enable_mdio(bp);
- 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
- 			      | MACB_BF(RW, MACB_MAN_READ)
--			      | MACB_BF(PHYA, phy_id)
--			      | MACB_BF(REGA, location)
-+			      | MACB_BF(PHYA, mii_id)
-+			      | MACB_BF(REGA, regnum)
- 			      | MACB_BF(CODE, MACB_MAN_CODE)));
- 
--	wait_for_completion(&bp->mdio_complete);
-+	/* wait for end of transfer */
-+	while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-+		cpu_relax();
- 
- 	value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
--	macb_disable_mdio(bp);
--	mutex_unlock(&bp->mdio_mutex);
- 
- 	return value;
- }
- 
--static void macb_mdio_write(struct net_device *dev, int phy_id,
--			    int location, int val)
-+static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
-+			   u16 value)
- {
--	struct macb *bp = netdev_priv(dev);
--
--	dev_dbg(&bp->pdev->dev, "mdio_write %02x:%02x <- %04x\n",
--		phy_id, location, val);
--
--	mutex_lock(&bp->mdio_mutex);
--	macb_enable_mdio(bp);
-+	struct macb *bp = bus->priv;
- 
- 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
- 			      | MACB_BF(RW, MACB_MAN_WRITE)
--			      | MACB_BF(PHYA, phy_id)
--			      | MACB_BF(REGA, location)
-+			      | MACB_BF(PHYA, mii_id)
-+			      | MACB_BF(REGA, regnum)
- 			      | MACB_BF(CODE, MACB_MAN_CODE)
--			      | MACB_BF(DATA, val)));
-+			      | MACB_BF(DATA, value)));
- 
--	wait_for_completion(&bp->mdio_complete);
-+	/* wait for end of transfer */
-+	while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-+		cpu_relax();
- 
--	macb_disable_mdio(bp);
--	mutex_unlock(&bp->mdio_mutex);
-+	return 0;
- }
- 
--static int macb_phy_probe(struct macb *bp)
-+static int macb_mdio_reset(struct mii_bus *bus)
- {
--	int phy_address;
--	u16 phyid1, phyid2;
-+	return 0;
-+}
+diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
+index b046974..bc90604 100644
+--- a/drivers/spi/atmel_spi.c
++++ b/drivers/spi/atmel_spi.c
+@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi)
+ 		csr |= SPI_BIT(NCPHA);
  
--	for (phy_address = 0; phy_address < 32; phy_address++) {
--		phyid1 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID1);
--		phyid2 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID2);
-+static void macb_handle_link_change(struct net_device *dev)
-+{
-+	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
-+	unsigned long flags;
+ 	/* TODO: DLYBS and DLYBCT */
+-	csr |= SPI_BF(DLYBS, 10);
+-	csr |= SPI_BF(DLYBCT, 10);
++	csr |= SPI_BF(DLYBS, 0);
++	csr |= SPI_BF(DLYBCT, 0);
  
--		if (phyid1 != 0xffff && phyid1 != 0x0000
--		    && phyid2 != 0xffff && phyid2 != 0x0000)
--			break;
-+	int status_change = 0;
-+
-+	spin_lock_irqsave(&bp->lock, flags);
-+
-+	if (phydev->link) {
-+		if ((bp->speed != phydev->speed) ||
-+		    (bp->duplex != phydev->duplex)) {
-+			u32 reg;
-+
-+			reg = macb_readl(bp, NCFGR);
-+			reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
-+
-+			if (phydev->duplex)
-+				reg |= MACB_BIT(FD);
-+			if (phydev->speed)
-+				reg |= MACB_BIT(SPD);
-+
-+			macb_writel(bp, NCFGR, reg);
+ 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
+ 	npcs_pin = (unsigned int)spi->controller_data;
+diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
+index 767aed5..f81d08d 100644
+--- a/drivers/usb/gadget/Kconfig
++++ b/drivers/usb/gadget/Kconfig
+@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES
+ 	   driver on a new board.   Enable these files by choosing "Y"
+ 	   here.  If in doubt, or to conserve kernel memory, say "N".
+ 
++config USB_GADGET_DEBUG_FS
++	boolean "Debugging information files in debugfs"
++	depends on USB_GADGET && DEBUG_FS
++	help
++	   Some of the drivers in the "gadget" framework can expose
++	   debugging information in files under /sys/kernel/debug/.
++	   The information in these files may help when you're
++	   troubleshooting or bringing up a driver on a new board.
++	   Enable these files by choosing "Y" here.  If in doubt, or
++	   to conserve kernel memory, say "N".
 +
-+			bp->speed = phydev->speed;
-+			bp->duplex = phydev->duplex;
-+			status_change = 1;
-+		}
- 	}
- 
--	if (phy_address == 32)
--		return -ENODEV;
-+	if (phydev->link != bp->link) {
-+		if (phydev->link)
-+			netif_schedule(dev);
-+		else {
-+			bp->speed = 0;
-+			bp->duplex = -1;
-+		}
-+		bp->link = phydev->link;
+ config	USB_GADGET_SELECTED
+ 	boolean
  
--	dev_info(&bp->pdev->dev,
--		 "detected PHY at address %d (ID %04x:%04x)\n",
--		 phy_address, phyid1, phyid2);
-+		status_change = 1;
-+	}
+@@ -103,6 +114,20 @@ config USB_AMD5536UDC
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
  
--	bp->mii.phy_id = phy_address;
--	return 0;
-+	spin_unlock_irqrestore(&bp->lock, flags);
++config USB_GADGET_ATMEL_USBA
++	boolean "Atmel USBA"
++	select USB_GADGET_DUALSPEED
++	depends on AVR32
++	help
++	  USBA is the integrated high-speed USB Device controller on
++	  the AT32AP700x processors from Atmel.
 +
-+	if (status_change) {
-+		if (phydev->link)
-+			printk(KERN_INFO "%s: link up (%d/%s)\n",
-+			       dev->name, phydev->speed,
-+			       DUPLEX_FULL == phydev->duplex ? "Full":"Half");
-+		else
-+			printk(KERN_INFO "%s: link down\n", dev->name);
-+	}
- }
++config USB_ATMEL_USBA
++	tristate
++	depends on USB_GADGET_ATMEL_USBA
++	default USB_GADGET
++	select USB_GADGET_SELECTED
++
+ config USB_GADGET_FSL_USB2
+ 	boolean "Freescale Highspeed USB DR Peripheral Controller"
+ 	depends on MPC834x || PPC_MPC831x
+@@ -228,7 +253,6 @@ config USB_LH7A40X
+ 	default USB_GADGET
+ 	select USB_GADGET_SELECTED
  
--static void macb_set_media(struct macb *bp, int media)
-+/* based on au1000_eth. c*/
-+static int macb_mii_probe(struct net_device *dev)
- {
--	u32 reg;
-+	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = NULL;
-+	struct eth_platform_data *pdata;
-+	int phy_addr;
- 
--	spin_lock_irq(&bp->lock);
--	reg = macb_readl(bp, NCFGR);
--	reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
--	if (media & (ADVERTISE_100HALF | ADVERTISE_100FULL))
--		reg |= MACB_BIT(SPD);
--	if (media & ADVERTISE_FULL)
--		reg |= MACB_BIT(FD);
--	macb_writel(bp, NCFGR, reg);
--	spin_unlock_irq(&bp->lock);
-+	/* find the first phy */
-+	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
-+		if (bp->mii_bus.phy_map[phy_addr]) {
-+			phydev = bp->mii_bus.phy_map[phy_addr];
-+			break;
-+		}
-+	}
+-
+ config USB_GADGET_OMAP
+ 	boolean "OMAP USB Device Controller"
+ 	depends on ARCH_OMAP
+diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
+index 1bc0f03..904e57b 100644
+--- a/drivers/usb/gadget/Makefile
++++ b/drivers/usb/gadget/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
+ obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
+ obj-$(CONFIG_USB_S3C2410)	+= s3c2410_udc.o
+ obj-$(CONFIG_USB_AT91)		+= at91_udc.o
++obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
+ obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
+ obj-$(CONFIG_USB_M66592)	+= m66592-udc.o
+ 
+diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
+new file mode 100644
+index 0000000..e35362d
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.c
+@@ -0,0 +1,2038 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/io.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/list.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ch9.h>
++#include <linux/usb_gadget.h>
++#include <linux/delay.h>
 +
-+	if (!phydev) {
-+		printk (KERN_ERR "%s: no PHY found\n", dev->name);
-+		return -1;
-+	}
++#include <asm/gpio.h>
++#include <asm/arch/board.h>
 +
-+	pdata = bp->pdev->dev.platform_data;
-+	/* TODO : add pin_irq */
++#include "atmel_usba_udc.h"
 +
-+	/* attach the mac to the phy */
-+	if (pdata && pdata->is_rmii) {
-+		phydev = phy_connect(dev, phydev->dev.bus_id,
-+			&macb_handle_link_change, 0, PHY_INTERFACE_MODE_RMII);
-+	} else {
-+		phydev = phy_connect(dev, phydev->dev.bus_id,
-+			&macb_handle_link_change, 0, PHY_INTERFACE_MODE_MII);
-+	}
 +
-+	if (IS_ERR(phydev)) {
-+		printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
-+		return PTR_ERR(phydev);
-+	}
++static struct usba_udc the_udc;
 +
-+	/* mask with MAC supported features */
-+	phydev->supported &= PHY_BASIC_FEATURES;
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++#include <linux/debugfs.h>
++#include <linux/uaccess.h>
 +
-+	phydev->advertising = phydev->supported;
++static int queue_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_ep *ep = inode->i_private;
++	struct usba_request *req, *req_copy;
++	struct list_head *queue_data;
 +
-+	bp->link = 0;
-+	bp->speed = 0;
-+	bp->duplex = -1;
-+	bp->phy_dev = phydev;
++	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
++	if (!queue_data)
++		return -ENOMEM;
++	INIT_LIST_HEAD(queue_data);
 +
-+	return 0;
- }
- 
--static void macb_check_media(struct macb *bp, int ok_to_print, int init_media)
-+static int macb_mii_init(struct macb *bp)
- {
--	struct mii_if_info *mii = &bp->mii;
--	unsigned int old_carrier, new_carrier;
--	int advertise, lpa, media, duplex;
-+	struct eth_platform_data *pdata;
-+	int err = -ENXIO, i;
- 
--	/* if forced media, go no further */
--	if (mii->force_media)
--		return;
-+	/* Enable managment port */
-+	macb_writel(bp, NCR, MACB_BIT(MPE));
- 
--	/* check current and old link status */
--	old_carrier = netif_carrier_ok(mii->dev) ? 1 : 0;
--	new_carrier = (unsigned int) mii_link_ok(mii);
-+	bp->mii_bus.name = "MACB_mii_bus",
-+	bp->mii_bus.read = &macb_mdio_read,
-+	bp->mii_bus.write = &macb_mdio_write,
-+	bp->mii_bus.reset = &macb_mdio_reset,
-+	bp->mii_bus.id = bp->pdev->id,
-+	bp->mii_bus.priv = bp,
-+	bp->mii_bus.dev = &bp->dev->dev;
-+	pdata = bp->pdev->dev.platform_data;
- 
--	/* if carrier state did not change, assume nothing else did */
--	if (!init_media && old_carrier == new_carrier)
--		return;
-+	if (pdata)
-+		bp->mii_bus.phy_mask = pdata->phy_mask;
- 
--	/* no carrier, nothing much to do */
--	if (!new_carrier) {
--		netif_carrier_off(mii->dev);
--		printk(KERN_INFO "%s: link down\n", mii->dev->name);
--		return;
-+	bp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
-+	if (!bp->mii_bus.irq) {
-+		err = -ENOMEM;
-+		goto err_out;
- 	}
- 
--	/*
--	 * we have carrier, see who's on the other end
--	 */
--	netif_carrier_on(mii->dev);
-+	for (i = 0; i < PHY_MAX_ADDR; i++)
-+		bp->mii_bus.irq[i] = PHY_POLL;
- 
--	/* get MII advertise and LPA values */
--	if (!init_media && mii->advertising) {
--		advertise = mii->advertising;
--	} else {
--		advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE);
--		mii->advertising = advertise;
--	}
--	lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
-+	platform_set_drvdata(bp->dev, &bp->mii_bus);
- 
--	/* figure out media and duplex from advertise and LPA values */
--	media = mii_nway_result(lpa & advertise);
--	duplex = (media & ADVERTISE_FULL) ? 1 : 0;
-+	if (mdiobus_register(&bp->mii_bus))
-+		goto err_out_free_mdio_irq;
- 
--	if (ok_to_print)
--		printk(KERN_INFO "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n",
--		       mii->dev->name,
--		       media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? "100" : "10",
--		       duplex ? "full" : "half", lpa);
-+	if (macb_mii_probe(bp->dev) != 0) {
-+		goto err_out_unregister_bus;
++	spin_lock_irq(&ep->udc->lock);
++	list_for_each_entry(req, &ep->queue, queue) {
++		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
++		if (!req_copy)
++			goto fail;
++		memcpy(req_copy, req, sizeof(*req_copy));
++		list_add_tail(&req_copy->queue, queue_data);
 +	}
- 
--	mii->full_duplex = duplex;
++	spin_unlock_irq(&ep->udc->lock);
++
++	file->private_data = queue_data;
 +	return 0;
- 
--	/* Let the MAC know about the new link state */
--	macb_set_media(bp, media);
-+err_out_unregister_bus:
-+	mdiobus_unregister(&bp->mii_bus);
-+err_out_free_mdio_irq:
-+	kfree(bp->mii_bus.irq);
-+err_out:
-+	return err;
- }
- 
- static void macb_update_stats(struct macb *bp)
-@@ -265,16 +296,6 @@
- 		*p += __raw_readl(reg);
- }
- 
--static void macb_periodic_task(struct work_struct *work)
--{
--	struct macb *bp = container_of(work, struct macb, periodic_task.work);
--
--	macb_update_stats(bp);
--	macb_check_media(bp, 1, 0);
--
--	schedule_delayed_work(&bp->periodic_task, HZ);
--}
--
- static void macb_tx(struct macb *bp)
- {
- 	unsigned int tail;
-@@ -519,9 +540,6 @@
- 	spin_lock(&bp->lock);
- 
- 	while (status) {
--		if (status & MACB_BIT(MFD))
--			complete(&bp->mdio_complete);
--
- 		/* close possible race with dev_close */
- 		if (unlikely(!netif_running(dev))) {
- 			macb_writel(bp, IDR, ~0UL);
-@@ -535,7 +553,8 @@
- 				 * until we have processed the buffers
- 				 */
- 				macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
--				dev_dbg(&bp->pdev->dev, "scheduling RX softirq\n");
-+				dev_dbg(&bp->pdev->dev,
-+					"scheduling RX softirq\n");
- 				__netif_rx_schedule(dev);
- 			}
- 		}
-@@ -765,7 +784,7 @@
- 	macb_writel(bp, TBQP, bp->tx_ring_dma);
- 
- 	/* Enable TX and RX */
--	macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE));
-+	macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
- 
- 	/* Enable interrupts */
- 	macb_writel(bp, IER, (MACB_BIT(RCOMP)
-@@ -776,18 +795,126 @@
- 			      | MACB_BIT(TCOMP)
- 			      | MACB_BIT(ISR_ROVR)
- 			      | MACB_BIT(HRESP)));
 +
++fail:
++	spin_unlock_irq(&ep->udc->lock);
++	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
++	}
++	kfree(queue_data);
++	return -ENOMEM;
 +}
 +
 +/*
-+ * The hash address register is 64 bits long and takes up two
-+ * locations in the memory map.  The least significant bits are stored
-+ * in EMAC_HSL and the most significant bits in EMAC_HSH.
-+ *
-+ * The unicast hash enable and the multicast hash enable bits in the
-+ * network configuration register enable the reception of hash matched
-+ * frames. The destination address is reduced to a 6 bit index into
-+ * the 64 bit hash register using the following hash function.  The
-+ * hash function is an exclusive or of every sixth bit of the
-+ * destination address.
-+ *
-+ * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
-+ * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
-+ * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
-+ * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
-+ * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
-+ * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
++ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
 + *
-+ * da[0] represents the least significant bit of the first byte
-+ * received, that is, the multicast/unicast indicator, and da[47]
-+ * represents the most significant bit of the last byte received.  If
-+ * the hash index, hi[n], points to a bit that is set in the hash
-+ * register then the frame will be matched according to whether the
-+ * frame is multicast or unicast.  A multicast match will be signalled
-+ * if the multicast hash enable bit is set, da[0] is 1 and the hash
-+ * index points to a bit set in the hash register.  A unicast match
-+ * will be signalled if the unicast hash enable bit is set, da[0] is 0
-+ * and the hash index points to a bit set in the hash register.  To
-+ * receive all multicast frames, the hash register should be set with
-+ * all ones and the multicast hash enable bit should be set in the
-+ * network configuration register.
-+ */
-+
-+static inline int hash_bit_value(int bitnr, __u8 *addr)
-+{
-+	if (addr[bitnr / 8] & (1 << (bitnr % 8)))
-+		return 1;
-+	return 0;
-+}
-+
-+/*
-+ * Return the hash index value for the specified address.
++ * b: buffer address
++ * l: buffer length
++ * I/i: interrupt/no interrupt
++ * Z/z: zero/no zero
++ * S/s: short ok/short not ok
++ * s: status
++ * n: nr_packets
++ * F/f: submitted/not submitted to FIFO
++ * D/d: using/not using DMA
++ * L/l: last transaction/not last transaction
 + */
-+static int hash_get_index(__u8 *addr)
++static ssize_t queue_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
 +{
-+	int i, j, bitval;
-+	int hash_index = 0;
++	struct list_head *queue = file->private_data;
++	struct usba_request *req, *tmp_req;
++	size_t len, remaining, actual = 0;
++	char tmpbuf[38];
 +
-+	for (j = 0; j < 6; j++) {
-+		for (i = 0, bitval = 0; i < 8; i++)
-+			bitval ^= hash_bit_value(i*6 + j, addr);
++	if (!access_ok(VERIFY_WRITE, buf, nbytes))
++		return -EFAULT;
 +
-+		hash_index |= (bitval << j);
-+	}
++	mutex_lock(&file->f_dentry->d_inode->i_mutex);
++	list_for_each_entry_safe(req, tmp_req, queue, queue) {
++		len = snprintf(tmpbuf, sizeof(tmpbuf),
++				"%8p %08x %c%c%c %5d %c%c%c\n",
++				req->req.buf, req->req.length,
++				req->req.no_interrupt ? 'i' : 'I',
++				req->req.zero ? 'Z' : 'z',
++				req->req.short_not_ok ? 's' : 'S',
++				req->req.status,
++				req->submitted ? 'F' : 'f',
++				req->using_dma ? 'D' : 'd',
++				req->last_transaction ? 'L' : 'l');
++		len = min(len, sizeof(tmpbuf));
++		if (len > nbytes)
++			break;
 +
-+	return hash_index;
- }
- 
--static void macb_init_phy(struct net_device *dev)
-+/*
-+ * Add multicast addresses to the internal multicast-hash table.
-+ */
-+static void macb_sethashtable(struct net_device *dev)
- {
-+	struct dev_mc_list *curr;
-+	unsigned long mc_filter[2];
-+	unsigned int i, bitnr;
- 	struct macb *bp = netdev_priv(dev);
- 
--	/* Set some reasonable default settings */
--	macb_mdio_write(dev, bp->mii.phy_id, MII_ADVERTISE,
--			ADVERTISE_CSMA | ADVERTISE_ALL);
--	macb_mdio_write(dev, bp->mii.phy_id, MII_BMCR,
--			(BMCR_SPEED100 | BMCR_ANENABLE
--			 | BMCR_ANRESTART | BMCR_FULLDPLX));
-+	mc_filter[0] = mc_filter[1] = 0;
++		list_del(&req->queue);
++		kfree(req);
 +
-+	curr = dev->mc_list;
-+	for (i = 0; i < dev->mc_count; i++, curr = curr->next) {
-+		if (!curr) break;	/* unexpected end of list */
++		remaining = __copy_to_user(buf, tmpbuf, len);
++		actual += len - remaining;
++		if (remaining)
++			break;
 +
-+		bitnr = hash_get_index(curr->dmi_addr);
-+		mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
++		nbytes -= len;
++		buf += len;
 +	}
++	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
 +
-+	macb_writel(bp, HRB, mc_filter[0]);
-+	macb_writel(bp, HRT, mc_filter[1]);
++	return actual;
 +}
 +
-+/*
-+ * Enable/Disable promiscuous and multicast modes.
-+ */
-+static void macb_set_rx_mode(struct net_device *dev)
-+{
-+	unsigned long cfg;
-+	struct macb *bp = netdev_priv(dev);
-+
-+	cfg = macb_readl(bp, NCFGR);
-+
-+	if (dev->flags & IFF_PROMISC)
-+		/* Enable promiscuous mode */
-+		cfg |= MACB_BIT(CAF);
-+	else if (dev->flags & (~IFF_PROMISC))
-+		 /* Disable promiscuous mode */
-+		cfg &= ~MACB_BIT(CAF);
-+
-+	if (dev->flags & IFF_ALLMULTI) {
-+		/* Enable all multicast mode */
-+		macb_writel(bp, HRB, -1);
-+		macb_writel(bp, HRT, -1);
-+		cfg |= MACB_BIT(NCFGR_MTI);
-+	} else if (dev->mc_count > 0) {
-+		/* Enable specific multicasts */
-+		macb_sethashtable(dev);
-+		cfg |= MACB_BIT(NCFGR_MTI);
-+	} else if (dev->flags & (~IFF_ALLMULTI)) {
-+		/* Disable all multicast mode */
-+		macb_writel(bp, HRB, 0);
-+		macb_writel(bp, HRT, 0);
-+		cfg &= ~MACB_BIT(NCFGR_MTI);
-+	}
-+
-+	macb_writel(bp, NCFGR, cfg);
- }
- 
- static int macb_open(struct net_device *dev)
-@@ -797,6 +924,10 @@
- 
- 	dev_dbg(&bp->pdev->dev, "open\n");
- 
-+	/* if the phy is not yet register, retry later*/
-+	if (!bp->phy_dev)
-+		return -EAGAIN;
-+
- 	if (!is_valid_ether_addr(dev->dev_addr))
- 		return -EADDRNOTAVAIL;
- 
-@@ -810,12 +941,11 @@
- 
- 	macb_init_rings(bp);
- 	macb_init_hw(bp);
--	macb_init_phy(dev);
- 
--	macb_check_media(bp, 1, 1);
--	netif_start_queue(dev);
-+	/* schedule a link state check */
-+	phy_start(bp->phy_dev);
- 
--	schedule_delayed_work(&bp->periodic_task, HZ);
-+	netif_start_queue(dev);
- 
- 	return 0;
- }
-@@ -825,10 +955,11 @@
- 	struct macb *bp = netdev_priv(dev);
- 	unsigned long flags;
- 
--	cancel_rearming_delayed_work(&bp->periodic_task);
--
- 	netif_stop_queue(dev);
- 
-+	if (bp->phy_dev)
-+		phy_stop(bp->phy_dev);
-+
- 	spin_lock_irqsave(&bp->lock, flags);
- 	macb_reset_hw(bp);
- 	netif_carrier_off(dev);
-@@ -845,6 +976,9 @@
- 	struct net_device_stats *nstat = &bp->stats;
- 	struct macb_stats *hwstat = &bp->hw_stats;
- 
-+	/* read stats from hardware */
-+	macb_update_stats(bp);
-+
- 	/* Convert HW stats into netdevice stats */
- 	nstat->rx_errors = (hwstat->rx_fcs_errors +
- 			    hwstat->rx_align_errors +
-@@ -882,18 +1016,27 @@
- static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
- 
--	return mii_ethtool_gset(&bp->mii, cmd);
-+	return phy_ethtool_gset(phydev, cmd);
- }
- 
- static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
- 
--	return mii_ethtool_sset(&bp->mii, cmd);
-+	return phy_ethtool_sset(phydev, cmd);
- }
- 
--static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-+static void macb_get_drvinfo(struct net_device *dev,
-+			     struct ethtool_drvinfo *info)
- {
- 	struct macb *bp = netdev_priv(dev);
- 
-@@ -902,104 +1045,34 @@
- 	strcpy(info->bus_info, bp->pdev->dev.bus_id);
- }
- 
--static int macb_nway_reset(struct net_device *dev)
--{
--	struct macb *bp = netdev_priv(dev);
--	return mii_nway_restart(&bp->mii);
--}
--
- static struct ethtool_ops macb_ethtool_ops = {
- 	.get_settings		= macb_get_settings,
- 	.set_settings		= macb_set_settings,
- 	.get_drvinfo		= macb_get_drvinfo,
--	.nway_reset		= macb_nway_reset,
- 	.get_link		= ethtool_op_get_link,
- };
- 
- static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
- {
- 	struct macb *bp = netdev_priv(dev);
-+	struct phy_device *phydev = bp->phy_dev;
- 
- 	if (!netif_running(dev))
- 		return -EINVAL;
- 
--	return generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
--}
--
--static ssize_t macb_mii_show(const struct device *_dev, char *buf,
--			unsigned long addr)
--{
--	struct net_device *dev = to_net_dev(_dev);
--	struct macb *bp = netdev_priv(dev);
--	ssize_t ret = -EINVAL;
--
--	if (netif_running(dev)) {
--		int value;
--		value = macb_mdio_read(dev, bp->mii.phy_id, addr);
--		ret = sprintf(buf, "0x%04x\n", (uint16_t)value);
--	}
--
--	return ret;
--}
--
--#define MII_ENTRY(name, addr)					\
--static ssize_t show_##name(struct device *_dev,			\
--			   struct device_attribute *attr,	\
--			   char *buf)				\
--{								\
--	return macb_mii_show(_dev, buf, addr);			\
--}								\
--static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
--
--MII_ENTRY(bmcr, MII_BMCR);
--MII_ENTRY(bmsr, MII_BMSR);
--MII_ENTRY(physid1, MII_PHYSID1);
--MII_ENTRY(physid2, MII_PHYSID2);
--MII_ENTRY(advertise, MII_ADVERTISE);
--MII_ENTRY(lpa, MII_LPA);
--MII_ENTRY(expansion, MII_EXPANSION);
--
--static struct attribute *macb_mii_attrs[] = {
--	&dev_attr_bmcr.attr,
--	&dev_attr_bmsr.attr,
--	&dev_attr_physid1.attr,
--	&dev_attr_physid2.attr,
--	&dev_attr_advertise.attr,
--	&dev_attr_lpa.attr,
--	&dev_attr_expansion.attr,
--	NULL,
--};
--
--static struct attribute_group macb_mii_group = {
--	.name	= "mii",
--	.attrs	= macb_mii_attrs,
--};
--
--static void macb_unregister_sysfs(struct net_device *net)
--{
--	struct device *_dev = &net->dev;
-+	if (!phydev)
-+		return -ENODEV;
- 
--	sysfs_remove_group(&_dev->kobj, &macb_mii_group);
-+	return phy_mii_ioctl(phydev, if_mii(rq), cmd);
- }
- 
--static int macb_register_sysfs(struct net_device *net)
--{
--	struct device *_dev = &net->dev;
--	int ret;
--
--	ret = sysfs_create_group(&_dev->kobj, &macb_mii_group);
--	if (ret)
--		printk(KERN_WARNING
--		       "%s: sysfs mii attribute registration failed: %d\n",
--		       net->name, ret);
--	return ret;
--}
- static int __devinit macb_probe(struct platform_device *pdev)
- {
- 	struct eth_platform_data *pdata;
- 	struct resource *regs;
- 	struct net_device *dev;
- 	struct macb *bp;
-+	struct phy_device *phydev;
- 	unsigned long pclk_hz;
- 	u32 config;
- 	int err = -ENXIO;
-@@ -1073,6 +1146,7 @@
- 	dev->stop = macb_close;
- 	dev->hard_start_xmit = macb_start_xmit;
- 	dev->get_stats = macb_get_stats;
-+	dev->set_multicast_list = macb_set_rx_mode;
- 	dev->do_ioctl = macb_ioctl;
- 	dev->poll = macb_poll;
- 	dev->weight = 64;
-@@ -1080,10 +1154,6 @@
- 
- 	dev->base_addr = regs->start;
- 
--	INIT_DELAYED_WORK(&bp->periodic_task, macb_periodic_task);
--	mutex_init(&bp->mdio_mutex);
--	init_completion(&bp->mdio_complete);
--
- 	/* Set MII management clock divider */
- 	pclk_hz = clk_get_rate(bp->pclk);
- 	if (pclk_hz <= 20000000)
-@@ -1096,20 +1166,9 @@
- 		config = MACB_BF(CLK, MACB_CLK_DIV64);
- 	macb_writel(bp, NCFGR, config);
- 
--	bp->mii.dev = dev;
--	bp->mii.mdio_read = macb_mdio_read;
--	bp->mii.mdio_write = macb_mdio_write;
--	bp->mii.phy_id_mask = 0x1f;
--	bp->mii.reg_num_mask = 0x1f;
--
- 	macb_get_hwaddr(bp);
--	err = macb_phy_probe(bp);
--	if (err) {
--		dev_err(&pdev->dev, "Failed to detect PHY, aborting.\n");
--		goto err_out_free_irq;
--	}
--
- 	pdata = pdev->dev.platform_data;
++static int queue_dbg_release(struct inode *inode, struct file *file)
++{
++	struct list_head *queue_data = file->private_data;
++	struct usba_request *req, *tmp_req;
 +
- 	if (pdata && pdata->is_rmii)
- #if defined(CONFIG_ARCH_AT91)
- 		macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
-@@ -1131,9 +1190,11 @@
- 		goto err_out_free_irq;
- 	}
- 
--	platform_set_drvdata(pdev, dev);
-+	if (macb_mii_init(bp) != 0) {
-+		goto err_out_unregister_netdev;
++	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
++		list_del(&req->queue);
++		kfree(req);
 +	}
- 
--	macb_register_sysfs(dev);
-+	platform_set_drvdata(pdev, dev);
- 
- 	printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d "
- 	       "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
-@@ -1141,8 +1202,15 @@
- 	       dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
- 	       dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
- 
-+	phydev = bp->phy_dev;
-+	printk(KERN_INFO "%s: attached PHY driver [%s] "
-+		"(mii_bus:phy_addr=%s, irq=%d)\n",
-+		dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
-+
- 	return 0;
- 
-+err_out_unregister_netdev:
-+	unregister_netdev(dev);
- err_out_free_irq:
- 	free_irq(dev->irq, dev);
- err_out_iounmap:
-@@ -1153,7 +1221,9 @@
- 	clk_put(bp->hclk);
- #endif
- 	clk_disable(bp->pclk);
-+#ifndef CONFIG_ARCH_AT91
- err_out_put_pclk:
-+#endif
- 	clk_put(bp->pclk);
- err_out_free_dev:
- 	free_netdev(dev);
-@@ -1171,7 +1241,8 @@
- 
- 	if (dev) {
- 		bp = netdev_priv(dev);
--		macb_unregister_sysfs(dev);
-+		mdiobus_unregister(&bp->mii_bus);
-+		kfree(bp->mii_bus.irq);
- 		unregister_netdev(dev);
- 		free_irq(dev->irq, dev);
- 		iounmap(bp->regs);
-diff -x .git -Nur linux-2.6.22.1/drivers/net/macb.h linux-avr32.git/drivers/net/macb.h
---- linux-2.6.22.1/drivers/net/macb.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/net/macb.h	2007-07-12 14:00:04.000000000 +0200
-@@ -383,11 +383,11 @@
- 
- 	unsigned int		rx_pending, tx_pending;
- 
--	struct delayed_work	periodic_task;
--
--	struct mutex		mdio_mutex;
--	struct completion	mdio_complete;
--	struct mii_if_info	mii;
-+	struct mii_bus		mii_bus;
-+	struct phy_device	*phy_dev;
-+	unsigned int 		link;
-+	unsigned int 		speed;
-+	unsigned int 		duplex;
- };
- 
- #endif /* _MACB_H */
-diff -x .git -Nur linux-2.6.22.1/drivers/rtc/Kconfig linux-avr32.git/drivers/rtc/Kconfig
---- linux-2.6.22.1/drivers/rtc/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/rtc/Kconfig	2007-07-12 14:00:13.000000000 +0200
-@@ -379,6 +379,13 @@
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called rtc-pl031.
- 
-+config RTC_DRV_AT32AP700X
-+	tristate "AT32AP700X series RTC"
-+	depends on RTC_CLASS && PLATFORM_AT32AP
-+	help
-+	  Driver for the internal RTC (Realtime Clock) on Atmel AVR32
-+	  AT32AP700x family processors.
-+
- config RTC_DRV_AT91RM9200
- 	tristate "AT91RM9200"
- 	depends on RTC_CLASS && ARCH_AT91RM9200
-diff -x .git -Nur linux-2.6.22.1/drivers/rtc/Makefile linux-avr32.git/drivers/rtc/Makefile
---- linux-2.6.22.1/drivers/rtc/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/rtc/Makefile	2007-07-12 14:00:13.000000000 +0200
-@@ -19,6 +19,7 @@
- obj-$(CONFIG_RTC_DRV_X1205)	+= rtc-x1205.o
- obj-$(CONFIG_RTC_DRV_ISL1208)	+= rtc-isl1208.o
- obj-$(CONFIG_RTC_DRV_TEST)	+= rtc-test.o
-+obj-$(CONFIG_RTC_DRV_AT32AP700X)	+= rtc-at32ap700x.o
- obj-$(CONFIG_RTC_DRV_DS1307)	+= rtc-ds1307.o
- obj-$(CONFIG_RTC_DRV_DS1672)	+= rtc-ds1672.o
- obj-$(CONFIG_RTC_DRV_DS1742)	+= rtc-ds1742.o
-diff -x .git -Nur linux-2.6.22.1/drivers/rtc/rtc-at32ap700x.c linux-avr32.git/drivers/rtc/rtc-at32ap700x.c
---- linux-2.6.22.1/drivers/rtc/rtc-at32ap700x.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/rtc/rtc-at32ap700x.c	2007-07-12 14:00:13.000000000 +0200
-@@ -0,0 +1,337 @@
-+/*
-+ * An RTC driver for the AVR32 AT32AP700x processor series.
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/rtc.h>
-+#include <linux/io.h>
++	kfree(queue_data);
++	return 0;
++}
 +
-+/*
-+ * This is a bare-bones RTC. It runs during most system sleep states, but has
-+ * no battery backup and gets reset during system restart.  It must be
-+ * initialized from an external clock (network, I2C, etc) before it can be of
-+ * much use.
-+ *
-+ * The alarm functionality is limited by the hardware, not supporting
-+ * periodic interrupts.
-+ */
++static int regs_dbg_open(struct inode *inode, struct file *file)
++{
++	struct usba_udc *udc;
++	unsigned int i;
++	u32 *data;
++	int ret = -ENOMEM;
 +
-+#define RTC_CTRL		0x00
-+#define RTC_CTRL_EN		   0
-+#define RTC_CTRL_PCLR		   1
-+#define RTC_CTRL_TOPEN		   2
-+#define RTC_CTRL_PSEL		   8
++	mutex_lock(&inode->i_mutex);
++	udc = inode->i_private;
++	data = kmalloc(inode->i_size, GFP_KERNEL);
++	if (!data)
++		goto out;
 +
-+#define RTC_VAL			0x04
++	spin_lock_irq(&udc->lock);
++	for (i = 0; i < inode->i_size / 4; i++)
++		data[i] = __raw_readl(udc->regs + i * 4);
++	spin_unlock_irq(&udc->lock);
 +
-+#define RTC_TOP			0x08
++	file->private_data = data;
++	ret = 0;
 +
-+#define RTC_IER			0x10
-+#define RTC_IER_TOPI		   0
++out:
++	mutex_unlock(&inode->i_mutex);
 +
-+#define RTC_IDR			0x14
-+#define RTC_IDR_TOPI		   0
++	return ret;
++}
 +
-+#define RTC_IMR			0x18
-+#define RTC_IMR_TOPI		   0
++static ssize_t regs_dbg_read(struct file *file, char __user *buf,
++		size_t nbytes, loff_t *ppos)
++{
++	struct inode *inode = file->f_dentry->d_inode;
++	int ret;
 +
-+#define RTC_ISR			0x1c
-+#define RTC_ISR_TOPI		   0
++	mutex_lock(&inode->i_mutex);
++	ret = simple_read_from_buffer(buf, nbytes, ppos,
++			file->private_data,
++			file->f_dentry->d_inode->i_size);
++	mutex_unlock(&inode->i_mutex);
 +
-+#define RTC_ICR			0x20
-+#define RTC_ICR_TOPI		   0
++	return ret;
++}
 +
-+#define RTC_BIT(name)		(1 << RTC_##name)
-+#define RTC_BF(name, value)	((value) << RTC_##name)
++static int regs_dbg_release(struct inode *inode, struct file *file)
++{
++	kfree(file->private_data);
++	return 0;
++}
 +
-+#define rtc_readl(dev, reg)				\
-+	__raw_readl((dev)->regs + RTC_##reg)
-+#define rtc_writel(dev, reg, value)			\
-+	__raw_writel((value), (dev)->regs + RTC_##reg)
++const struct file_operations queue_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= queue_dbg_open,
++	.llseek		= no_llseek,
++	.read		= queue_dbg_read,
++	.release	= queue_dbg_release,
++};
 +
-+struct rtc_at32ap700x {
-+	struct rtc_device	*rtc;
-+	void __iomem		*regs;
-+	unsigned long		alarm_time;
-+	unsigned long		irq;
-+	/* Protect against concurrent register access. */
-+	spinlock_t		lock;
++const struct file_operations regs_dbg_fops = {
++	.owner		= THIS_MODULE,
++	.open		= regs_dbg_open,
++	.llseek		= generic_file_llseek,
++	.read		= regs_dbg_read,
++	.release	= regs_dbg_release,
 +};
 +
-+static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm)
++static void usba_ep_init_debugfs(struct usba_udc *udc,
++		struct usba_ep *ep)
 +{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long now;
++	struct dentry *ep_root;
 +
-+	now = rtc_readl(rtc, VAL);
-+	rtc_time_to_tm(now, tm);
++	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
++	if (!ep_root)
++		goto err_root;
++	ep->debugfs_dir = ep_root;
 +
-+	return 0;
-+}
++	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
++						ep, &queue_dbg_fops);
++	if (!ep->debugfs_queue)
++		goto err_queue;
 +
-+static int at32_rtc_settime(struct device *dev, struct rtc_time *tm)
-+{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long now;
-+	int ret;
++	if (ep->can_dma) {
++		ep->debugfs_dma_status
++			= debugfs_create_u32("dma_status", 0400, ep_root,
++					&ep->last_dma_status);
++		if (!ep->debugfs_dma_status)
++			goto err_dma_status;
++	}
++	if (ep_is_control(ep)) {
++		ep->debugfs_state
++			= debugfs_create_u32("state", 0400, ep_root,
++					&ep->state);
++		if (!ep->debugfs_state)
++			goto err_state;
++	}
 +
-+	ret = rtc_tm_to_time(tm, &now);
-+	if (ret == 0)
-+		rtc_writel(rtc, VAL, now);
++	return;
 +
-+	return ret;
++err_state:
++	if (ep->can_dma)
++		debugfs_remove(ep->debugfs_dma_status);
++err_dma_status:
++	debugfs_remove(ep->debugfs_queue);
++err_queue:
++	debugfs_remove(ep_root);
++err_root:
++	dev_err(&ep->udc->pdev->dev,
++		"failed to create debugfs directory for %s\n", ep->ep.name);
 +}
 +
-+static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
++static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
 +{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+
-+	rtc_time_to_tm(rtc->alarm_time, &alrm->time);
-+	alrm->pending = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
-+
-+	return 0;
++	debugfs_remove(ep->debugfs_queue);
++	debugfs_remove(ep->debugfs_dma_status);
++	debugfs_remove(ep->debugfs_state);
++	debugfs_remove(ep->debugfs_dir);
++	ep->debugfs_dma_status = NULL;
++	ep->debugfs_dir = NULL;
 +}
 +
-+static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
++static void usba_init_debugfs(struct usba_udc *udc)
 +{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	unsigned long rtc_unix_time;
-+	unsigned long alarm_unix_time;
-+	int ret;
++	struct dentry *root, *regs;
++	struct resource *regs_resource;
 +
-+	rtc_unix_time = rtc_readl(rtc, VAL);
++	root = debugfs_create_dir(udc->gadget.name, NULL);
++	if (IS_ERR(root) || !root)
++		goto err_root;
++	udc->debugfs_root = root;
 +
-+	/* RTC does only support one alarm time, not periodic */
-+	if (alrm->time.tm_mday <= 0) {
-+		struct rtc_time	tm;
-+		unsigned long then;
++	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
++	if (!regs)
++		goto err_regs;
 +
-+		rtc_time_to_tm(rtc_unix_time, &tm);
++	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
++				CTRL_IOMEM_ID);
++	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
++	udc->debugfs_regs = regs;
 +
-+		alrm->time.tm_mday = tm.tm_mday;
-+		alrm->time.tm_mon  = tm.tm_mon;
-+		alrm->time.tm_year = tm.tm_year;
++	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
 +
-+		rtc_tm_to_time(&alrm->time, &then);
++	return;
 +
-+		/* check if the alarm wraps into tomorrow */
-+		if (then < rtc_unix_time) {
-+			rtc_time_to_tm(rtc_unix_time + 24 * 60 * 60, &tm);
-+			alrm->time.tm_mday = tm.tm_mday;
-+			alrm->time.tm_mon  = tm.tm_mon;
-+			alrm->time.tm_year = tm.tm_year;
-+		}
-+	}
++err_regs:
++	debugfs_remove(root);
++err_root:
++	udc->debugfs_root = NULL;
++	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++}
 +
-+	ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time);
-+	if (ret)
-+		return ret;
++static void usba_cleanup_debugfs(struct usba_udc *udc)
++{
++	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
++	debugfs_remove(udc->debugfs_regs);
++	debugfs_remove(udc->debugfs_root);
++	udc->debugfs_regs = NULL;
++	udc->debugfs_root = NULL;
++}
++#else
++static inline void usba_ep_init_debugfs(struct usba_udc *udc,
++					 struct usba_ep *ep)
++{
 +
-+	if (alarm_unix_time < rtc_unix_time)
-+		return -EINVAL;
++}
 +
-+	spin_lock_irq(&rtc->lock);
-+	rtc->alarm_time = alarm_unix_time;
-+	rtc_writel(rtc, TOP, rtc->alarm_time);
-+	if (alrm->pending)
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				| RTC_BIT(CTRL_TOPEN));
-+	else
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+	spin_unlock_irq(&rtc->lock);
++static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++{
 +
-+	return ret;
 +}
 +
-+static int at32_rtc_ioctl(struct device *dev, unsigned int cmd,
-+			unsigned long arg)
++static inline void usba_init_debugfs(struct usba_udc *udc)
 +{
-+	struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
-+	int ret = 0;
 +
-+	spin_lock_irq(&rtc->lock);
++}
 +
-+	switch (cmd) {
-+	case RTC_AIE_ON:
-+		if (rtc_readl(rtc, VAL) > rtc->alarm_time) {
-+			ret = -EINVAL;
-+			break;
-+		}
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				| RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
-+		break;
-+	case RTC_AIE_OFF:
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		break;
-+	default:
-+		ret = -ENOIOCTLCMD;
-+		break;
-+	}
-+
-+	spin_unlock_irq(&rtc->lock);
++static inline void usba_cleanup_debugfs(struct usba_udc *udc)
++{
 +
-+	return ret;
 +}
++#endif
 +
-+static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id)
++static int vbus_is_present(struct usba_udc *udc)
 +{
-+	struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id;
-+	unsigned long isr = rtc_readl(rtc, ISR);
-+	unsigned long events = 0;
-+	int ret = IRQ_NONE;
-+
-+	spin_lock(&rtc->lock);
-+
-+	if (isr & RTC_BIT(ISR_TOPI)) {
-+		rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
-+				& ~RTC_BIT(CTRL_TOPEN));
-+		rtc_writel(rtc, VAL, rtc->alarm_time);
-+		events = RTC_AF | RTC_IRQF;
-+		rtc_update_irq(rtc->rtc, 1, events);
-+		ret = IRQ_HANDLED;
-+	}
-+
-+	spin_unlock(&rtc->lock);
++	if (udc->vbus_pin != -1)
++		return gpio_get_value(udc->vbus_pin);
 +
-+	return ret;
++	/* No Vbus detection: Assume always present */
++	return 1;
 +}
 +
-+static struct rtc_class_ops at32_rtc_ops = {
-+	.ioctl		= at32_rtc_ioctl,
-+	.read_time	= at32_rtc_readtime,
-+	.set_time	= at32_rtc_settime,
-+	.read_alarm	= at32_rtc_readalarm,
-+	.set_alarm	= at32_rtc_setalarm,
-+};
-+
-+static int __init at32_rtc_probe(struct platform_device *pdev)
++static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
 +{
-+	struct resource	*regs;
-+	struct rtc_at32ap700x *rtc;
-+	int irq = -1;
-+	int ret;
++	unsigned long tmp;
 +
-+	rtc = kzalloc(sizeof(struct rtc_at32ap700x), GFP_KERNEL);
-+	if (!rtc) {
-+		dev_dbg(&pdev->dev, "out of memory\n");
-+		return -ENOMEM;
++	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
++	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
++		tmp = *(unsigned long *)buf;
++		if (len >= 4) {
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++			__raw_writel(tmp, fifo);
++		} else {
++			do {
++				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
++				__raw_writeb(tmp >> 24, fifo);
++				fifo++;
++				tmp <<= 8;
++			} while (--len);
++			break;
++		}
 +	}
++}
 +
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_dbg(&pdev->dev, "no mmio resource defined\n");
-+		ret = -ENXIO;
-+		goto out;
-+	}
++static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++{
++	union {
++		unsigned long *w;
++		unsigned char *b;
++	} p;
++	unsigned long tmp;
 +
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0) {
-+		dev_dbg(&pdev->dev, "could not get irq\n");
-+		ret = -ENXIO;
-+		goto out;
++	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
++	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
++		if (len >= 4) {
++			tmp = __raw_readl(fifo);
++			*p.w = tmp;
++			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
++		} else {
++			do {
++				tmp = __raw_readb(fifo);
++				*p.b = tmp;
++				DBG(DBG_FIFO, " -> %02lx\n", tmp);
++				fifo++, p.b++;
++			} while (--len);
++		}
 +	}
++}
 +
-+	ret = request_irq(irq, at32_rtc_interrupt, IRQF_SHARED, "rtc", rtc);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
-+		goto out;
-+	}
++static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
++{
++	unsigned int transaction_len;
 +
-+	rtc->irq = irq;
-+	rtc->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!rtc->regs) {
-+		ret = -ENOMEM;
-+		dev_dbg(&pdev->dev, "could not map I/O memory\n");
-+		goto out_free_irq;
-+	}
-+	spin_lock_init(&rtc->lock);
++	transaction_len = req->req.length - req->req.actual;
++	req->last_transaction = 1;
++	if (transaction_len > ep->ep.maxpacket) {
++		transaction_len = ep->ep.maxpacket;
++		req->last_transaction = 0;
++	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
++		req->last_transaction = 0;
 +
-+	/*
-+	 * Maybe init RTC: count from zero at 1 Hz, disable wrap irq.
-+	 *
-+	 * Do not reset VAL register, as it can hold an old time
-+	 * from last JTAG reset.
-+	 */
-+	if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) {
-+		rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR));
-+		rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
-+		rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe)
-+				| RTC_BIT(CTRL_EN));
-+	}
++	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
++		ep->ep.name, req, transaction_len,
++		req->last_transaction ? ", done" : "");
 +
-+	rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
-+				&at32_rtc_ops, THIS_MODULE);
-+	if (IS_ERR(rtc->rtc)) {
-+		dev_dbg(&pdev->dev, "could not register rtc device\n");
-+		ret = PTR_ERR(rtc->rtc);
-+		goto out_iounmap;
-+	}
++	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	req->req.actual += transaction_len;
++}
++
++static void submit_request(struct usba_ep *ep, struct usba_request *req)
++{
++	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
++		ep->ep.name, req, req->req.length);
 +
-+	platform_set_drvdata(pdev, rtc);
++	req->req.actual = 0;
++	req->submitted = 1;
 +
-+	dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
-+			(unsigned long)rtc->regs, rtc->irq);
++	if (req->using_dma) {
++		if (req->req.length == 0) {
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++			return;
++		}
 +
-+	return 0;
++		if (req->req.zero)
++			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
++		else
++			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
 +
-+out_iounmap:
-+	iounmap(rtc->regs);
-+out_free_irq:
-+	free_irq(irq, rtc);
-+out:
-+	kfree(rtc);
-+	return ret;
++		usba_dma_writel(ep, ADDRESS, req->req.dma);
++		usba_dma_writel(ep, CONTROL, req->ctrl);
++	} else {
++		next_fifo_transaction(ep, req);
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		} else {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		}
++	}
 +}
 +
-+static int __exit at32_rtc_remove(struct platform_device *pdev)
++static void submit_next_request(struct usba_ep *ep)
 +{
-+	struct rtc_at32ap700x *rtc = platform_get_drvdata(pdev);
++	struct usba_request *req;
 +
-+	free_irq(rtc->irq, rtc);
-+	iounmap(rtc->regs);
-+	rtc_device_unregister(rtc->rtc);
-+	kfree(rtc);
-+	platform_set_drvdata(pdev, NULL);
++	if (list_empty(&ep->queue)) {
++		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
++		return;
++	}
 +
-+	return 0;
++	req = list_entry(ep->queue.next, struct usba_request, queue);
++	if (!req->submitted)
++		submit_request(ep, req);
 +}
 +
-+static struct platform_driver at32_rtc_driver = {
-+	.remove		= __exit_p(at32_rtc_remove),
-+	.driver		= {
-+		.name	= "rtc-at32ap700x",
-+		.owner	= THIS_MODULE,
-+	},
-+};
-+
-+static int __init at32_rtc_init(void)
++static void send_status(struct usba_udc *udc, struct usba_ep *ep)
 +{
-+	return platform_driver_probe(&at32_rtc_driver, at32_rtc_probe);
++	ep->state = STATUS_STAGE_IN;
++	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
 +}
-+module_init(at32_rtc_init);
 +
-+static void __exit at32_rtc_exit(void)
++static void receive_data(struct usba_ep *ep)
 +{
-+	platform_driver_unregister(&at32_rtc_driver);
-+}
-+module_exit(at32_rtc_exit);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req;
++	unsigned long status;
++	unsigned int bytecount, nr_busy;
++	int is_complete = 0;
 +
-+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
-+MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x");
-+MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/serial/atmel_serial.c linux-avr32.git/drivers/serial/atmel_serial.c
---- linux-2.6.22.1/drivers/serial/atmel_serial.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/serial/atmel_serial.c	2007-06-06 11:33:59.000000000 +0200
-@@ -114,6 +114,7 @@
- 	struct uart_port	uart;		/* uart */
- 	struct clk		*clk;		/* uart clock */
- 	unsigned short		suspended;	/* is port suspended? */
-+	int			break_active;	/* break being received */
- };
- 
- static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
-@@ -252,6 +253,7 @@
-  */
- static void atmel_rx_chars(struct uart_port *port)
- {
-+	struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
- 	struct tty_struct *tty = port->info->tty;
- 	unsigned int status, ch, flg;
- 
-@@ -267,13 +269,29 @@
- 		 * note that the error handling code is
- 		 * out of the main execution path
- 		 */
--		if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
-+		if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
-+				       | ATMEL_US_OVRE | ATMEL_US_RXBRK)
-+			     || atmel_port->break_active)) {
- 			UART_PUT_CR(port, ATMEL_US_RSTSTA);	/* clear error */
--			if (status & ATMEL_US_RXBRK) {
-+			if (status & ATMEL_US_RXBRK
-+			    && !atmel_port->break_active) {
- 				status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);	/* ignore side-effect */
- 				port->icount.brk++;
-+				atmel_port->break_active = 1;
-+				UART_PUT_IER(port, ATMEL_US_RXBRK);
- 				if (uart_handle_break(port))
- 					goto ignore_char;
-+			} else {
-+				/*
-+				 * This is either the end-of-break
-+				 * condition or we've received at
-+				 * least one character without RXBRK
-+				 * being set. In both cases, the next
-+				 * RXBRK will indicate start-of-break.
-+				 */
-+				UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+				status &= ~ATMEL_US_RXBRK;
-+				atmel_port->break_active = 0;
- 			}
- 			if (status & ATMEL_US_PARE)
- 				port->icount.parity++;
-@@ -352,6 +370,16 @@
- 		/* Interrupt receive */
- 		if (pending & ATMEL_US_RXRDY)
- 			atmel_rx_chars(port);
-+		else if (pending & ATMEL_US_RXBRK) {
-+			/*
-+			 * End of break detected. If it came along
-+			 * with a character, atmel_rx_chars will
-+			 * handle it.
-+			 */
-+			UART_PUT_CR(port, ATMEL_US_RSTSTA);
-+			UART_PUT_IDR(port, ATMEL_US_RXBRK);
-+			atmel_port->break_active = 0;
-+		}
- 
- 		// TODO: All reads to CSR will clear these interrupts!
- 		if (pending & ATMEL_US_RIIC) port->icount.rng++;
-diff -x .git -Nur linux-2.6.22.1/drivers/spi/atmel_spi.c linux-avr32.git/drivers/spi/atmel_spi.c
---- linux-2.6.22.1/drivers/spi/atmel_spi.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/spi/atmel_spi.c	2007-06-06 11:33:59.000000000 +0200
-@@ -412,8 +412,8 @@
- 		csr |= SPI_BIT(NCPHA);
- 
- 	/* TODO: DLYBS and DLYBCT */
--	csr |= SPI_BF(DLYBS, 10);
--	csr |= SPI_BF(DLYBCT, 10);
-+	csr |= SPI_BF(DLYBS, 0);
-+	csr |= SPI_BF(DLYBCT, 0);
- 
- 	/* chipselect must have been muxed as GPIO (e.g. in board setup) */
- 	npcs_pin = (unsigned int)spi->controller_data;
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.c linux-avr32.git/drivers/usb/gadget/atmel_usba_udc.c
---- linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/usb/gadget/atmel_usba_udc.c	2007-07-12 14:00:19.000000000 +0200
-@@ -0,0 +1,2072 @@
-+/*
-+ * Driver for the Atmel USBA high speed USB device controller
-+ *
-+ * Copyright (C) 2005-2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+/* #define DEBUG */
++	status = usba_ep_readl(ep, STA);
++	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 +
-+#include <linux/clk.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/list.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ch9.h>
-+#include <linux/usb_gadget.h>
-+#include <linux/delay.h>
++	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
 +
-+#include <asm/gpio.h>
-+#include <asm/arch/board.h>
++	while (nr_busy > 0) {
++		if (list_empty(&ep->queue)) {
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			break;
++		}
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
 +
-+#include "atmel_usba_udc.h"
++		bytecount = USBA_BFEXT(BYTE_COUNT, status);
 +
-+#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++		if (status & (1 << 31))
++			is_complete = 1;
++		if (req->req.actual + bytecount >= req->req.length) {
++			is_complete = 1;
++			bytecount = req->req.length - req->req.actual;
++		}
 +
-+#define FIFO_IOMEM_ID	0
-+#define CTRL_IOMEM_ID	1
++		copy_from_fifo(req->req.buf + req->req.actual,
++				ep->fifo, bytecount);
++		req->req.actual += bytecount;
 +
-+#ifdef DEBUG
-+#define DBG_ERR		0x0001	/* report all error returns */
-+#define DBG_HW		0x0002	/* debug hardware initialization */
-+#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
-+#define DBG_INT		0x0008	/* interrupts */
-+#define DBG_BUS		0x0010	/* report changes in bus state */
-+#define DBG_QUEUE	0x0020  /* debug request queue processing */
-+#define DBG_FIFO	0x0040  /* debug FIFO contents */
-+#define DBG_DMA		0x0080  /* debug DMA handling */
-+#define DBG_REQ		0x0100	/* print out queued request length */
-+#define DBG_ALL		0xffff
-+#define DBG_NONE	0x0000
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
 +
-+#define DEBUG_LEVEL	(DBG_ERR)
-+#define DBG(level, fmt, ...)					\
-+	do {							\
-+		if ((level) & DEBUG_LEVEL)			\
-+			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
-+	} while (0)
-+#else
-+#define DBG(level, fmt...)
-+#endif
++		if (is_complete) {
++			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
++			req->req.status = 0;
++			list_del_init(&req->queue);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			spin_unlock(&udc->lock);
++			req->req.complete(&ep->ep, &req->req);
++			spin_lock(&udc->lock);
++		}
 +
-+static struct usba_udc the_udc;
++		status = usba_ep_readl(ep, STA);
++		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
 +
-+#ifdef CONFIG_DEBUG_FS
-+#include <linux/debugfs.h>
-+#include <linux/uaccess.h>
++		if (is_complete && ep_is_control(ep)) {
++			send_status(udc, ep);
++			break;
++		}
++	}
++}
 +
-+static int queue_dbg_open(struct inode *inode, struct file *file)
++static void
++request_complete(struct usba_ep *ep, struct usba_request *req, int status)
 +{
-+	struct usba_ep *ep = inode->i_private;
-+	struct usba_request *req, *req_copy;
-+	struct list_head *queue_data;
++	struct usba_udc *udc = ep->udc;
 +
-+	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
-+	if (!queue_data)
-+		return -ENOMEM;
-+	INIT_LIST_HEAD(queue_data);
++	WARN_ON(!list_empty(&req->queue));
 +
-+	spin_lock_irq(&ep->udc->lock);
-+	list_for_each_entry(req, &ep->queue, queue) {
-+		req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC);
-+		if (!req_copy)
-+			goto fail;
-+		memcpy(req_copy, req, sizeof(*req_copy));
-+		list_add_tail(&req_copy->queue, queue_data);
++	if (req->req.status == -EINPROGRESS)
++		req->req.status = status;
++
++	if (req->mapped) {
++		dma_unmap_single(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->req.dma = DMA_ADDR_INVALID;
++		req->mapped = 0;
 +	}
-+	spin_unlock_irq(&ep->udc->lock);
 +
-+	file->private_data = queue_data;
-+	return 0;
++	DBG(DBG_GADGET | DBG_REQ,
++		"%s: req %p complete: status %d, actual %u\n",
++		ep->ep.name, req, req->req.status, req->req.actual);
 +
-+fail:
-+	spin_unlock_irq(&ep->udc->lock);
-+	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
-+		list_del(&req->queue);
-+		kfree(req);
-+	}
-+	kfree(queue_data);
-+	return -ENOMEM;
++	spin_unlock(&udc->lock);
++	req->req.complete(&ep->ep, &req->req);
++	spin_lock(&udc->lock);
 +}
 +
-+/*
-+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
-+ *
-+ * b: buffer address
-+ * l: buffer length
-+ * I/i: interrupt/no interrupt
-+ * Z/z: zero/no zero
-+ * S/s: short ok/short not ok
-+ * s: status
-+ * n: nr_packets
-+ * F/f: submitted/not submitted to FIFO
-+ * D/d: using/not using DMA
-+ * L/l: last transaction/not last transaction
-+ */
-+static ssize_t queue_dbg_read(struct file *file, char __user *buf,
-+			      size_t nbytes, loff_t *ppos)
++static void
++request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
 +{
-+	struct list_head *queue = file->private_data;
 +	struct usba_request *req, *tmp_req;
-+	size_t len, remaining, actual = 0;
-+	char tmpbuf[38];
 +
-+	if (!access_ok(VERIFY_WRITE, buf, nbytes))
-+		return -EFAULT;
++	list_for_each_entry_safe(req, tmp_req, list, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, status);
++	}
++}
 +
-+	mutex_lock(&file->f_dentry->d_inode->i_mutex);
-+	list_for_each_entry_safe(req, tmp_req, queue, queue) {
-+		len = snprintf(tmpbuf, sizeof(tmpbuf),
-+			       "%8p %08x %c%c%c %5d %c%c%c\n",
-+			       req->req.buf, req->req.length,
-+			       req->req.no_interrupt ? 'i' : 'I',
-+			       req->req.zero ? 'Z' : 'z',
-+			       req->req.short_not_ok ? 's' : 'S',
-+			       req->req.status,
-+			       req->submitted ? 'F' : 'f',
-+			       req->using_dma ? 'D' : 'd',
-+			       req->last_transaction ? 'L' : 'l');
-+		len = min(len, sizeof(tmpbuf));
-+		if (len > nbytes)
-+			break;
++static int
++usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
++{
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags, ept_cfg, maxpacket;
++	unsigned int nr_trans;
 +
-+		list_del(&req->queue);
-+		kfree(req);
++	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
 +
-+		remaining = __copy_to_user(buf, tmpbuf, len);
-+		actual += len - remaining;
-+		if (remaining)
-+			break;
++	maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff;
 +
-+		nbytes -= len;
-+		buf += len;
++	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
++			|| ep->index == 0
++			|| desc->bDescriptorType != USB_DT_ENDPOINT
++			|| maxpacket == 0
++			|| maxpacket > ep->fifo_size) {
++		DBG(DBG_ERR, "ep_enable: Invalid argument");
++		return -EINVAL;
 +	}
-+	mutex_unlock(&file->f_dentry->d_inode->i_mutex);
 +
-+	return actual;
-+}
++	ep->is_isoc = 0;
++	ep->is_in = 0;
 +
-+static int queue_dbg_release(struct inode *inode, struct file *file)
-+{
-+	struct list_head *queue_data = file->private_data;
-+	struct usba_request *req, *tmp_req;
++	if (maxpacket <= 8)
++		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
++	else
++		/* LSB is bit 1, not 0 */
++		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
 +
-+	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
-+		list_del(&req->queue);
-+		kfree(req);
++	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
++			ep->ep.name, ept_cfg, maxpacket);
++
++	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
++		ep->is_in = 1;
++		ept_cfg |= USBA_EPT_DIR_IN;
 +	}
-+	kfree(queue_data);
-+	return 0;
-+}
 +
-+static int regs_dbg_open(struct inode *inode, struct file *file)
-+{
-+	struct usba_udc *udc;
-+	unsigned int i;
-+	u32 *data;
-+	int ret = -ENOMEM;
++	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
++	case USB_ENDPOINT_XFER_CONTROL:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
++		break;
++	case USB_ENDPOINT_XFER_ISOC:
++		if (!ep->can_isoc) {
++			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
++					ep->ep.name);
++			return -EINVAL;
++		}
 +
-+	mutex_lock(&inode->i_mutex);
-+	udc = inode->i_private;
-+	data = kmalloc(inode->i_size, GFP_KERNEL);
-+	if (!data)
-+		goto out;
++		/*
++		 * Bits 11:12 specify number of _additional_
++		 * transactions per microframe.
++		 */
++		nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1;
++		if (nr_trans > 3)
++			return -EINVAL;
 +
-+	spin_lock_irq(&udc->lock);
-+	for (i = 0; i < inode->i_size / 4; i++)
-+		data[i] = __raw_readl(udc->regs + i * 4);
-+	spin_unlock_irq(&udc->lock);
++		ep->is_isoc = 1;
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
 +
-+	file->private_data = data;
-+	ret = 0;
++		/*
++		 * Do triple-buffering on high-bandwidth iso endpoints.
++		 */
++		if (nr_trans > 1 && ep->nr_banks == 3)
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
++		else
++			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
++		break;
++	case USB_ENDPOINT_XFER_BULK:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	case USB_ENDPOINT_XFER_INT:
++		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
++		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
++		break;
++	}
 +
-+out:
-+	mutex_unlock(&inode->i_mutex);
++	spin_lock_irqsave(&ep->udc->lock, flags);
 +
-+	return ret;
-+}
++	if (ep->desc) {
++		spin_unlock_irqrestore(&ep->udc->lock, flags);
++		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
++		return -EBUSY;
++	}
 +
-+static ssize_t regs_dbg_read(struct file *file, char __user *buf,
-+			     size_t nbytes, loff_t *ppos)
-+{
-+	struct inode *inode = file->f_dentry->d_inode;
-+	int ret;
++	ep->desc = desc;
++	ep->ep.maxpacket = maxpacket;
 +
-+	mutex_lock(&inode->i_mutex);
-+	ret = simple_read_from_buffer(buf, nbytes, ppos,
-+				       file->private_data,
-+				       file->f_dentry->d_inode->i_size);
-+	mutex_unlock(&inode->i_mutex);
++	usba_ep_writel(ep, CFG, ept_cfg);
++	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
 +
-+	return ret;
-+}
++	if (ep->can_dma) {
++		u32 ctrl;
 +
-+static int regs_dbg_release(struct inode *inode, struct file *file)
-+{
-+	kfree(file->private_data);
-+	return 0;
-+}
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)
++					| USBA_BF(DMA_INT, 1 << ep->index)));
++		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
++		usba_ep_writel(ep, CTL_ENB, ctrl);
++	} else {
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++					| USBA_BF(EPT_INT, 1 << ep->index)));
++	}
 +
-+const struct file_operations queue_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= queue_dbg_open,
-+	.llseek		= no_llseek,
-+	.read		= queue_dbg_read,
-+	.release	= queue_dbg_release,
-+};
++	spin_unlock_irqrestore(&udc->lock, flags);
 +
-+const struct file_operations regs_dbg_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= regs_dbg_open,
-+	.llseek		= generic_file_llseek,
-+	.read		= regs_dbg_read,
-+	.release	= regs_dbg_release,
-+};
++	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
++			(unsigned long)usba_ep_readl(ep, CFG));
++	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
++			(unsigned long)usba_readl(udc, INT_ENB));
 +
-+static void usba_ep_init_debugfs(struct usba_udc *udc,
-+				  struct usba_ep *ep)
++	return 0;
++}
++
++static int usba_ep_disable(struct usb_ep *_ep)
 +{
-+	struct dentry *ep_root;
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	LIST_HEAD(req_list);
++	unsigned long flags;
 +
-+	ep_root = debugfs_create_dir(ep_name(ep), udc->debugfs_root);
-+	if (!ep_root)
-+		goto err_root;
-+	ep->debugfs_dir = ep_root;
++	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
 +
-+	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
-+						ep, &queue_dbg_fops);
-+	if (!ep->debugfs_queue)
-+		goto err_queue;
++	spin_lock_irqsave(&udc->lock, flags);
 +
-+	if (ep_can_dma(ep)) {
-+		ep->debugfs_dma_status
-+			= debugfs_create_u32("dma_status", 0400, ep_root,
-+					     &ep->last_dma_status);
-+		if (!ep->debugfs_dma_status)
-+			goto err_dma_status;
++	if (!ep->desc) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name);
++		return -EINVAL;
 +	}
-+	if (ep_is_control(ep)) {
-+		ep->debugfs_state
-+			= debugfs_create_u32("state", 0400, ep_root,
-+					     &ep->state);
-+		if (!ep->debugfs_state)
-+			goto err_state;
++	ep->desc = NULL;
++
++	list_splice_init(&ep->queue, &req_list);
++	if (ep->can_dma) {
++		usba_dma_writel(ep, CONTROL, 0);
++		usba_dma_writel(ep, ADDRESS, 0);
++		usba_dma_readl(ep, STATUS);
 +	}
++	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
++	usba_writel(udc, INT_ENB,
++			usba_readl(udc, INT_ENB)
++			& ~USBA_BF(EPT_INT, 1 << ep->index));
 +
-+	return;
++	request_complete_list(ep, &req_list, -ESHUTDOWN);
 +
-+err_state:
-+	if (ep_can_dma(ep))
-+		debugfs_remove(ep->debugfs_dma_status);
-+err_dma_status:
-+	debugfs_remove(ep->debugfs_queue);
-+err_queue:
-+	debugfs_remove(ep_root);
-+err_root:
-+	dev_err(&ep->udc->pdev->dev,
-+		"failed to create debugfs directory for %s\n", ep_name(ep));
-+}
++	spin_unlock_irqrestore(&udc->lock, flags);
 +
-+static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
-+{
-+	debugfs_remove(ep->debugfs_queue);
-+	debugfs_remove(ep->debugfs_dma_status);
-+	debugfs_remove(ep->debugfs_state);
-+	debugfs_remove(ep->debugfs_dir);
-+	ep->debugfs_dma_status = NULL;
-+	ep->debugfs_dir = NULL;
++	return 0;
 +}
 +
-+static void usba_init_debugfs(struct usba_udc *udc)
++static struct usb_request *
++usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 +{
-+	struct dentry *root, *regs;
-+	struct resource *regs_resource;
++	struct usba_request *req;
 +
-+	root = debugfs_create_dir(udc->gadget.name, NULL);
-+	if (IS_ERR(root) || !root)
-+		goto err_root;
-+	udc->debugfs_root = root;
-+
-+	regs = debugfs_create_file("regs", 0400, root, udc, &regs_dbg_fops);
-+	if (!regs)
-+		goto err_regs;
-+
-+	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
-+					      CTRL_IOMEM_ID);
-+	regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1;
-+	udc->debugfs_regs = regs;
++	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
 +
-+	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
++	req = kzalloc(sizeof(*req), gfp_flags);
++	if (!req)
++		return NULL;
 +
-+	return;
++	INIT_LIST_HEAD(&req->queue);
++	req->req.dma = DMA_ADDR_INVALID;
 +
-+err_regs:
-+	debugfs_remove(root);
-+err_root:
-+	udc->debugfs_root = NULL;
-+	dev_err(&udc->pdev->dev, "debugfs is not available\n");
++	return &req->req;
 +}
 +
-+static void usba_cleanup_debugfs(struct usba_udc *udc)
-+{
-+	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
-+	debugfs_remove(udc->debugfs_regs);
-+	debugfs_remove(udc->debugfs_root);
-+	udc->debugfs_regs = NULL;
-+	udc->debugfs_root = NULL;
-+}
-+#else
-+static inline void usba_ep_init_debugfs(struct usba_udc *udc,
-+					 struct usba_ep *ep)
++static void
++usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
 +{
++	struct usba_request *req = to_usba_req(_req);
++
++	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
 +
++	kfree(req);
 +}
 +
-+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
++static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
++		struct usba_request *req, gfp_t gfp_flags)
 +{
++	unsigned long flags;
++	int ret;
 +
-+}
++	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
++		ep->ep.name, req->req.length, req->req.dma,
++		req->req.zero ? 'Z' : 'z',
++		req->req.short_not_ok ? 'S' : 's',
++		req->req.no_interrupt ? 'I' : 'i');
 +
-+static inline void usba_init_debugfs(struct usba_udc *udc)
-+{
++	if (req->req.length > 0x10000) {
++		/* Lengths from 0 to 65536 (inclusive) are supported */
++		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
++		return -EINVAL;
++	}
 +
-+}
++	req->using_dma = 1;
 +
-+static inline void usba_cleanup_debugfs(struct usba_udc *udc)
-+{
++	if (req->req.dma == DMA_ADDR_INVALID) {
++		req->req.dma = dma_map_single(
++			&udc->pdev->dev, req->req.buf, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 1;
++	} else {
++		dma_sync_single_for_device(
++			&udc->pdev->dev, req->req.dma, req->req.length,
++			ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++		req->mapped = 0;
++	}
 +
-+}
-+#endif
++	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
++			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
++			| USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
 +
-+static int vbus_is_present(struct usba_udc *udc)
-+{
-+	if (udc->vbus_pin != -1)
-+		return gpio_get_value(udc->vbus_pin);
++	if (ep->is_in)
++		req->ctrl |= USBA_DMA_END_BUF_EN;
 +
-+	/* No Vbus detection: Assume always present */
-+	return 1;
++	/*
++	 * Add this request to the queue and submit for DMA if
++	 * possible. Check if we're still alive first -- we may have
++	 * received a reset since last time we checked.
++	 */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		if (list_empty(&ep->queue))
++			submit_request(ep, req);
++
++		list_add_tail(&req->queue, &ep->queue);
++		ret = 0;
++	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
 +}
 +
-+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
++static int
++usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 +{
-+	unsigned long tmp;
++	struct usba_request *req = to_usba_req(_req);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	unsigned long flags;
++	int ret;
 +
-+	DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
-+	for (; len > 0; len -= 4, buf += 4, fifo += 4) {
-+		tmp = *(unsigned long *)buf;
-+		if (len >= 4) {
-+			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
-+			__raw_writel(tmp, fifo);
-+		} else {
-+			do {
-+				DBG(DBG_FIFO, "  -> %02lx\n", tmp >> 24);
-+				__raw_writeb(tmp >> 24, fifo);
-+				fifo++;
-+				tmp <<= 8;
-+			} while (--len);
-+			break;
-+		}
++	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
++			ep->ep.name, req, _req->length);
++
++	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
++		return -ESHUTDOWN;
++
++	req->submitted = 0;
++	req->using_dma = 0;
++	req->last_transaction = 0;
++
++	_req->status = -EINPROGRESS;
++	_req->actual = 0;
++
++	if (ep->can_dma)
++		return queue_dma(udc, ep, req, gfp_flags);
++
++	/* May have received a reset since last time we checked */
++	ret = -ESHUTDOWN;
++	spin_lock_irqsave(&udc->lock, flags);
++	if (ep->desc) {
++		list_add_tail(&req->queue, &ep->queue);
++
++		if (ep->is_in || (ep_is_control(ep)
++				&& (ep->state == DATA_STAGE_IN
++					|| ep->state == STATUS_STAGE_IN)))
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
++		else
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++		ret = 0;
 +	}
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
 +}
 +
-+static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
++static void
++usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
 +{
-+	union {
-+		unsigned long *w;
-+		unsigned char *b;
-+	} p;
-+	unsigned long tmp;
-+
-+	DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
-+	for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
-+		if (len >= 4) {
-+			tmp = __raw_readl(fifo);
-+			*p.w = tmp;
-+			DBG(DBG_FIFO, "  -> %08lx\n", tmp);
-+		} else {
-+			do {
-+				tmp = __raw_readb(fifo);
-+				*p.b = tmp;
-+				DBG(DBG_FIFO, " -> %02lx\n", tmp);
-+				fifo++, p.b++;
-+			} while (--len);
-+		}
-+	}
++	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
 +}
 +
-+static void next_fifo_transaction(struct usba_ep *ep,
-+				  struct usba_request *req)
++static int stop_dma(struct usba_ep *ep, u32 *pstatus)
 +{
-+	unsigned int transaction_len;
++	unsigned int timeout;
++	u32 status;
 +
-+	transaction_len = req->req.length - req->req.actual;
-+	req->last_transaction = 1;
-+	if (transaction_len > ep->ep.maxpacket) {
-+		transaction_len = ep->ep.maxpacket;
-+		req->last_transaction = 0;
-+	} else if (transaction_len == ep->ep.maxpacket
-+		   && req->req.zero) {
-+		req->last_transaction = 0;
++	/*
++	 * Stop the DMA controller. When writing both CH_EN
++	 * and LINK to 0, the other bits are not affected.
++	 */
++	usba_dma_writel(ep, CONTROL, 0);
++
++	/* Wait for the FIFO to empty */
++	for (timeout = 40; timeout; --timeout) {
++		status = usba_dma_readl(ep, STATUS);
++		if (!(status & USBA_DMA_CH_EN))
++			break;
++		udelay(1);
 +	}
-+	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
-+	    ep_name(ep), req, transaction_len,
-+	    req->last_transaction ? ", done" : "");
 +
-+	copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+	req->req.actual += transaction_len;
++	if (pstatus)
++		*pstatus = status;
++
++	if (timeout == 0) {
++		dev_err(&ep->udc->pdev->dev,
++			"%s: timed out waiting for DMA FIFO to empty\n",
++			ep->ep.name);
++		return -ETIMEDOUT;
++	}
++
++	return 0;
 +}
 +
-+static void submit_request(struct usba_ep *ep, struct usba_request *req)
++static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 +{
-+	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
-+	    ep_name(ep), req, req->req.length);
++	struct usba_ep *ep = to_usba_ep(_ep);
++	struct usba_udc *udc = ep->udc;
++	struct usba_request *req = to_usba_req(_req);
++	unsigned long flags;
++	u32 status;
 +
-+	req->req.actual = 0;
-+	req->submitted = 1;
++	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
++			ep->ep.name, req);
++
++	spin_lock_irqsave(&udc->lock, flags);
 +
 +	if (req->using_dma) {
-+		if (req->req.length == 0) {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
-+			return;
-+		}
++		/*
++		 * If this request is currently being transferred,
++		 * stop the DMA controller and reset the FIFO.
++		 */
++		if (ep->queue.next == &req->queue) {
++			status = usba_dma_readl(ep, STATUS);
++			if (status & USBA_DMA_CH_EN)
++				stop_dma(ep, &status);
 +
-+		if (req->req.zero)
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(SHORT_PACKET));
-+		else
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(SHORT_PACKET));
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++			ep->last_dma_status = status;
++#endif
 +
-+		usba_dma_writel(ep, ADDRESS, req->req.dma);
-+		usba_dma_writel(ep, CONTROL, req->ctrl);
-+	} else {
-+		next_fifo_transaction(ep, req);
-+		if (req->last_transaction) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
-+		} else {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
++			usba_writel(udc, EPT_RST, 1 << ep->index);
++
++			usba_update_req(ep, req, status);
 +		}
 +	}
-+}
 +
-+static void submit_next_request(struct usba_ep *ep)
-+{
-+	struct usba_request *req;
++	/*
++	 * Errors should stop the queue from advancing until the
++	 * completion function returns.
++	 */
++	list_del_init(&req->queue);
 +
-+	if (list_empty(&ep->queue)) {
-+		usba_ep_writel(ep, CTL_DIS, (USBA_BIT(TX_PK_RDY)
-+					      | USBA_BIT(RX_BK_RDY)));
-+		return;
-+	}
++	request_complete(ep, req, -ECONNRESET);
 +
-+	req = list_entry(ep->queue.next, struct usba_request, queue);
-+	if (!req->submitted)
-+		submit_request(ep, req);
-+}
++	/* Process the next request if any */
++	submit_next_request(ep);
++	spin_unlock_irqrestore(&udc->lock, flags);
 +
-+static void send_status(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	ep->state = STATUS_STAGE_IN;
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+	usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
++	return 0;
 +}
 +
-+static void receive_data(struct usba_ep *ep)
++static int usba_ep_set_halt(struct usb_ep *_ep, int value)
 +{
++	struct usba_ep *ep = to_usba_ep(_ep);
 +	struct usba_udc *udc = ep->udc;
-+	struct usba_request *req;
-+	unsigned long status;
-+	unsigned int bytecount, nr_busy;
-+	int is_complete = 0;
-+
-+	status = usba_ep_readl(ep, STA);
-+	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
-+
-+	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
-+
-+	while (nr_busy > 0) {
-+		if (list_empty(&ep->queue)) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			break;
-+		}
-+		req = list_entry(ep->queue.next,
-+				 struct usba_request, queue);
-+
-+		bytecount = USBA_BFEXT(BYTE_COUNT, status);
-+
-+		if (status & (1 << 31))
-+			is_complete = 1;
-+		if (req->req.actual + bytecount >= req->req.length) {
-+			is_complete = 1;
-+			bytecount = req->req.length - req->req.actual;
-+		}
-+
-+		copy_from_fifo(req->req.buf + req->req.actual,
-+			       ep->fifo, bytecount);
-+		req->req.actual += bytecount;
-+
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+
-+		if (is_complete) {
-+			DBG(DBG_QUEUE, "%s: request done\n", ep_name(ep));
-+			req->req.status = 0;
-+			list_del_init(&req->queue);
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			req->req.complete(&ep->ep, &req->req);
-+		}
++	unsigned long flags;
++	int ret = 0;
 +
-+		status = usba_ep_readl(ep, STA);
-+		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
++	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
++			value ? "set" : "clear");
 +
-+		if (is_complete && ep_is_control(ep)) {
-+			send_status(udc, ep);
-+			break;
-+		}
++	if (!ep->desc) {
++		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
++				ep->ep.name);
++		return -ENODEV;
++	}
++	if (ep->is_isoc) {
++		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
++				ep->ep.name);
++		return -ENOTTY;
 +	}
-+}
-+
-+static void request_complete(struct usba_ep *ep,
-+			     struct usba_request *req,
-+			     int status)
-+{
-+	struct usba_udc *udc = ep->udc;
-+
-+	WARN_ON(!list_empty(&req->queue));
 +
-+	if (req->req.status == -EINPROGRESS)
-+		req->req.status = status;
++	spin_lock_irqsave(&udc->lock, flags);
 +
-+	if (req->mapped) {
-+		dma_unmap_single(
-+			&udc->pdev->dev, req->req.dma, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->req.dma = DMA_ADDR_INVALID;
-+		req->mapped = 0;
++	/*
++	 * We can't halt IN endpoints while there are still data to be
++	 * transferred
++	 */
++	if (!list_empty(&ep->queue)
++			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
++					& USBA_BF(BUSY_BANKS, -1L))))) {
++		ret = -EAGAIN;
++	} else {
++		if (value)
++			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++		else
++			usba_ep_writel(ep, CLR_STA,
++					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
++		usba_ep_readl(ep, STA);
 +	}
 +
-+	DBG(DBG_GADGET | DBG_REQ,
-+	    "%s: req %p complete: status %d, actual %u\n",
-+	    ep_name(ep), req, req->req.status, req->req.actual);
-+	req->req.complete(&ep->ep, &req->req);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	return ret;
 +}
 +
-+static void request_complete_list(struct usba_ep *ep,
-+				  struct list_head *list,
-+				  int status)
++static int usba_ep_fifo_status(struct usb_ep *_ep)
 +{
-+	struct usba_request *req, *tmp_req;
++	struct usba_ep *ep = to_usba_ep(_ep);
 +
-+	list_for_each_entry_safe(req, tmp_req, list, queue) {
-+		list_del_init(&req->queue);
-+		request_complete(ep, req, status);
-+	}
++	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
 +}
 +
-+static int usba_ep_enable(struct usb_ep *_ep,
-+			   const struct usb_endpoint_descriptor *desc)
++static void usba_ep_fifo_flush(struct usb_ep *_ep)
 +{
 +	struct usba_ep *ep = to_usba_ep(_ep);
 +	struct usba_udc *udc = ep->udc;
-+	unsigned long flags, ept_cfg, maxpacket;
 +
-+	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep_name(ep), desc);
-+
-+	maxpacket = le16_to_cpu(desc->wMaxPacketSize);
++	usba_writel(udc, EPT_RST, 1 << ep->index);
++}
 +
-+	if (ep->index == 0
-+	    || desc->bDescriptorType != USB_DT_ENDPOINT
-+	    || ((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
-+		!= ep->index)
-+	    || maxpacket == 0
-+	    || maxpacket > ep->fifo_size) {
-+		DBG(DBG_ERR, "ep_enable: Invalid argument");
-+		return -EINVAL;
-+	}
++static const struct usb_ep_ops usba_ep_ops = {
++	.enable		= usba_ep_enable,
++	.disable	= usba_ep_disable,
++	.alloc_request	= usba_ep_alloc_request,
++	.free_request	= usba_ep_free_request,
++	.queue		= usba_ep_queue,
++	.dequeue	= usba_ep_dequeue,
++	.set_halt	= usba_ep_set_halt,
++	.fifo_status	= usba_ep_fifo_status,
++	.fifo_flush	= usba_ep_fifo_flush,
++};
 +
-+	ep->is_isoc = 0;
-+	ep->is_in = 0;
++static int usba_udc_get_frame(struct usb_gadget *gadget)
++{
++	struct usba_udc *udc = to_usba_udc(gadget);
 +
-+	if ((desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)
-+	    == USB_ENDPOINT_XFER_ISOC) {
-+		    if (!ep->can_isoc) {
-+			    DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
-+				ep_name(ep));
-+			    return -EINVAL;
-+		    }
-+		    ep->is_isoc = 1;
-+	}
++	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
++}
 +
-+	if (maxpacket <= 8)
-+		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
-+	else
-+		/* LSB is bit 1, not 0 */
-+		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
-+	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
-+	    ep_name(ep), ept_cfg, maxpacket);
++static const struct usb_gadget_ops usba_udc_ops = {
++	.get_frame	= usba_udc_get_frame,
++};
 +
-+	if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
-+		ep->is_in = 1;
-+		ept_cfg |= USBA_BIT(EPT_DIR);
-+	}
++#define EP(nam, idx, maxpkt, maxbk, dma, isoc)			\
++{								\
++	.ep	= {						\
++		.ops		= &usba_ep_ops,			\
++		.name		= nam,				\
++		.maxpacket	= maxpkt,			\
++	},							\
++	.udc		= &the_udc,				\
++	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
++	.fifo_size	= maxpkt,				\
++	.nr_banks	= maxbk,				\
++	.index		= idx,					\
++	.can_dma	= dma,					\
++	.can_isoc	= isoc,					\
++}
 +
-+	switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
-+	case USB_ENDPOINT_XFER_CONTROL:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
-+		break;
-+	case USB_ENDPOINT_XFER_ISOC:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
-+		break;
-+	case USB_ENDPOINT_XFER_BULK:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
-+		break;
-+	case USB_ENDPOINT_XFER_INT:
-+		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
-+		break;
-+	}
-+	ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
++static struct usba_ep usba_ep[] = {
++	EP("ep0", 0, 64, 1, 0, 0),
++	EP("ep1in-bulk", 1, 512, 2, 1, 1),
++	EP("ep2out-bulk", 2, 512, 2, 1, 1),
++	EP("ep3in-int", 3, 64, 3, 1, 0),
++	EP("ep4out-int", 4, 64, 3, 1, 0),
++	EP("ep5in-iso", 5, 1024, 3, 1, 1),
++	EP("ep6out-iso", 6, 1024, 3, 1, 1),
++};
++#undef EP
 +
-+	spin_lock_irqsave(&ep->udc->lock, flags);
++static struct usb_endpoint_descriptor usba_ep0_desc = {
++	.bLength = USB_DT_ENDPOINT_SIZE,
++	.bDescriptorType = USB_DT_ENDPOINT,
++	.bEndpointAddress = 0,
++	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
++	.wMaxPacketSize = __constant_cpu_to_le16(64),
++	/* FIXME: I have no idea what to put here */
++	.bInterval = 1,
++};
 +
-+	if (ep->desc) {
-+		spin_unlock_irqrestore(&ep->udc->lock, flags);
-+		DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
-+		return -EBUSY;
-+	}
++static void nop_release(struct device *dev)
++{
 +
-+	ep->desc = desc;
-+	ep->ep.maxpacket = maxpacket;
++}
 +
-+	usba_ep_writel(ep, CFG, ept_cfg);
-+	usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
++static struct usba_udc the_udc = {
++	.gadget	= {
++		.ops		= &usba_udc_ops,
++		.ep0		= &usba_ep[0].ep,
++		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
++		.is_dualspeed	= 1,
++		.name		= "atmel_usba_udc",
++		.dev	= {
++			.bus_id		= "gadget",
++			.release	= nop_release,
++		},
++	},
 +
-+	if (ep_can_dma(ep)) {
-+		u32 ctrl;
++	.lock	= SPIN_LOCK_UNLOCKED,
++};
 +
-+		usba_writel(udc, INT_ENB,
-+			     (usba_readl(udc, INT_ENB)
-+			      | USBA_BF(EPT_INT, 1 << ep->index)
-+			      | USBA_BF(DMA_INT, 1 << ep->index)));
-+		ctrl = USBA_BIT(AUTO_VALID) | USBA_BIT(INTDIS_DMA);
-+		usba_ep_writel(ep, CTL_ENB, ctrl);
-+	} else {
-+		usba_writel(udc, INT_ENB,
-+			     (usba_readl(udc, INT_ENB)
-+			      | USBA_BF(EPT_INT, 1 << ep->index)));
-+	}
++/*
++ * Called with interrupts disabled and udc->lock held.
++ */
++static void reset_all_endpoints(struct usba_udc *udc)
++{
++	struct usba_ep *ep;
++	struct usba_request *req, *tmp_req;
 +
-+	spin_unlock_irqrestore(&udc->lock, flags);
++	usba_writel(udc, EPT_RST, ~0UL);
 +
-+	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
-+	    (unsigned long)usba_ep_readl(ep, CFG));
-+	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
-+	    (unsigned long)usba_readl(udc, INT_ENB));
++	ep = to_usba_ep(udc->gadget.ep0);
++	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
++		list_del_init(&req->queue);
++		request_complete(ep, req, -ECONNRESET);
++	}
 +
-+	return 0;
++	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
++		if (ep->desc)
++			usba_ep_disable(&ep->ep);
++	}
 +}
 +
-+static int usba_ep_disable(struct usb_ep *_ep)
++static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
 +{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	LIST_HEAD(req_list);
-+	unsigned long flags;
-+
-+	DBG(DBG_GADGET, "ep_disable: %s\n", ep_name(ep));
++	struct usba_ep *ep;
 +
-+	spin_lock_irqsave(&udc->lock, flags);
++	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
++		return to_usba_ep(udc->gadget.ep0);
 +
-+	if (!ep->desc) {
-+		spin_unlock_irqrestore(&udc->lock, flags);
-+		DBG(DBG_ERR, "ep_disable: %s not enabled\n",
-+		    ep_name(ep));
-+		return -EINVAL;
-+	}
-+	ep->desc = NULL;
++	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
++		u8 bEndpointAddress;
 +
-+	list_splice_init(&ep->queue, &req_list);
-+	if (ep_can_dma(ep)) {
-+		usba_dma_writel(ep, CONTROL, 0);
-+		usba_dma_writel(ep, ADDRESS, 0);
-+		usba_dma_readl(ep, STATUS);
++		if (!ep->desc)
++			continue;
++		bEndpointAddress = ep->desc->bEndpointAddress;
++		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
++			continue;
++		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
++				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
++			return ep;
 +	}
-+	usba_ep_writel(ep, CTL_DIS, USBA_BIT(EPT_ENABLE));
-+	usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB)
-+				    & ~USBA_BF(EPT_INT, 1 << ep->index)));
 +
-+	spin_unlock_irqrestore(&udc->lock, flags);
++	return NULL;
++}
 +
-+	request_complete_list(ep, &req_list, -ESHUTDOWN);
++/* Called with interrupts disabled and udc->lock held */
++static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
++{
++	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
++	ep->state = WAIT_FOR_SETUP;
++}
 +
++static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++{
++	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
++		return 1;
 +	return 0;
 +}
 +
-+static struct usb_request *
-+usba_ep_alloc_request(struct usb_ep *_ep, unsigned gfp_flags)
++static inline void set_address(struct usba_udc *udc, unsigned int addr)
 +{
-+	struct usba_request *req;
++	u32 regval;
 +
-+	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
-+
-+	req = kzalloc(sizeof(*req), gfp_flags);
-+	if (!req)
-+		return NULL;
-+
-+	INIT_LIST_HEAD(&req->queue);
-+	req->req.dma = DMA_ADDR_INVALID;
-+
-+	return &req->req;
++	DBG(DBG_BUS, "setting address %u...\n", addr);
++	regval = usba_readl(udc, CTRL);
++	regval = USBA_BFINS(DEV_ADDR, addr, regval);
++	usba_writel(udc, CTRL, regval);
 +}
 +
-+static void
-+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
++static int do_test_mode(struct usba_udc *udc)
 +{
-+	struct usba_request *req = to_usba_req(_req);
-+
-+	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
++	static const char test_packet_buffer[] = {
++		/* JKJKJKJK * 9 */
++		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
++		/* JJKKJJKK * 8 */
++		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
++		/* JJKKJJKK * 8 */
++		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
++		/* JJJJJJJKKKKKKK * 8 */
++		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
++		/* JJJJJJJK * 8 */
++		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
++		/* {JKKKKKKK * 10}, JK */
++		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
++	};
++	struct usba_ep *ep;
++	struct device *dev = &udc->pdev->dev;
++	int test_mode;
 +
-+	kfree(req);
-+}
++	test_mode = udc->test_mode;
 +
-+static void *usba_ep_alloc_buffer(struct usb_ep *_ep, unsigned bytes,
-+				   dma_addr_t *dma, unsigned gfp_flags)
-+{
-+	void *buf;
++	/* Start from a clean slate */
++	reset_all_endpoints(udc);
 +
-+	if (bytes < L1_CACHE_BYTES)
-+		bytes = L1_CACHE_BYTES;
++	switch (test_mode) {
++	case 0x0100:
++		/* Test_J */
++		usba_writel(udc, TST, USBA_TST_J_MODE);
++		dev_info(dev, "Entering Test_J mode...\n");
++		break;
++	case 0x0200:
++		/* Test_K */
++		usba_writel(udc, TST, USBA_TST_K_MODE);
++		dev_info(dev, "Entering Test_K mode...\n");
++		break;
++	case 0x0300:
++		/*
++		 * Test_SE0_NAK: Force high-speed mode and set up ep0
++		 * for Bulk IN transfers
++		 */
++		ep = &usba_ep[0];
++		usba_writel(udc, TST,
++				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
++		}
++		break;
++	case 0x0400:
++		/* Test_Packet */
++		ep = &usba_ep[0];
++		usba_ep_writel(ep, CFG,
++				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
++				| USBA_EPT_DIR_IN
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
++				| USBA_BF(BK_NUMBER, 1));
++		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
++			set_protocol_stall(udc, ep);
++			dev_err(dev, "Test_Packet: ep0 not mapped\n");
++		} else {
++			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
++			usba_writel(udc, TST, USBA_TST_PKT_MODE);
++			copy_to_fifo(ep->fifo, test_packet_buffer,
++					sizeof(test_packet_buffer));
++			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++			dev_info(dev, "Entering Test_Packet mode...\n");
++		}
++		break;
++	default:
++		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
++		return -EINVAL;
++	}
 +
-+	buf = kmalloc(bytes, gfp_flags);
++	return 0;
++}
 +
-+	/*
-+	 * Seems like we have to map the buffer any chance we get.
-+	 * ether.c wants us to initialize the dma member of a
-+	 * different request than the one receiving the buffer, so one
-+	 * never knows...
-+	 *
-+	 * Ah, screw it.  The ether driver is probably wrong, and this
-+	 * is not the right place to do the mapping.  The driver
-+	 * shouldn't mess with our DMA mappings anyway.
-+	 */
-+	*dma = DMA_ADDR_INVALID;
++/* Avoid overly long expressions */
++static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
++		return true;
++	return false;
++}
 +
-+	return buf;
++static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++{
++	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
++		return true;
++	return false;
 +}
 +
-+static void usba_ep_free_buffer(struct usb_ep *_ep, void *buf,
-+				 dma_addr_t dma, unsigned bytes)
++static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
 +{
-+	DBG(DBG_GADGET, "ep_free_buffer: %s, buf %p (size %u)\n",
-+	    _ep->name, buf, bytes);
-+	kfree(buf);
++	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
++		return true;
++	return false;
 +}
 +
-+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
-+		     struct usba_request *req, gfp_t gfp_flags)
++static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
++		struct usb_ctrlrequest *crq)
 +{
-+	unsigned long flags;
-+	int ret;
++	int retval = 0;;
 +
-+	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
-+	    ep_name(ep), req->req.length, req->req.dma,
-+	    req->req.zero ? 'Z' : 'z',
-+	    req->req.short_not_ok ? 'S' : 's',
-+	    req->req.no_interrupt ? 'I' : 'i');
++	switch (crq->bRequest) {
++	case USB_REQ_GET_STATUS: {
++		u16 status;
 +
-+	if (req->req.length > 0x10000) {
-+		/* Lengths from 0 to 65536 (inclusive) are supported */
-+		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
-+		return -EINVAL;
-+	}
++		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
++			/* Self-powered, no remote wakeup */
++			status = __constant_cpu_to_le16(1 << 0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
++			status = __constant_cpu_to_le16(0);
++		} else if (crq->bRequestType
++				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
++			struct usba_ep *target;
 +
-+	req->using_dma = 1;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
 +
-+	if (req->req.dma == DMA_ADDR_INVALID) {
-+		req->req.dma = dma_map_single(
-+			&udc->pdev->dev, req->req.buf, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->mapped = 1;
-+	} else {
-+		dma_sync_single_for_device(
-+			&udc->pdev->dev, req->req.dma, req->req.length,
-+			ep_is_in(ep) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
-+		req->mapped = 0;
++			status = 0;
++			if (is_stalled(udc, target))
++				status |= __constant_cpu_to_le16(1);
++		} else
++			goto delegate;
++
++		/* Write directly to the FIFO. No queueing is done. */
++		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
++			goto stall;
++		ep->state = DATA_STAGE_IN;
++		__raw_writew(status, ep->fifo);
++		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
++		break;
 +	}
 +
-+	req->ctrl = (USBA_BF(DMA_BUF_LEN, req->req.length)
-+		     | USBA_BIT(DMA_CH_EN) | USBA_BIT(DMA_END_BUF_IE)
-+		     | USBA_BIT(DMA_END_TR_EN) | USBA_BIT(DMA_END_TR_IE));
++	case USB_REQ_CLEAR_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				/* Can't CLEAR_FEATURE TEST_MODE */
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
 +
-+	if (ep_is_in(ep))
-+		req->ctrl |= USBA_BIT(DMA_END_BUF_EN);
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
 +
-+	/*
-+	 * Add this request to the queue and submit for DMA if
-+	 * possible. Check if we're still alive first -- we may have
-+	 * received a reset since last time we checked.
-+	 */
-+	ret = -ESHUTDOWN;
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (ep->desc) {
-+		if (list_empty(&ep->queue))
-+			submit_request(ep, req);
++			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
++			if (target->index != 0)
++				usba_ep_writel(target, CLR_STA,
++						USBA_TOGGLE_CLR);
++		} else {
++			goto delegate;
++		}
 +
-+		list_add_tail(&req->queue, &ep->queue);
-+		ret = 0;
++		send_status(udc, ep);
++		break;
 +	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	return ret;
-+}
 +
-+static int usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
-+			  gfp_t gfp_flags)
-+{
-+	struct usba_request *req = to_usba_req(_req);
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	unsigned long flags;
-+	int ret;
++	case USB_REQ_SET_FEATURE: {
++		if (crq->bRequestType == USB_RECIP_DEVICE) {
++			if (feature_is_dev_test_mode(crq)) {
++				send_status(udc, ep);
++				ep->state = STATUS_STAGE_TEST;
++				udc->test_mode = le16_to_cpu(crq->wIndex);
++				return 0;
++			} else if (feature_is_dev_remote_wakeup(crq)) {
++				/* TODO: Handle REMOTE_WAKEUP */
++			} else {
++				goto stall;
++			}
++		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
++			struct usba_ep *target;
 +
-+	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ,
-+	    "%s: queue req %p, len %u\n", ep_name(ep), req, _req->length);
++			if (crq->wLength != __constant_cpu_to_le16(0)
++					|| !feature_is_ep_halt(crq))
++				goto stall;
 +
-+	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN
-+	    || !ep->desc)
-+		return -ESHUTDOWN;
++			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
++			if (!target)
++				goto stall;
 +
-+	req->submitted = 0;
-+	req->using_dma = 0;
-+	req->last_transaction = 0;
++			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
++		} else
++			goto delegate;
 +
-+	_req->status = -EINPROGRESS;
-+	_req->actual = 0;
++		send_status(udc, ep);
++		break;
++	}
 +
-+	if (ep_can_dma(ep))
-+		return queue_dma(udc, ep, req, gfp_flags);
++	case USB_REQ_SET_ADDRESS:
++		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
++			goto delegate;
 +
-+	/* May have received a reset since last time we checked */
-+	ret = -ESHUTDOWN;
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (ep->desc) {
-+		list_add_tail(&req->queue, &ep->queue);
++		set_address(udc, le16_to_cpu(crq->wValue));
++		send_status(udc, ep);
++		ep->state = STATUS_STAGE_ADDR;
++		break;
 +
-+		if (ep_is_in(ep)
-+		    || (ep_is_control(ep)
-+			&& (ep->state == DATA_STAGE_IN
-+			    || ep->state == STATUS_STAGE_IN)))
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_PK_RDY));
-+		else
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY));
-+		ret = 0;
++	default:
++delegate:
++		spin_unlock(&udc->lock);
++		retval = udc->driver->setup(&udc->gadget, crq);
++		spin_lock(&udc->lock);
 +	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
 +
-+	return ret;
-+}
++	return retval;
 +
-+static void usba_update_req(struct usba_ep *ep, struct usba_request *req,
-+			     u32 status)
-+{
-+	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
++stall:
++	printk(KERN_ERR
++		"udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
++		"halting endpoint...\n",
++		ep->ep.name, crq->bRequestType, crq->bRequest,
++		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
++		le16_to_cpu(crq->wLength));
++	set_protocol_stall(udc, ep);
++	return -1;
 +}
 +
-+static int stop_dma(struct usba_ep *ep, u32 *pstatus)
++static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
 +{
-+	unsigned int timeout;
-+	u32 status;
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
 +
-+	/*
-+	 * Stop the DMA controller. When writing both CH_EN
-+	 * and LINK to 0, the other bits are not affected.
-+	 */
-+	usba_dma_writel(ep, CONTROL, 0);
++restart:
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
 +
-+	/* Wait for the FIFO to empty */
-+	for (timeout = 40; timeout; --timeout) {
-+		status = usba_dma_readl(ep, STATUS);
-+		if (!(status & USBA_BIT(DMA_CH_EN)))
-+			break;
-+		udelay(1);
++	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
++			ep->ep.name, ep->state, epstatus, epctrl);
++
++	req = NULL;
++	if (!list_empty(&ep->queue))
++		req = list_entry(ep->queue.next,
++				 struct usba_request, queue);
++
++	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		if (req->submitted)
++			next_fifo_transaction(ep, req);
++		else
++			submit_request(ep, req);
++
++		if (req->last_transaction) {
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
++		}
++		goto restart;
 +	}
++	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
++		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
 +
-+	if (pstatus)
-+		*pstatus = status;
++		switch (ep->state) {
++		case DATA_STAGE_IN:
++			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = STATUS_STAGE_OUT;
++			break;
++		case STATUS_STAGE_ADDR:
++			/* Activate our new address */
++			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
++						| USBA_FADDR_EN));
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_IN:
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++				submit_next_request(ep);
++			}
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			break;
++		case STATUS_STAGE_TEST:
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
++			ep->state = WAIT_FOR_SETUP;
++			if (do_test_mode(udc))
++				set_protocol_stall(udc, ep);
++			break;
++		default:
++			printk(KERN_ERR
++				"udc: %s: TXCOMP: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
 +
-+	if (timeout == 0) {
-+		dev_err(&ep->udc->pdev->dev,
-+			"%s: timed out waiting for DMA FIFO to empty\n",
-+			ep_name(ep));
-+		return -ETIMEDOUT;
++		goto restart;
 +	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		switch (ep->state) {
++		case STATUS_STAGE_OUT:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
 +
-+	return 0;
-+}
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, 0);
++			}
++			ep->state = WAIT_FOR_SETUP;
++			break;
 +
-+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	struct usba_request *req = to_usba_req(_req);
-+	unsigned long flags;
-+	u32 status;
++		case DATA_STAGE_OUT:
++			receive_data(ep);
++			break;
 +
-+	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
-+	    ep_name(ep), req);
++		default:
++			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++			printk(KERN_ERR
++				"udc: %s: RXRDY: Invalid endpoint state %d, "
++				"halting endpoint...\n",
++				ep->ep.name, ep->state);
++			set_protocol_stall(udc, ep);
++			break;
++		}
 +
-+	spin_lock_irqsave(&udc->lock, flags);
++		goto restart;
++	}
++	if (epstatus & USBA_RX_SETUP) {
++		union {
++			struct usb_ctrlrequest crq;
++			unsigned long data[2];
++		} crq;
++		unsigned int pkt_len;
++		int ret;
 +
-+	if (req->using_dma) {
-+		/*
-+		 * If this request is currently being transferred,
-+		 * stop the DMA controller and reset the FIFO.
-+		 */
-+		if (ep->queue.next == &req->queue) {
-+			status = usba_dma_readl(ep, STATUS);
-+			if (status & USBA_BIT(DMA_CH_EN))
-+				stop_dma(ep, &status);
++		if (ep->state != WAIT_FOR_SETUP) {
++			/*
++			 * Didn't expect a SETUP packet at this
++			 * point. Clean up any pending requests (which
++			 * may be successful).
++			 */
++			int status = -EPROTO;
 +
-+#ifdef CONFIG_DEBUG_FS
-+			ep->last_dma_status = status;
-+#endif
++			/*
++			 * RXRDY and TXCOMP are dropped when SETUP
++			 * packets arrive.  Just pretend we received
++			 * the status packet.
++			 */
++			if (ep->state == STATUS_STAGE_OUT
++					|| ep->state == STATUS_STAGE_IN) {
++				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
++				status = 0;
++			}
 +
-+			usba_writel(udc, EPT_RST,
-+				     1 << ep_index(ep));
++			if (req) {
++				list_del_init(&req->queue);
++				request_complete(ep, req, status);
++			}
++		}
 +
-+			usba_update_req(ep, req, status);
++		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
++		if (pkt_len != sizeof(crq)) {
++			printk(KERN_WARNING "udc: Invalid packet length %u "
++				"(expected %lu)\n", pkt_len, sizeof(crq));
++			set_protocol_stall(udc, ep);
++			return;
 +		}
-+	}
 +
-+	/*
-+	 * Errors should stop the queue from advancing until the
-+	 * completion function returns.
-+	 */
-+	list_del_init(&req->queue);
-+	spin_unlock_irqrestore(&udc->lock, flags);
++		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
++		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
 +
-+	request_complete(ep, req, -ECONNRESET);
++		/* Free up one bank in the FIFO so that we can
++		 * generate or receive a reply right away. */
++		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
 +
-+	/* Process the next request if any */
-+	spin_lock_irqsave(&udc->lock, flags);
-+	submit_next_request(ep);
-+	spin_unlock_irqrestore(&udc->lock, flags);
++		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
++			ep->state, crq.crq.bRequestType,
++			crq.crq.bRequest); */
 +
-+	return 0;
++		if (crq.crq.bRequestType & USB_DIR_IN) {
++			/*
++			 * The USB 2.0 spec states that "if wLength is
++			 * zero, there is no data transfer phase."
++			 * However, testusb #14 seems to actually
++			 * expect a data phase even if wLength = 0...
++			 */
++			ep->state = DATA_STAGE_IN;
++		} else {
++			if (crq.crq.wLength != __constant_cpu_to_le16(0))
++				ep->state = DATA_STAGE_OUT;
++			else
++				ep->state = STATUS_STAGE_IN;
++		}
++
++		ret = -1;
++		if (ep->index == 0)
++			ret = handle_ep0_setup(udc, ep, &crq.crq);
++		else {
++			spin_unlock(&udc->lock);
++			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++			spin_lock(&udc->lock);
++		}
++
++		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
++			crq.crq.bRequestType, crq.crq.bRequest,
++			le16_to_cpu(crq.crq.wLength), ep->state, ret);
++
++		if (ret < 0) {
++			/* Let the host know that we failed */
++			set_protocol_stall(udc, ep);
++		}
++	}
 +}
 +
-+static int usba_ep_set_halt(struct usb_ep *_ep, int value)
++static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
 +{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+	unsigned long flags;
-+	int ret = 0;
++	struct usba_request *req;
++	u32 epstatus;
++	u32 epctrl;
 +
-+	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep_name(ep),
-+	    value ? "set" : "clear");
++	epstatus = usba_ep_readl(ep, STA);
++	epctrl = usba_ep_readl(ep, CTL);
 +
-+	if (!ep->desc) {
-+		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
-+		    ep_name(ep));
-+		return -ENODEV;
-+	}
-+	if (ep_is_isochronous(ep)) {
-+		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
-+		    ep_name(ep));
-+		return -ENOTTY;
-+	}
++	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
 +
-+	spin_lock_irqsave(&udc->lock, flags);
++	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
++		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
 +
-+	/*
-+	 * We can't halt IN endpoints while there are still data to be
-+	 * transferred
-+	 */
-+	if (!list_empty(&ep->queue)
-+	    || ((value && ep_is_in(ep)
-+		 && (usba_ep_readl(ep, STA)
-+		     & USBA_BF(BUSY_BANKS, -1L))))) {
-+		ret = -EAGAIN;
-+	} else {
-+		if (value)
-+			usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL));
-+		else
-+			usba_ep_writel(ep, CLR_STA, (USBA_BIT(FORCE_STALL)
-+						     | USBA_BIT(TOGGLE_SEQ)));
-+		usba_ep_readl(ep, STA);
-+	}
++		if (list_empty(&ep->queue)) {
++			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
++			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
++			return;
++		}
 +
-+	spin_unlock_irqrestore(&udc->lock, flags);
++		req = list_entry(ep->queue.next, struct usba_request, queue);
 +
-+	return ret;
-+}
++		if (req->using_dma) {
++			/* Send a zero-length packet */
++			usba_ep_writel(ep, SET_STA,
++					USBA_TX_PK_RDY);
++			usba_ep_writel(ep, CTL_DIS,
++					USBA_TX_PK_RDY);
++			list_del_init(&req->queue);
++			submit_next_request(ep);
++			request_complete(ep, req, 0);
++		} else {
++			if (req->submitted)
++				next_fifo_transaction(ep, req);
++			else
++				submit_request(ep, req);
 +
-+static int usba_ep_fifo_status(struct usb_ep *_ep)
-+{
-+	struct usba_ep *ep = to_usba_ep(_ep);
++			if (req->last_transaction) {
++				list_del_init(&req->queue);
++				submit_next_request(ep);
++				request_complete(ep, req, 0);
++			}
++		}
 +
-+	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
++		epstatus = usba_ep_readl(ep, STA);
++		epctrl = usba_ep_readl(ep, CTL);
++	}
++	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
++		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
++		receive_data(ep);
++		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
++	}
 +}
 +
-+static void usba_ep_fifo_flush(struct usb_ep *_ep)
++static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
 +{
-+	struct usba_ep *ep = to_usba_ep(_ep);
-+	struct usba_udc *udc = ep->udc;
-+
-+	usba_writel(udc, EPT_RST, 1 << ep->index);
-+}
++	struct usba_request *req;
++	u32 status, control, pending;
 +
-+struct usb_ep_ops usba_ep_ops = {
-+	.enable		= usba_ep_enable,
-+	.disable	= usba_ep_disable,
-+	.alloc_request	= usba_ep_alloc_request,
-+	.free_request	= usba_ep_free_request,
-+	.alloc_buffer	= usba_ep_alloc_buffer,
-+	.free_buffer	= usba_ep_free_buffer,
-+	.queue		= usba_ep_queue,
-+	.dequeue	= usba_ep_dequeue,
-+	.set_halt	= usba_ep_set_halt,
-+	.fifo_status	= usba_ep_fifo_status,
-+	.fifo_flush	= usba_ep_fifo_flush,
-+};
++	status = usba_dma_readl(ep, STATUS);
++	control = usba_dma_readl(ep, CONTROL);
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	ep->last_dma_status = status;
++#endif
++	pending = status & control;
++	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
 +
-+static int usba_udc_get_frame(struct usb_gadget *gadget)
-+{
-+	struct usba_udc *udc = to_usba_udc(gadget);
++	if (status & USBA_DMA_CH_EN) {
++		dev_err(&udc->pdev->dev,
++			"DMA_CH_EN is set after transfer is finished!\n");
++		dev_err(&udc->pdev->dev,
++			"status=%#08x, pending=%#08x, control=%#08x\n",
++			status, pending, control);
 +
-+	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
-+}
++		/*
++		 * try to pretend nothing happened. We might have to
++		 * do something here...
++		 */
++	}
 +
-+struct usb_gadget_ops usba_udc_ops = {
-+	.get_frame	= usba_udc_get_frame,
-+};
++	if (list_empty(&ep->queue))
++		/* Might happen if a reset comes along at the right moment */
++		return;
 +
-+#define EP(nam, type, idx, dma, isoc)				\
-+{								\
-+	.ep	= {						\
-+		.ops		= &usba_ep_ops,			\
-+		.name		= nam,				\
-+		.maxpacket	= type##_FIFO_SIZE,		\
-+	},							\
-+	.udc		= &the_udc,				\
-+	.queue		= LIST_HEAD_INIT(usba_ep[idx].queue),	\
-+	.fifo_size	= type##_FIFO_SIZE,			\
-+	.nr_banks	= type##_NR_BANKS,			\
-+	.index		= idx,					\
-+	.can_dma	= dma,					\
-+	.can_isoc	= isoc,					\
++	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
++		req = list_entry(ep->queue.next, struct usba_request, queue);
++		usba_update_req(ep, req, status);
++
++		list_del_init(&req->queue);
++		submit_next_request(ep);
++		request_complete(ep, req, 0);
++	}
 +}
 +
-+static struct usba_ep usba_ep[] = {
-+	EP("ep0", EP0, 0, 0, 0),
-+	EP("ep1in-bulk", BULK, 1, 1, 0),
-+	EP("ep2out-bulk", BULK, 2, 1, 0),
-+	EP("ep3in-iso", ISO, 3, 1, 1),
-+	EP("ep4out-iso", ISO, 4, 1, 1),
-+	EP("ep5in-int", INT, 5, 1, 0),
-+	EP("ep6out-int", INT, 6, 1, 0),
-+};
-+#undef EP
++static irqreturn_t usba_udc_irq(int irq, void *devid)
++{
++	struct usba_udc *udc = devid;
++	u32 status;
++	u32 dma_status;
++	u32 ep_status;
 +
-+static struct usb_endpoint_descriptor usba_ep0_desc = {
-+	.bLength = USB_DT_ENDPOINT_SIZE,
-+	.bDescriptorType = USB_DT_ENDPOINT,
-+	.bEndpointAddress = 0,
-+	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
-+	.wMaxPacketSize = __constant_cpu_to_le16(64),
-+	/* FIXME: I have no idea what to put here */
-+	.bInterval = 1,
-+};
++	spin_lock(&udc->lock);
 +
-+static void nop_release(struct device *dev)
-+{
++	status = usba_readl(udc, INT_STA);
++	DBG(DBG_INT, "irq, status=%#08x\n", status);
 +
-+}
++	if (status & USBA_DET_SUSPEND) {
++		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
++		DBG(DBG_BUS, "Suspend detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->suspend) {
++			spin_unlock(&udc->lock);
++			udc->driver->suspend(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
 +
-+static struct usba_udc the_udc = {
-+	.gadget	= {
-+		.ops		= &usba_udc_ops,
-+		.ep0		= &usba_ep[0].ep,
-+		.ep_list	= LIST_HEAD_INIT(the_udc.gadget.ep_list),
-+		.is_dualspeed	= 1,
-+		.name		= "atmel_usba_udc",
-+		.dev	= {
-+			.bus_id		= "gadget",
-+			.release	= nop_release,
-+		},
-+	},
++	if (status & USBA_WAKE_UP) {
++		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
++		DBG(DBG_BUS, "Wake Up CPU detected\n");
++	}
 +
-+	.lock	= SPIN_LOCK_UNLOCKED,
-+};
++	if (status & USBA_END_OF_RESUME) {
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
++		DBG(DBG_BUS, "Resume detected\n");
++		if (udc->gadget.speed != USB_SPEED_UNKNOWN
++				&& udc->driver && udc->driver->resume) {
++			spin_unlock(&udc->lock);
++			udc->driver->resume(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++	}
 +
-+/*
-+ * Called with interrupts disabled and udc->lock held.
-+ */
-+static void reset_all_endpoints(struct usba_udc *udc)
-+{
-+	struct usba_ep *ep;
-+	struct usba_request *req, *tmp_req;
++	dma_status = USBA_BFEXT(DMA_INT, status);
++	if (dma_status) {
++		int i;
 +
-+	usba_writel(udc, EPT_RST, ~0UL);
++		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
++			if (dma_status & (1 << i))
++				usba_dma_irq(udc, &usba_ep[i]);
++	}
 +
-+	ep = to_usba_ep(udc->gadget.ep0);
-+	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
-+		list_del_init(&req->queue);
-+		request_complete(ep, req, -ECONNRESET);
++	ep_status = USBA_BFEXT(EPT_INT, status);
++	if (ep_status) {
++		int i;
++
++		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
++			if (ep_status & (1 << i)) {
++				if (ep_is_control(&usba_ep[i]))
++					usba_control_irq(udc, &usba_ep[i]);
++				else
++					usba_ep_irq(udc, &usba_ep[i]);
++			}
 +	}
 +
-+	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
-+		if (ep->desc)
-+			usba_ep_disable(&ep->ep);
++	if (status & USBA_END_OF_RESET) {
++		struct usba_ep *ep0;
++
++		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
++		reset_all_endpoints(udc);
++
++		if (status & USBA_HIGH_SPEED) {
++			DBG(DBG_BUS, "High-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_HIGH;
++		} else {
++			DBG(DBG_BUS, "Full-speed bus reset detected\n");
++			udc->gadget.speed = USB_SPEED_FULL;
++		}
++
++		ep0 = &usba_ep[0];
++		ep0->desc = &usba_ep0_desc;
++		ep0->state = WAIT_FOR_SETUP;
++		usba_ep_writel(ep0, CFG,
++				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
++				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
++				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
++		usba_ep_writel(ep0, CTL_ENB,
++				USBA_EPT_ENABLE | USBA_RX_SETUP);
++		usba_writel(udc, INT_ENB,
++				(usba_readl(udc, INT_ENB)
++				| USBA_BF(EPT_INT, 1)
++				| USBA_DET_SUSPEND
++				| USBA_END_OF_RESUME));
++
++		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
++			dev_warn(&udc->pdev->dev,
++				 "WARNING: EP0 configuration is invalid!\n");
 +	}
++
++	spin_unlock(&udc->lock);
++
++	return IRQ_HANDLED;
 +}
 +
-+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
++static irqreturn_t usba_vbus_irq(int irq, void *devid)
 +{
-+	struct usba_ep *ep;
++	struct usba_udc *udc = devid;
++	int vbus;
 +
-+	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
-+		return to_usba_ep(udc->gadget.ep0);
++	/* debounce */
++	udelay(10);
 +
-+	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
-+		u8 bEndpointAddress;
++	spin_lock(&udc->lock);
 +
-+		if (!ep->desc)
-+			continue;
-+		bEndpointAddress = ep->desc->bEndpointAddress;
-+		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
-+			continue;
-+		if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
-+		    == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
-+			return ep;
++	/* May happen if Vbus pin toggles during probe() */
++	if (!udc->driver)
++		goto out;
++
++	vbus = gpio_get_value(udc->vbus_pin);
++	if (vbus != udc->vbus_prev) {
++		if (vbus) {
++			usba_writel(udc, CTRL, USBA_EN_USBA);
++			usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
++		} else {
++			udc->gadget.speed = USB_SPEED_UNKNOWN;
++			reset_all_endpoints(udc);
++			usba_writel(udc, CTRL, 0);
++			spin_unlock(&udc->lock);
++			udc->driver->disconnect(&udc->gadget);
++			spin_lock(&udc->lock);
++		}
++		udc->vbus_prev = vbus;
 +	}
 +
-+	return NULL;
-+}
++out:
++	spin_unlock(&udc->lock);
 +
-+/* Called with interrupts disabled and udc->lock held */
-+static inline void set_protocol_stall(struct usba_udc *udc,
-+				      struct usba_ep *ep)
-+{
-+	usba_ep_writel(ep, SET_STA, USBA_BIT(FORCE_STALL));
-+	ep->state = WAIT_FOR_SETUP;
++	return IRQ_HANDLED;
 +}
 +
-+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
++int usb_gadget_register_driver(struct usb_gadget_driver *driver)
 +{
-+	if (usba_ep_readl(ep, STA) & USBA_BIT(FORCE_STALL))
-+		return 1;
-+	return 0;
-+}
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
++	int ret;
 +
-+static inline void set_address(struct usba_udc *udc, unsigned int addr)
-+{
-+	u32 regval;
++	if (!udc->pdev)
++		return -ENODEV;
 +
-+	DBG(DBG_BUS, "setting address %u...\n", addr);
-+	regval = usba_readl(udc, CTRL);
-+	regval = USBA_BFINS(DEV_ADDR, addr, regval);
-+	usba_writel(udc, CTRL, regval);
-+}
++	spin_lock_irqsave(&udc->lock, flags);
++	if (udc->driver) {
++		spin_unlock_irqrestore(&udc->lock, flags);
++		return -EBUSY;
++	}
 +
-+static int do_test_mode(struct usba_udc *udc)
-+{
-+	static const char test_packet_buffer[] = {
-+		/* JKJKJKJK * 9 */
-+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-+		/* JJKKJJKK * 8 */
-+		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
-+		/* JJKKJJKK * 8 */
-+		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
-+		/* JJJJJJJKKKKKKK * 8 */
-+		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-+		/* JJJJJJJK * 8 */
-+		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
-+		/* {JKKKKKKK * 10}, JK */
-+		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
-+	};
-+	struct device *dev = &udc->pdev->dev;
-+	struct usba_ep *ep;
-+	int test_mode;
++	udc->driver = driver;
++	udc->gadget.dev.driver = &driver->driver;
++	spin_unlock_irqrestore(&udc->lock, flags);
 +
-+	test_mode = udc->test_mode;
++	clk_enable(udc->pclk);
++	clk_enable(udc->hclk);
 +
-+	/* Start from a clean slate */
-+	reset_all_endpoints(udc);
++	ret = driver->bind(&udc->gadget);
++	if (ret) {
++		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
++			driver->driver.name, ret);
++		goto err_driver_bind;
++	}
 +
-+	switch (test_mode) {
-+	case 0x0100:
-+		/* Test_J */
-+		usba_writel(udc, TST, USBA_BIT(TST_J_MODE));
-+		dev_info(dev, "Entering Test_J mode...\n");
-+		break;
-+	case 0x0200:
-+		/* Test_K */
-+		usba_writel(udc, TST, USBA_BIT(TST_K_MODE));
-+		dev_info(dev, "Entering Test_K mode...\n");
-+		break;
-+	case 0x0300:
-+		/*
-+		 * Test_SE0_NAK: Force high-speed mode and set up ep0
-+		 * for Bulk IN transfers
-+		 */
-+		ep = &usba_ep[0];
-+		usba_writel(udc, TST,
-+			     USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
-+		usba_ep_writel(ep, CFG,
-+				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
-+				| USBA_BIT(EPT_DIR)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
-+				| USBA_BF(BK_NUMBER, 1));
-+		if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) {
-+			set_protocol_stall(udc, ep);
-+			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
-+		} else {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
-+			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
-+		}
-+		break;
-+	case 0x0400:
-+		/* Test_Packet */
-+		ep = &usba_ep[0];
-+		usba_ep_writel(ep, CFG,
-+				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
-+				| USBA_BIT(EPT_DIR)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
-+				| USBA_BF(BK_NUMBER, 1));
-+		if (!(usba_ep_readl(ep, CFG) & USBA_BIT(EPT_MAPPED))) {
-+			set_protocol_stall(udc, ep);
-+			dev_err(dev, "Test_Packet: ep0 not mapped\n");
-+		} else {
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(EPT_ENABLE));
-+			usba_writel(udc, TST, USBA_BIT(TST_PKT_MODE));
-+			copy_to_fifo(ep->fifo, test_packet_buffer,
-+				     sizeof(test_packet_buffer));
-+			usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+			dev_info(dev, "Entering Test_Packet mode...\n");
-+		}
-+		break;
-+	default:
-+		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
-+		return -EINVAL;
++	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++
++	udc->vbus_prev = 0;
++	if (udc->vbus_pin != -1)
++		enable_irq(gpio_to_irq(udc->vbus_pin));
++
++	/* If Vbus is present, enable the controller and wait for reset */
++	spin_lock_irqsave(&udc->lock, flags);
++	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
++		usba_writel(udc, CTRL, USBA_EN_USBA);
++		usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
 +	}
++	spin_unlock_irqrestore(&udc->lock, flags);
 +
 +	return 0;
-+}
 +
-+/* Avoid overly long expressions */
-+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
-+{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
-+		return true;
-+	return false;
++err_driver_bind:
++	udc->driver = NULL;
++	udc->gadget.dev.driver = NULL;
++	return ret;
 +}
++EXPORT_SYMBOL(usb_gadget_register_driver);
 +
-+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
 +{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE))
-+		return true;
-+	return false;
-+}
++	struct usba_udc *udc = &the_udc;
++	unsigned long flags;
 +
-+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
-+{
-+	if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT))
-+		return true;
-+	return false;
++	if (!udc->pdev)
++		return -ENODEV;
++	if (driver != udc->driver)
++		return -EINVAL;
++
++	if (udc->vbus_pin != -1)
++		disable_irq(gpio_to_irq(udc->vbus_pin));
++
++	spin_lock_irqsave(&udc->lock, flags);
++	udc->gadget.speed = USB_SPEED_UNKNOWN;
++	reset_all_endpoints(udc);
++	spin_unlock_irqrestore(&udc->lock, flags);
++
++	/* This will also disable the DP pullup */
++	usba_writel(udc, CTRL, 0);
++
++	driver->unbind(&udc->gadget);
++	udc->gadget.dev.driver = NULL;
++	udc->driver = NULL;
++
++	clk_disable(udc->hclk);
++	clk_disable(udc->pclk);
++
++	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++
++	return 0;
 +}
++EXPORT_SYMBOL(usb_gadget_unregister_driver);
 +
-+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
-+			    struct usb_ctrlrequest *crq)
++static int __init usba_udc_probe(struct platform_device *pdev)
 +{
-+	switch (crq->bRequest) {
-+	case USB_REQ_GET_STATUS: {
-+		u16 status;
-+
-+		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
-+			/* Self-powered, no remote wakeup */
-+			status = __constant_cpu_to_le16(1 << 0);
-+		} else if (crq->bRequestType
-+			   == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
-+			status = __constant_cpu_to_le16(0);
-+		} else if (crq->bRequestType
-+			   == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
-+			struct usba_ep *target;
++	struct usba_platform_data *pdata = pdev->dev.platform_data;
++	struct resource *regs, *fifo;
++	struct clk *pclk, *hclk;
++	struct usba_udc *udc = &the_udc;
++	int irq, ret, i;
 +
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
++	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
++	if (!regs || !fifo)
++		return -ENXIO;
 +
-+			status = 0;
-+			if (is_stalled(udc, target))
-+				status |= __constant_cpu_to_le16(1);
-+		} else {
-+			goto delegate;
-+		}
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
 +
-+		/* Write directly to the FIFO. No queueing is done. */
-+		if (crq->wLength != __constant_cpu_to_le16(sizeof(status)))
-+			goto stall;
-+		ep->state = DATA_STAGE_IN;
-+		__raw_writew(status, ep->fifo);
-+		usba_ep_writel(ep, SET_STA, USBA_BIT(TX_PK_RDY));
-+		break;
++	pclk = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(pclk))
++		return PTR_ERR(pclk);
++	hclk = clk_get(&pdev->dev, "hclk");
++	if (IS_ERR(hclk)) {
++		ret = PTR_ERR(hclk);
++		goto err_get_hclk;
 +	}
 +
-+	case USB_REQ_CLEAR_FEATURE: {
-+		if (crq->bRequestType == USB_RECIP_DEVICE) {
-+			if (feature_is_dev_remote_wakeup(crq)) {
-+				/* TODO: Handle REMOTE_WAKEUP */
-+			} else {
-+				/* Can't CLEAR_FEATURE TEST_MODE */
-+				goto stall;
-+			}
-+		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
-+			struct usba_ep *target;
++	udc->pdev = pdev;
++	udc->pclk = pclk;
++	udc->hclk = hclk;
++	udc->vbus_pin = -1;
 +
-+			if (!feature_is_ep_halt(crq)
-+			    || crq->wLength != __constant_cpu_to_le16(0))
-+				goto stall;
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
++	ret = -ENOMEM;
++	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!udc->regs) {
++		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
++		goto err_map_regs;
++	}
++	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
++		 (unsigned long)regs->start, udc->regs);
++	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
++	if (!udc->fifo) {
++		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
++		goto err_map_fifo;
++	}
++	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
++		 (unsigned long)fifo->start, udc->fifo);
 +
-+			usba_ep_writel(target, CLR_STA,
-+				       (USBA_BIT(FORCE_STALL)
-+					| USBA_BIT(TOGGLE_SEQ)));
-+		} else {
-+			goto delegate;
-+		}
++	device_initialize(&udc->gadget.dev);
++	udc->gadget.dev.parent = &pdev->dev;
++	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
 +
-+		send_status(udc, ep);
-+		break;
-+	}
++	platform_set_drvdata(pdev, udc);
 +
-+	case USB_REQ_SET_FEATURE: {
-+		if (crq->bRequestType == USB_RECIP_DEVICE) {
-+			if (feature_is_dev_test_mode(crq)) {
-+				send_status(udc, ep);
-+				ep->state = STATUS_STAGE_TEST;
-+				udc->test_mode = le16_to_cpu(crq->wIndex);
-+				return 0;
-+			} else if (feature_is_dev_remote_wakeup(crq)) {
-+				/* TODO: Handle REMOTE_WAKEUP */
-+			} else {
-+				goto stall;
-+			}
-+		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
-+			struct usba_ep *target;
++	/* Make sure we start from a clean slate */
++	clk_enable(pclk);
++	usba_writel(udc, CTRL, 0);
++	clk_disable(pclk);
 +
-+			if (!feature_is_ep_halt(crq)
-+			    || crq->wLength != __constant_cpu_to_le16(0))
-+				goto stall;
++	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
++	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
++	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
++	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
++		struct usba_ep *ep = &usba_ep[i];
 +
-+			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
-+			if (!target)
-+				goto stall;
++		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
++		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
++		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
 +
-+			usba_ep_writel(target, SET_STA, USBA_BIT(FORCE_STALL));
-+		} else
-+			goto delegate;
++		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
++	}
 +
-+		send_status(udc, ep);
-+		break;
++	ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
++	if (ret) {
++		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
++			irq, ret);
++		goto err_request_irq;
 +	}
++	udc->irq = irq;
 +
-+	case USB_REQ_SET_ADDRESS:
-+		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
-+			goto delegate;
++	ret = device_add(&udc->gadget.dev);
++	if (ret) {
++		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
++		goto err_device_add;
++	}
 +
-+		set_address(udc, le16_to_cpu(crq->wValue));
-+		send_status(udc, ep);
-+		ep->state = STATUS_STAGE_ADDR;
-+		break;
++	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
++		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
++			udc->vbus_pin = pdata->vbus_pin;
 +
-+	default:
-+delegate:
-+		return udc->driver->setup(&udc->gadget, crq);
++			ret = request_irq(gpio_to_irq(udc->vbus_pin),
++					usba_vbus_irq, 0,
++					"atmel_usba_udc", udc);
++			if (ret) {
++				gpio_free(udc->vbus_pin);
++				udc->vbus_pin = -1;
++				dev_warn(&udc->pdev->dev,
++					 "failed to request vbus irq; "
++					 "assuming always on\n");
++			} else {
++				disable_irq(gpio_to_irq(udc->vbus_pin));
++			}
++		}
 +	}
 +
++	usba_init_debugfs(udc);
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_init_debugfs(udc, &usba_ep[i]);
++
 +	return 0;
 +
-+stall:
-+	printk(KERN_ERR
-+	       "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
-+	       "halting endpoint...\n",
-+	       ep_name(ep), crq->bRequestType, crq->bRequest,
-+	       le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
-+	       le16_to_cpu(crq->wLength));
-+	set_protocol_stall(udc, ep);
-+	return -1;
-+}
++err_device_add:
++	free_irq(irq, udc);
++err_request_irq:
++	iounmap(udc->fifo);
++err_map_fifo:
++	iounmap(udc->regs);
++err_map_regs:
++	clk_put(hclk);
++err_get_hclk:
++	clk_put(pclk);
++
++	platform_set_drvdata(pdev, NULL);
++
++	return ret;
++}
++
++static int __exit usba_udc_remove(struct platform_device *pdev)
++{
++	struct usba_udc *udc;
++	int i;
++
++	udc = platform_get_drvdata(pdev);
++
++	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
++		usba_ep_cleanup_debugfs(&usba_ep[i]);
++	usba_cleanup_debugfs(udc);
++
++	if (udc->vbus_pin != -1)
++		gpio_free(udc->vbus_pin);
++
++	free_irq(udc->irq, udc);
++	iounmap(udc->fifo);
++	iounmap(udc->regs);
++	clk_put(udc->hclk);
++	clk_put(udc->pclk);
++
++	device_unregister(&udc->gadget.dev);
++
++	return 0;
++}
++
++static struct platform_driver udc_driver = {
++	.remove		= __exit_p(usba_udc_remove),
++	.driver		= {
++		.name		= "atmel_usba_udc",
++	},
++};
++
++static int __init udc_init(void)
++{
++	return platform_driver_probe(&udc_driver, usba_udc_probe);
++}
++module_init(udc_init);
++
++static void __exit udc_exit(void)
++{
++	platform_driver_unregister(&udc_driver);
++}
++module_exit(udc_exit);
++
++MODULE_DESCRIPTION("Atmel USBA UDC driver");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h
+new file mode 100644
+index 0000000..f4f0f8b
+--- /dev/null
++++ b/drivers/usb/gadget/atmel_usba_udc.h
+@@ -0,0 +1,350 @@
++/*
++ * Driver for the Atmel USBA high speed USB device controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
++#define __LINUX_USB_GADGET_USBA_UDC_H__
++
++/* USB register offsets */
++#define USBA_CTRL				0x0000
++#define USBA_FNUM				0x0004
++#define USBA_INT_ENB				0x0010
++#define USBA_INT_STA				0x0014
++#define USBA_INT_CLR				0x0018
++#define USBA_EPT_RST				0x001c
++#define USBA_TST				0x00e0
++
++/* USB endpoint register offsets */
++#define USBA_EPT_CFG				0x0000
++#define USBA_EPT_CTL_ENB			0x0004
++#define USBA_EPT_CTL_DIS			0x0008
++#define USBA_EPT_CTL				0x000c
++#define USBA_EPT_SET_STA			0x0014
++#define USBA_EPT_CLR_STA			0x0018
++#define USBA_EPT_STA				0x001c
++
++/* USB DMA register offsets */
++#define USBA_DMA_NXT_DSC			0x0000
++#define USBA_DMA_ADDRESS			0x0004
++#define USBA_DMA_CONTROL			0x0008
++#define USBA_DMA_STATUS				0x000c
++
++/* Bitfields in CTRL */
++#define USBA_DEV_ADDR_OFFSET			0
++#define USBA_DEV_ADDR_SIZE			7
++#define USBA_FADDR_EN				(1 <<  7)
++#define USBA_EN_USBA				(1 <<  8)
++#define USBA_DETACH				(1 <<  9)
++#define USBA_REMOTE_WAKE_UP			(1 << 10)
++
++/* Bitfields in FNUM */
++#define USBA_MICRO_FRAME_NUM_OFFSET		0
++#define USBA_MICRO_FRAME_NUM_SIZE		3
++#define USBA_FRAME_NUMBER_OFFSET		3
++#define USBA_FRAME_NUMBER_SIZE			11
++#define USBA_FRAME_NUM_ERROR			(1 << 31)
++
++/* Bitfields in INT_ENB/INT_STA/INT_CLR */
++#define USBA_HIGH_SPEED				(1 <<  0)
++#define USBA_DET_SUSPEND			(1 <<  1)
++#define USBA_MICRO_SOF				(1 <<  2)
++#define USBA_SOF				(1 <<  3)
++#define USBA_END_OF_RESET			(1 <<  4)
++#define USBA_WAKE_UP				(1 <<  5)
++#define USBA_END_OF_RESUME			(1 <<  6)
++#define USBA_UPSTREAM_RESUME			(1 <<  7)
++#define USBA_EPT_INT_OFFSET			8
++#define USBA_EPT_INT_SIZE			16
++#define USBA_DMA_INT_OFFSET			24
++#define USBA_DMA_INT_SIZE			8
++
++/* Bitfields in EPT_RST */
++#define USBA_RST_OFFSET				0
++#define USBA_RST_SIZE				16
++
++/* Bitfields in USBA_TST */
++#define USBA_SPEED_CFG_OFFSET			0
++#define USBA_SPEED_CFG_SIZE			2
++#define USBA_TST_J_MODE				(1 <<  2)
++#define USBA_TST_K_MODE				(1 <<  3)
++#define USBA_TST_PKT_MODE			(1 <<  4)
++#define USBA_OPMODE2				(1 <<  5)
++
++/* Bitfields in EPT_CFG */
++#define USBA_EPT_SIZE_OFFSET			0
++#define USBA_EPT_SIZE_SIZE			3
++#define USBA_EPT_DIR_IN				(1 <<  3)
++#define USBA_EPT_TYPE_OFFSET			4
++#define USBA_EPT_TYPE_SIZE			2
++#define USBA_BK_NUMBER_OFFSET			6
++#define USBA_BK_NUMBER_SIZE			2
++#define USBA_NB_TRANS_OFFSET			8
++#define USBA_NB_TRANS_SIZE			2
++#define USBA_EPT_MAPPED				(1 << 31)
++
++/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
++#define USBA_EPT_ENABLE				(1 <<  0)
++#define USBA_AUTO_VALID				(1 <<  1)
++#define USBA_INTDIS_DMA				(1 <<  3)
++#define USBA_NYET_DIS				(1 <<  4)
++#define USBA_DATAX_RX				(1 <<  6)
++#define USBA_MDATA_RX				(1 <<  7)
++/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
++#define USBA_BUSY_BANK_IE			(1 << 18)
++
++/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
++#define USBA_FORCE_STALL			(1 <<  5)
++#define USBA_TOGGLE_CLR				(1 <<  6)
++#define USBA_TOGGLE_SEQ_OFFSET			6
++#define USBA_TOGGLE_SEQ_SIZE			2
++#define USBA_ERR_OVFLW				(1 <<  8)
++#define USBA_RX_BK_RDY				(1 <<  9)
++#define USBA_KILL_BANK				(1 <<  9)
++#define USBA_TX_COMPLETE			(1 << 10)
++#define USBA_TX_PK_RDY				(1 << 11)
++#define USBA_ISO_ERR_TRANS			(1 << 11)
++#define USBA_RX_SETUP				(1 << 12)
++#define USBA_ISO_ERR_FLOW			(1 << 12)
++#define USBA_STALL_SENT				(1 << 13)
++#define USBA_ISO_ERR_CRC			(1 << 13)
++#define USBA_ISO_ERR_NBTRANS			(1 << 13)
++#define USBA_NAK_IN				(1 << 14)
++#define USBA_ISO_ERR_FLUSH			(1 << 14)
++#define USBA_NAK_OUT				(1 << 15)
++#define USBA_CURRENT_BANK_OFFSET		16
++#define USBA_CURRENT_BANK_SIZE			2
++#define USBA_BUSY_BANKS_OFFSET			18
++#define USBA_BUSY_BANKS_SIZE			2
++#define USBA_BYTE_COUNT_OFFSET			20
++#define USBA_BYTE_COUNT_SIZE			11
++#define USBA_SHORT_PACKET			(1 << 31)
++
++/* Bitfields in DMA_CONTROL */
++#define USBA_DMA_CH_EN				(1 <<  0)
++#define USBA_DMA_LINK				(1 <<  1)
++#define USBA_DMA_END_TR_EN			(1 <<  2)
++#define USBA_DMA_END_BUF_EN			(1 <<  3)
++#define USBA_DMA_END_TR_IE			(1 <<  4)
++#define USBA_DMA_END_BUF_IE			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_IE			(1 <<  6)
++#define USBA_DMA_BURST_LOCK			(1 <<  7)
++#define USBA_DMA_BUF_LEN_OFFSET			16
++#define USBA_DMA_BUF_LEN_SIZE			16
++
++/* Bitfields in DMA_STATUS */
++#define USBA_DMA_CH_ACTIVE			(1 <<  1)
++#define USBA_DMA_END_TR_ST			(1 <<  4)
++#define USBA_DMA_END_BUF_ST			(1 <<  5)
++#define USBA_DMA_DESC_LOAD_ST			(1 <<  6)
++
++/* Constants for SPEED_CFG */
++#define USBA_SPEED_CFG_NORMAL			0
++#define USBA_SPEED_CFG_FORCE_HIGH		2
++#define USBA_SPEED_CFG_FORCE_FULL		3
++
++/* Constants for EPT_SIZE */
++#define USBA_EPT_SIZE_8				0
++#define USBA_EPT_SIZE_16			1
++#define USBA_EPT_SIZE_32			2
++#define USBA_EPT_SIZE_64			3
++#define USBA_EPT_SIZE_128			4
++#define USBA_EPT_SIZE_256			5
++#define USBA_EPT_SIZE_512			6
++#define USBA_EPT_SIZE_1024			7
++
++/* Constants for EPT_TYPE */
++#define USBA_EPT_TYPE_CONTROL			0
++#define USBA_EPT_TYPE_ISO			1
++#define USBA_EPT_TYPE_BULK			2
++#define USBA_EPT_TYPE_INT			3
++
++/* Constants for BK_NUMBER */
++#define USBA_BK_NUMBER_ZERO			0
++#define USBA_BK_NUMBER_ONE			1
++#define USBA_BK_NUMBER_DOUBLE			2
++#define USBA_BK_NUMBER_TRIPLE			3
++
++/* Bit manipulation macros */
++#define USBA_BF(name, value)					\
++	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
++	 << USBA_##name##_OFFSET)
++#define USBA_BFEXT(name, value)					\
++	(((value) >> USBA_##name##_OFFSET)			\
++	 & ((1 << USBA_##name##_SIZE) - 1))
++#define USBA_BFINS(name, value, old)				\
++	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
++		    << USBA_##name##_OFFSET))			\
++	 | USBA_BF(name, value))
++
++/* Register access macros */
++#define usba_readl(udc, reg)					\
++	__raw_readl((udc)->regs + USBA_##reg)
++#define usba_writel(udc, reg, value)				\
++	__raw_writel((value), (udc)->regs + USBA_##reg)
++#define usba_ep_readl(ep, reg)					\
++	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
++#define usba_ep_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
++#define usba_dma_readl(ep, reg)					\
++	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
++#define usba_dma_writel(ep, reg, value)				\
++	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++
++/* Calculate base address for a given endpoint or DMA controller */
++#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
++#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
++#define USBA_FIFO_BASE(x)	((x) << 16)
++
++/* Synth parameters */
++#define USBA_NR_ENDPOINTS	7
++
++#define EP0_FIFO_SIZE		64
++#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
++#define EP0_NR_BANKS		1
++
++/*
++ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to
++ * provide this information?
++ */
++#define DMA_ADDR_INVALID (~(dma_addr_t)0)
++
++#define FIFO_IOMEM_ID	0
++#define CTRL_IOMEM_ID	1
++
++#ifdef DEBUG
++#define DBG_ERR		0x0001	/* report all error returns */
++#define DBG_HW		0x0002	/* debug hardware initialization */
++#define DBG_GADGET	0x0004	/* calls to/from gadget driver */
++#define DBG_INT		0x0008	/* interrupts */
++#define DBG_BUS		0x0010	/* report changes in bus state */
++#define DBG_QUEUE	0x0020  /* debug request queue processing */
++#define DBG_FIFO	0x0040  /* debug FIFO contents */
++#define DBG_DMA		0x0080  /* debug DMA handling */
++#define DBG_REQ		0x0100	/* print out queued request length */
++#define DBG_ALL		0xffff
++#define DBG_NONE	0x0000
++
++#define DEBUG_LEVEL	(DBG_ERR)
++#define DBG(level, fmt, ...)					\
++	do {							\
++		if ((level) & DEBUG_LEVEL)			\
++			printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__);	\
++	} while (0)
++#else
++#define DBG(level, fmt...)
++#endif
++
++enum usba_ctrl_state {
++	WAIT_FOR_SETUP,
++	DATA_STAGE_IN,
++	DATA_STAGE_OUT,
++	STATUS_STAGE_IN,
++	STATUS_STAGE_OUT,
++	STATUS_STAGE_ADDR,
++	STATUS_STAGE_TEST,
++};
++/*
++  EP_STATE_IDLE,
++  EP_STATE_SETUP,
++  EP_STATE_IN_DATA,
++  EP_STATE_OUT_DATA,
++  EP_STATE_SET_ADDR_STATUS,
++  EP_STATE_RX_STATUS,
++  EP_STATE_TX_STATUS,
++  EP_STATE_HALT,
++*/
++
++struct usba_dma_desc {
++	dma_addr_t next;
++	dma_addr_t addr;
++	u32 ctrl;
++};
++
++struct usba_ep {
++	int					state;
++	void __iomem				*ep_regs;
++	void __iomem				*dma_regs;
++	void __iomem				*fifo;
++	struct usb_ep				ep;
++	struct usba_udc				*udc;
++
++	struct list_head			queue;
++	const struct usb_endpoint_descriptor	*desc;
++
++	u16					fifo_size;
++	u8					nr_banks;
++	u8					index;
++	unsigned int				can_dma:1;
++	unsigned int				can_isoc:1;
++	unsigned int				is_isoc:1;
++	unsigned int				is_in:1;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	u32					last_dma_status;
++	struct dentry				*debugfs_dir;
++	struct dentry				*debugfs_queue;
++	struct dentry				*debugfs_dma_status;
++	struct dentry				*debugfs_state;
++#endif
++};
++
++struct usba_request {
++	struct usb_request			req;
++	struct list_head			queue;
++
++	u32					ctrl;
++
++	unsigned int				submitted:1;
++	unsigned int				last_transaction:1;
++	unsigned int				using_dma:1;
++	unsigned int				mapped:1;
++};
++
++struct usba_udc {
++	/* Protect hw registers from concurrent modifications */
++	spinlock_t lock;
++
++	void __iomem *regs;
++	void __iomem *fifo;
++
++	struct usb_gadget gadget;
++	struct usb_gadget_driver *driver;
++	struct platform_device *pdev;
++	int irq;
++	int vbus_pin;
++	struct clk *pclk;
++	struct clk *hclk;
++
++	int test_mode;
++	int vbus_prev;
++
++#ifdef CONFIG_USB_GADGET_DEBUG_FS
++	struct dentry *debugfs_root;
++	struct dentry *debugfs_regs;
++#endif
++};
++
++static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
++{
++	return container_of(ep, struct usba_ep, ep);
++}
++
++static inline struct usba_request *to_usba_req(struct usb_request *req)
++{
++	return container_of(req, struct usba_request, req);
++}
++
++static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
++{
++	return container_of(gadget, struct usba_udc, gadget);
++}
++
++#define ep_is_control(ep)	((ep)->index == 0)
++#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++
++#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
+diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
+index 235b618..bb361ab 100644
+--- a/drivers/video/atmel_lcdfb.c
++++ b/drivers/video/atmel_lcdfb.c
+@@ -37,7 +37,9 @@
+ #endif
+ 
+ #if defined(CONFIG_ARCH_AT91)
+-#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
++#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
++					 | FBINFO_PARTIAL_PAN_OK \
++					 | FBINFO_HWACCEL_YPAN)
+ 
+ static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
+ 					struct fb_var_screeninfo *var)
+@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
+ 	.type		= FB_TYPE_PACKED_PIXELS,
+ 	.visual		= FB_VISUAL_TRUECOLOR,
+ 	.xpanstep	= 0,
+-	.ypanstep	= 0,
++	.ypanstep	= 1,
+ 	.ywrapstep	= 0,
+ 	.accel		= FB_ACCEL_NONE,
+ };
+diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
+index 2580f5f..b6f936a 100644
+--- a/drivers/video/backlight/Kconfig
++++ b/drivers/video/backlight/Kconfig
+@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE
+ 	  To have support for your specific LCD panel you will have to
+ 	  select the proper drivers which depend on this option.
+ 
++config LCD_LTV350QV
++	tristate "Samsung LTV350QV LCD Panel"
++	depends on LCD_CLASS_DEVICE && SPI_MASTER
++	default n
++	help
++	  If you have a Samsung LTV350QV LCD panel, say y to include a
++	  power control driver for it.  The panel starts up in power
++	  off state, so you need this driver in order to see any
++	  output.
++
++	  The LTV350QV panel is present on all ATSTK1000 boards.
++
+ #
+ # Backlight
+ #
+diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
+index c6e2266..965a78b 100644
+--- a/drivers/video/backlight/Makefile
++++ b/drivers/video/backlight/Makefile
+@@ -1,6 +1,8 @@
+ # Backlight & LCD drivers
+ 
+ obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
++obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++
+ obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
+ obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
+ obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
+diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c
+new file mode 100644
+index 0000000..751dc53
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.c
+@@ -0,0 +1,339 @@
++/*
++ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/delay.h>
++#include <linux/err.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/lcd.h>
++#include <linux/module.h>
++#include <linux/spi/spi.h>
++
++#include "ltv350qv.h"
++
++#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++
++struct ltv350qv {
++	struct spi_device	*spi;
++	u8			*buffer;
++	int			power;
++	struct lcd_device	*ld;
++};
++
++/*
++ * The power-on and power-off sequences are taken from the
++ * LTV350QV-F04 data sheet from Samsung. The register definitions are
++ * taken from the S6F2002 command list also from Samsung. Both
++ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
++ *
++ * There's still some voodoo going on here, but it's a lot better than
++ * in the first incarnation of the driver where all we had was the raw
++ * numbers from the initialization sequence.
++ */
++static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++{
++	struct spi_message msg;
++	struct spi_transfer index_xfer = {
++		.len		= 3,
++		.cs_change	= 1,
++	};
++	struct spi_transfer value_xfer = {
++		.len		= 3,
++	};
++
++	spi_message_init(&msg);
++
++	/* register index */
++	lcd->buffer[0] = LTV_OPC_INDEX;
++	lcd->buffer[1] = 0x00;
++	lcd->buffer[2] = reg & 0x7f;
++	index_xfer.tx_buf = lcd->buffer;
++	spi_message_add_tail(&index_xfer, &msg);
++
++	/* register value */
++	lcd->buffer[4] = LTV_OPC_DATA;
++	lcd->buffer[5] = val >> 8;
++	lcd->buffer[6] = val;
++	value_xfer.tx_buf = lcd->buffer + 4;
++	spi_message_add_tail(&value_xfer, &msg);
++
++	return spi_sync(lcd->spi, &msg);
++}
++
++/* The comments are taken straight from the data sheet */
++static int ltv350qv_power_on(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Power On Reset Display off State */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
++		goto err;
++	msleep(15);
++
++	/* Power Setting Function 1 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
++		goto err;
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
++		goto err_power1;
++
++	/* Power Setting Function 2 */
++	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			       | LTV_SUPPLY_CURRENT(5)))
++		goto err_power2;
++
++	msleep(55);
++
++	/* Instruction Setting */
++	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
++				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
++	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
++				  LTV_DS_SAME | LTV_CHS_480
++				  | LTV_DF_RGB | LTV_RGB_BGR);
++	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
++				  LTV_VSPL_ACTIVE_LOW
++				  | LTV_HSPL_ACTIVE_LOW
++				  | LTV_DPL_SAMPLE_RISING
++				  | LTV_EPL_ACTIVE_LOW
++				  | LTV_SS_RIGHT_TO_LEFT);
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
++	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
++	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
++	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
++	if (ret)
++		goto err_settings;
++
++	/* Wait more than 2 frames */
++	msleep(20);
++
++	/* Display On Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
++				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
++	if (ret)
++		goto err_disp_on;
++
++	/* Display should now be ON. Phew. */
++	return 0;
++
++err_disp_on:
++	/*
++	 * Try to recover. Error handling probably isn't very useful
++	 * at this point, just make a best effort to switch the panel
++	 * off.
++	 */
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
++			   | LTV_SUPPLY_CURRENT(5));
++	ltv350qv_write_reg(lcd, LTV_GATECTL2,
++			   LTV_NW_INV_1LINE | LTV_FWI(3));
++err_settings:
++err_power2:
++err_power1:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++	msleep(1);
++err:
++	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	return -EIO;
++}
++
++static int ltv350qv_power_off(struct ltv350qv *lcd)
++{
++	int ret;
++
++	/* Display Off Sequence */
++	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
++				 LTV_VCOM_DISABLE
++				 | LTV_DRIVE_CURRENT(5)
++				 | LTV_SUPPLY_CURRENT(5));
++	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
++				  LTV_NW_INV_1LINE | LTV_FWI(3));
++
++	/* Power down setting 1 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++
++	/* Wait at least 1 ms */
++	msleep(1);
++
++	/* Power down setting 2 */
++	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++
++	/*
++	 * No point in trying to recover here. If we can't switch the
++	 * panel off, what are we supposed to do other than inform the
++	 * user about the failure?
++	 */
++	if (ret)
++		return -EIO;
++
++	/* Display power should now be OFF */
++	return 0;
++}
++
++static int ltv350qv_power(struct ltv350qv *lcd, int power)
++{
++	int ret = 0;
++
++	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_on(lcd);
++	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
++		ret = ltv350qv_power_off(lcd);
++
++	if (!ret)
++		lcd->power = power;
++
++	return ret;
++}
++
++static int ltv350qv_set_power(struct lcd_device *ld, int power)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return ltv350qv_power(lcd, power);
++}
++
++static int ltv350qv_get_power(struct lcd_device *ld)
++{
++	struct ltv350qv *lcd;
++
++	lcd = lcd_get_data(ld);
++	return lcd->power;
++}
++
++static struct lcd_ops ltv_ops = {
++	.get_power	= ltv350qv_get_power,
++	.set_power	= ltv350qv_set_power,
++};
++
++static int __devinit ltv350qv_probe(struct spi_device *spi)
++{
++	struct ltv350qv *lcd;
++	struct lcd_device *ld;
++	int ret;
++
++	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
++	if (!lcd)
++		return -ENOMEM;
++
++	lcd->spi = spi;
++	lcd->power = FB_BLANK_POWERDOWN;
++	lcd->buffer = kzalloc(8, GFP_KERNEL);
++
++	ld = lcd_device_register("ltv350qv", &spi->dev, lcd, &ltv_ops);
++	if (IS_ERR(ld)) {
++		ret = PTR_ERR(ld);
++		goto out_free_lcd;
++	}
++	lcd->ld = ld;
++
++	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	if (ret)
++		goto out_unregister;
++
++	dev_set_drvdata(&spi->dev, lcd);
++
++	return 0;
++
++out_unregister:
++	lcd_device_unregister(ld);
++out_free_lcd:
++	kfree(lcd);
++	return ret;
++}
++
++static int __devexit ltv350qv_remove(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	lcd_device_unregister(lcd->ld);
++	kfree(lcd);
++
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int ltv350qv_suspend(struct spi_device *spi,
++			    pm_message_t state, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == SUSPEND_POWER_DOWN)
++		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++
++	return 0;
++}
++
++static int ltv350qv_resume(struct spi_device *spi, u32 level)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	if (level == RESUME_POWER_ON)
++		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++
++	return 0;
++}
++#else
++#define ltv350qv_suspend	NULL
++#define ltv350qv_resume		NULL
++#endif
++
++/* Power down all displays on reboot, poweroff or halt */
++static void ltv350qv_shutdown(struct spi_device *spi)
++{
++	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++
++	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++}
++
++static struct spi_driver ltv350qv_driver = {
++	.driver = {
++		.name		= "ltv350qv",
++		.bus		= &spi_bus_type,
++		.owner		= THIS_MODULE,
++	},
++
++	.probe		= ltv350qv_probe,
++	.remove		= __devexit_p(ltv350qv_remove),
++	.shutdown	= ltv350qv_shutdown,
++	.suspend	= ltv350qv_suspend,
++	.resume		= ltv350qv_resume,
++};
++
++static int __init ltv350qv_init(void)
++{
++	return spi_register_driver(&ltv350qv_driver);
++}
++
++static void __exit ltv350qv_exit(void)
++{
++	spi_unregister_driver(&ltv350qv_driver);
++}
++module_init(ltv350qv_init);
++module_exit(ltv350qv_exit);
++
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
++MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_LICENSE("GPL");
+diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h
+new file mode 100644
+index 0000000..189112e
+--- /dev/null
++++ b/drivers/video/backlight/ltv350qv.h
+@@ -0,0 +1,95 @@
++/*
++ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ *
++ * Copyright (C) 2006, 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __LTV350QV_H
++#define __LTV350QV_H
++
++#define LTV_OPC_INDEX	0x74
++#define LTV_OPC_DATA	0x76
++
++#define LTV_ID		0x00		/* ID Read */
++#define LTV_IFCTL	0x01		/* Display Interface Control */
++#define LTV_DATACTL	0x02		/* Display Data Control */
++#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
++#define LTV_GATECTL1	0x04		/* Gate Control 1 */
++#define LTV_GATECTL2	0x05		/* Gate Control 2 */
++#define LTV_VBP		0x06		/* Vertical Back Porch */
++#define LTV_HBP		0x07		/* Horizontal Back Porch */
++#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
++#define LTV_PWRCTL1	0x09		/* Power Control 1 */
++#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
++#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++
++/* Bit definitions for LTV_IFCTL */
++#define LTV_IM			(1 << 15)
++#define LTV_NMD			(1 << 14)
++#define LTV_SSMD		(1 << 13)
++#define LTV_REV			(1 <<  7)
++#define LTV_NL(x)		(((x) & 0x001f) << 0)
++
++/* Bit definitions for LTV_DATACTL */
++#define LTV_DS_SAME		(0 << 12)
++#define LTV_DS_D_TO_S		(1 << 12)
++#define LTV_DS_S_TO_D		(2 << 12)
++#define LTV_CHS_384		(0 <<  9)
++#define LTV_CHS_480		(1 <<  9)
++#define LTV_CHS_492		(2 <<  9)
++#define LTV_DF_RGB		(0 <<  6)
++#define LTV_DF_RGBX		(1 <<  6)
++#define LTV_DF_XRGB		(2 <<  6)
++#define LTV_RGB_RGB		(0 <<  2)
++#define LTV_RGB_BGR		(1 <<  2)
++#define LTV_RGB_GRB		(2 <<  2)
++#define LTV_RGB_RBG		(3 <<  2)
++
++/* Bit definitions for LTV_ENTRY_MODE */
++#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
++#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
++#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
++#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
++#define LTV_DPL_SAMPLE_RISING	(0 << 13)
++#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
++#define LTV_EPL_ACTIVE_LOW	(0 << 12)
++#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
++#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
++#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
++#define LTV_STB			(1 <<  1)
++
++/* Bit definitions for LTV_GATECTL1 */
++#define LTV_CLW(x)		(((x) & 0x0007) << 12)
++#define LTV_GAON		(1 <<  5)
++#define LTV_SDR			(1 <<  3)
++
++/* Bit definitions for LTV_GATECTL2 */
++#define LTV_NW_INV_FRAME	(0 << 14)
++#define LTV_NW_INV_1LINE	(1 << 14)
++#define LTV_NW_INV_2LINE	(2 << 14)
++#define LTV_DSC			(1 << 12)
++#define LTV_GIF			(1 <<  8)
++#define LTV_FHN			(1 <<  7)
++#define LTV_FTI(x)		(((x) & 0x0003) << 4)
++#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++
++/* Bit definitions for LTV_SOTCTL */
++#define LTV_SDT(x)		(((x) & 0x0007) << 10)
++#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++
++/* Bit definitions for LTV_PWRCTL1 */
++#define LTV_VCOM_DISABLE	(1 << 14)
++#define LTV_VCOMOUT_ENABLE	(1 << 11)
++#define LTV_POWER_ON		(1 <<  9)
++#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
++#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++
++/* Bit definitions for LTV_PWRCTL2 */
++#define LTV_VCOML_ENABLE	(1 << 13)
++#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
++#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++
++#endif /* __LTV350QV_H */
+diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h
+index 0215965..e1318e0 100644
+--- a/include/asm-avr32/arch-at32ap/board.h
++++ b/include/asm-avr32/arch-at32ap/board.h
+@@ -6,6 +6,8 @@
+ 
+ #include <linux/types.h>
+ 
++#define GPIO_PIN_NONE	(-1)
++
+ /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
+ void at32_add_system_devices(void);
+ 
+@@ -31,11 +33,26 @@ struct spi_board_info;
+ struct platform_device *
+ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
+ 
++struct platform_device *at32_add_device_twi(unsigned int id);
 +
-+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
++struct mci_platform_data {
++	int detect_pin;
++	int wp_pin;
++};
++struct platform_device *
++at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++
+ struct atmel_lcdfb_info;
+ struct platform_device *
+ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ 		     unsigned long fbmem_start, unsigned long fbmem_len);
+ 
++struct usba_platform_data {
++	int vbus_pin;
++};
++struct platform_device *
++at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
++
+ /* depending on what's hooked up, not all SSC pins will be used */
+ #define	ATMEL_SSC_TK		0x01
+ #define	ATMEL_SSC_TF		0x02
+@@ -50,4 +67,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
+ struct platform_device *
+ at32_add_device_ssc(unsigned int id, unsigned int flags);
+ 
++struct platform_device *at32_add_device_ac97c(unsigned int id);
++struct platform_device *at32_add_device_abdac(unsigned int id);
++
+ #endif /* __ASM_ARCH_BOARD_H */
+diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h
+index 9930871..135e034 100644
+--- a/include/asm-avr32/arch-at32ap/portmux.h
++++ b/include/asm-avr32/arch-at32ap/portmux.h
+@@ -19,10 +19,23 @@
+ #define AT32_GPIOF_OUTPUT	0x00000002	/* (OUT) Enable output driver */
+ #define AT32_GPIOF_HIGH		0x00000004	/* (OUT) Set output high */
+ #define AT32_GPIOF_DEGLITCH	0x00000008	/* (IN) Filter glitches */
++#define AT32_GPIOF_MULTIDRV	0x00000010	/* Enable multidriver option */
+ 
+ void at32_select_periph(unsigned int pin, unsigned int periph,
+ 			unsigned long flags);
+ void at32_select_gpio(unsigned int pin, unsigned long flags);
+ void at32_reserve_pin(unsigned int pin);
+ 
++#ifdef CONFIG_GPIO_DEV
++
++/* Gang allocators and accessors; used by the GPIO /dev driver */
++int at32_gpio_port_is_valid(unsigned int port);
++int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
++void at32_deselect_pins(unsigned int port, u32 pins);
++
++u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
++void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++
++#endif /* CONFIG_GPIO_DEV */
++
+ #endif /* __ASM_ARCH_PORTMUX_H__ */
+diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h
+index 07152b7..c98eea4 100644
+--- a/include/asm-avr32/arch-at32ap/smc.h
++++ b/include/asm-avr32/arch-at32ap/smc.h
+@@ -15,22 +15,50 @@
+ /*
+  * All timing parameters are in nanoseconds.
+  */
++struct smc_timing {
++	/* Delay from address valid to assertion of given strobe */
++	int ncs_read_setup;
++	int nrd_setup;
++	int ncs_write_setup;
++	int nwe_setup;
++
++	/* Pulse length of given strobe */
++	int ncs_read_pulse;
++	int nrd_pulse;
++	int ncs_write_pulse;
++	int nwe_pulse;
++
++	/* Total cycle length of given operation */
++	int read_cycle;
++	int write_cycle;
++
++	/* Minimal recovery times, will extend cycle if needed */
++	int ncs_read_recover;
++	int nrd_recover;
++	int ncs_write_recover;
++	int nwe_recover;
++};
++
++/*
++ * All timing parameters are in clock cycles.
++ */
+ struct smc_config {
++
+ 	/* Delay from address valid to assertion of given strobe */
+-	u16		ncs_read_setup;
+-	u16		nrd_setup;
+-	u16		ncs_write_setup;
+-	u16		nwe_setup;
++	u8		ncs_read_setup;
++	u8		nrd_setup;
++	u8		ncs_write_setup;
++	u8		nwe_setup;
+ 
+ 	/* Pulse length of given strobe */
+-	u16		ncs_read_pulse;
+-	u16		nrd_pulse;
+-	u16		ncs_write_pulse;
+-	u16		nwe_pulse;
++	u8		ncs_read_pulse;
++	u8		nrd_pulse;
++	u8		ncs_write_pulse;
++	u8		nwe_pulse;
+ 
+ 	/* Total cycle length of given operation */
+-	u16		read_cycle;
+-	u16		write_cycle;
++	u8		read_cycle;
++	u8		write_cycle;
+ 
+ 	/* Bus width in bytes */
+ 	u8		bus_width;
+@@ -76,6 +104,9 @@ struct smc_config {
+ 	unsigned int	tdf_mode:1;
+ };
+ 
++extern void smc_set_timing(struct smc_config *config,
++			   const struct smc_timing *timing);
++
+ extern int smc_set_configuration(int cs, const struct smc_config *config);
+ extern struct smc_config *smc_get_configuration(int cs);
+ 
+diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h
+new file mode 100644
+index 0000000..56a4965
+--- /dev/null
++++ b/include/asm-avr32/dma-controller.h
+@@ -0,0 +1,166 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ASM_AVR32_DMA_CONTROLLER_H
++#define __ASM_AVR32_DMA_CONTROLLER_H
++
++#include <linux/device.h>
++
++#define DMA_DIR_MEM_TO_MEM		0x0000
++#define DMA_DIR_MEM_TO_PERIPH		0x0001
++#define DMA_DIR_PERIPH_TO_MEM		0x0002
++#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++
++#define DMA_WIDTH_8BIT			0
++#define DMA_WIDTH_16BIT			1
++#define DMA_WIDTH_32BIT			2
++
++struct dma_request {
++	struct dma_controller *dmac;
++	struct list_head list;
++
++	unsigned short channel;
++
++	void (*xfer_complete)(struct dma_request *req);
++	void (*block_complete)(struct dma_request *req);
++	void (*error)(struct dma_request *req);
++};
++
++struct dma_request_sg {
++	struct dma_request req;
++
++	int nr_sg;
++	struct scatterlist *sg;
++	unsigned long block_size;
++	unsigned int nr_blocks;
++
++	dma_addr_t data_reg;
++	unsigned short periph_id;
++
++	unsigned char direction;
++	unsigned char width;
++};
++#define to_dma_request_sg(_req)				\
++	container_of(_req, struct dma_request_sg, req)
++
++struct dma_request_cyclic {
++	struct dma_request req;
++
++        int periods;
++	unsigned long buffer_size;
++
++        dma_addr_t buffer_start;
++	dma_addr_t data_reg;
++
++	unsigned short periph_id;
++	unsigned char direction;
++	unsigned char width;
++
++        void *dev_id;
++};
++#define to_dma_request_cyclic(_req)				\
++	container_of(_req, struct dma_request_cyclic, req)
++
++struct dma_request_memcpy {
++	struct dma_request req;
++
++	dma_addr_t src_addr;
++	unsigned int src_width;
++	unsigned int src_stride;
++
++	dma_addr_t dst_addr;
++	unsigned int dst_width;
++	unsigned int dst_stride;
++
++	size_t length;
++
++	unsigned short src_reverse:1;
++	unsigned short dst_reverse:1;
++};
++#define to_dma_request_memcpy(_req)				\
++	container_of(_req, struct dma_request_memcpy, req)
++
++struct dma_controller {
++	struct list_head list;
++	int id;
++	struct device *dev;
++
++	int (*alloc_channel)(struct dma_controller *dmac);
++	void (*release_channel)(struct dma_controller *dmac,
++				int channel);
++	int (*prepare_request_sg)(struct dma_controller *dmac,
++				  struct dma_request_sg *req);
++        int (*prepare_request_cyclic)(struct dma_controller *dmac,
++				      struct dma_request_cyclic *req);
++	int (*prepare_request_memcpy)(struct dma_controller *dmac,
++				      struct dma_request_memcpy *req);
++	int (*start_request)(struct dma_controller *dmac,
++			     unsigned int channel);
++	int (*stop_request)(struct dma_controller *dmac,
++                            unsigned int channel);
++        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
++                                      unsigned int channel);
++};
++
++static inline int
++dma_alloc_channel(struct dma_controller *dmac)
 +{
-+	struct usba_request *req;
-+	u32 epstatus;
-+	u32 epctrl;
++	return dmac->alloc_channel(dmac);
++}
 +
-+restart:
-+	epstatus = usba_ep_readl(ep, STA);
-+	epctrl = usba_ep_readl(ep, CTL);
++static inline void
++dma_release_channel(struct dma_controller *dmac, int chan)
++{
++	dmac->release_channel(dmac, chan);
++}
 +
-+	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
-+	    ep_name(ep), ep->state, epstatus, epctrl);
++static inline int
++dma_prepare_request_sg(struct dma_controller *dmac,
++		       struct dma_request_sg *req)
++{
++	return dmac->prepare_request_sg(dmac, req);
++}
 +
-+	req = NULL;
-+	if (!list_empty(&ep->queue))
-+		req = list_entry(ep->queue.next,
-+				 struct usba_request, queue);
++static inline int
++dma_prepare_request_cyclic(struct dma_controller *dmac,
++			   struct dma_request_cyclic *req)
++{
++	return dmac->prepare_request_cyclic(dmac, req);
++}
 +
-+	if ((epctrl & USBA_BIT(TX_PK_RDY))
-+	    && !(epstatus & USBA_BIT(TX_PK_RDY))) {
-+		if (req->submitted)
-+			next_fifo_transaction(ep, req);
-+		else
-+			submit_request(ep, req);
++static inline int
++dma_prepare_request_memcpy(struct dma_controller *dmac,
++			   struct dma_request_memcpy *req)
++{
++	return dmac->prepare_request_memcpy(dmac, req);
++}
 +
-+		if (req->last_transaction) {
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(TX_COMPLETE));
-+		}
-+		goto restart;
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(TX_COMPLETE)) {
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(TX_COMPLETE));
++static inline int
++dma_start_request(struct dma_controller *dmac,
++		  unsigned int channel)
++{
++	return dmac->start_request(dmac, channel);
++}
 +
-+		switch (ep->state) {
-+		case DATA_STAGE_IN:
-+			usba_ep_writel(ep, CTL_ENB, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = STATUS_STAGE_OUT;
-+			break;
-+		case STATUS_STAGE_ADDR:
-+			/* Activate our new address */
-+			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
-+						| USBA_BIT(FADDR_EN)));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
-+		case STATUS_STAGE_IN:
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, 0);
-+				submit_next_request(ep);
-+			}
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
-+		case STATUS_STAGE_TEST:
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_COMPLETE));
-+			ep->state = WAIT_FOR_SETUP;
-+			if (do_test_mode(udc))
-+				set_protocol_stall(udc, ep);
-+			break;
-+		default:
-+			printk(KERN_ERR
-+			       "udc: %s: TXCOMP: Invalid endpoint state %d, "
-+			       "halting endpoint...\n",
-+			       ep_name(ep), ep->state);
-+			set_protocol_stall(udc, ep);
-+			break;
-+		}
++static inline int
++dma_stop_request(struct dma_controller *dmac,
++                 unsigned int channel)
++{
++	return dmac->stop_request(dmac, channel);
++}
 +
-+		goto restart;
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) {
-+		switch (ep->state) {
-+		case STATUS_STAGE_OUT:
-+			usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
++static inline dma_addr_t
++dma_get_current_pos(struct dma_controller *dmac,
++                    unsigned int channel)
++{
++	return dmac->get_current_pos(dmac, channel);
++}
 +
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, 0);
-+			}
-+			ep->state = WAIT_FOR_SETUP;
-+			break;
++extern int register_dma_controller(struct dma_controller *dmac);
++extern struct dma_controller *find_dma_controller(int id);
 +
-+		case DATA_STAGE_OUT:
-+			receive_data(ep);
-+			break;
++#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
+diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h
+index 21bb60b..81e3426 100644
+--- a/include/asm-avr32/dma-mapping.h
++++ b/include/asm-avr32/dma-mapping.h
+@@ -264,7 +264,11 @@ static inline void
+ dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+ 			size_t size, enum dma_data_direction direction)
+ {
+-	dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+@@ -309,12 +313,11 @@ static inline void
+ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+ 		    int nents, enum dma_data_direction direction)
+ {
+-	int i;
+-
+-	for (i = 0; i < nents; i++) {
+-		dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
+-			       sg[i].length, direction);
+-	}
++	/*
++	 * No need to do anything since the CPU isn't supposed to
++	 * touch this memory after we flushed it at mapping- or
++	 * sync-for-device time.
++	 */
+ }
+ 
+ static inline void
+diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h
+index a8236ba..dc2d527 100644
+--- a/include/asm-avr32/system.h
++++ b/include/asm-avr32/system.h
+@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
+ 
+ extern void __xchg_called_with_bad_pointer(void);
+ 
+-#ifdef __CHECKER__
+-extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
+-#endif
++static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
++{
++	u32 ret;
+ 
+-#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
++	asm volatile("xchg %[ret], %[m], %[val]"
++			: [ret] "=&r"(ret), "=m"(*m)
++			: "m"(*m), [m] "r"(m), [val] "r"(val)
++			: "memory");
++	return ret;
++}
+ 
+ static inline unsigned long __xchg(unsigned long x,
+ 				       volatile void *ptr,
+diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
+index 3b4e35b..de09009 100644
+--- a/include/asm-avr32/unistd.h
++++ b/include/asm-avr32/unistd.h
+@@ -303,6 +303,19 @@
+ #ifdef __KERNEL__
+ #define NR_syscalls		282
+ 
++/* Old stuff */
++#define __IGNORE_uselib
++#define __IGNORE_mmap
++
++/* NUMA stuff */
++#define __IGNORE_mbind
++#define __IGNORE_get_mempolicy
++#define __IGNORE_set_mempolicy
++#define __IGNORE_migrate_pages
++#define __IGNORE_move_pages
++
++/* SMP stuff */
++#define __IGNORE_getcpu
+ 
+ #define __ARCH_WANT_IPC_PARSE_VERSION
+ #define __ARCH_WANT_STAT64
+diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h
+new file mode 100644
+index 0000000..0602339
+--- /dev/null
++++ b/include/linux/atmel-ssc.h
+@@ -0,0 +1,312 @@
++#ifndef __INCLUDE_ATMEL_SSC_H
++#define __INCLUDE_ATMEL_SSC_H
 +
-+		default:
-+			usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(RX_BK_RDY));
-+			printk(KERN_ERR
-+			       "udc: %s: RXRDY: Invalid endpoint state %d, "
-+			       "halting endpoint...\n",
-+			       ep_name(ep), ep->state);
-+			set_protocol_stall(udc, ep);
-+			break;
-+		}
++#include <linux/platform_device.h>
++#include <linux/list.h>
 +
-+		goto restart;
-+	}
-+	if (epstatus & USBA_BIT(RX_SETUP)) {
-+		union {
-+			struct usb_ctrlrequest crq;
-+			unsigned long data[2];
-+		} crq;
-+		unsigned int pkt_len;
-+		int ret;
++struct ssc_device {
++	struct list_head	list;
++	void __iomem		*regs;
++	struct platform_device	*pdev;
++	struct clk		*clk;
++	int			user;
++	int			irq;
++};
 +
-+		if (ep->state != WAIT_FOR_SETUP) {
-+			/*
-+			 * Didn't expect a SETUP packet at this
-+			 * point. Clean up any pending requests (which
-+			 * may be successful).
-+			 */
-+			int status = -EPROTO;
++struct ssc_device * __must_check ssc_request(unsigned int ssc_num);
++void ssc_free(struct ssc_device *ssc);
++
++/* SSC register offsets */
++
++/* SSC Control Register */
++#define SSC_CR				0x00000000
++#define SSC_CR_RXDIS_SIZE			 1
++#define SSC_CR_RXDIS_OFFSET			 1
++#define SSC_CR_RXEN_SIZE			 1
++#define SSC_CR_RXEN_OFFSET			 0
++#define SSC_CR_SWRST_SIZE			 1
++#define SSC_CR_SWRST_OFFSET			15
++#define SSC_CR_TXDIS_SIZE			 1
++#define SSC_CR_TXDIS_OFFSET			 9
++#define SSC_CR_TXEN_SIZE			 1
++#define SSC_CR_TXEN_OFFSET			 8
++
++/* SSC Clock Mode Register */
++#define SSC_CMR				0x00000004
++#define SSC_CMR_DIV_SIZE			12
++#define SSC_CMR_DIV_OFFSET			 0
++
++/* SSC Receive Clock Mode Register */
++#define SSC_RCMR			0x00000010
++#define SSC_RCMR_CKG_SIZE			 2
++#define SSC_RCMR_CKG_OFFSET			 6
++#define SSC_RCMR_CKI_SIZE			 1
++#define SSC_RCMR_CKI_OFFSET			 5
++#define SSC_RCMR_CKO_SIZE			 3
++#define SSC_RCMR_CKO_OFFSET			 2
++#define SSC_RCMR_CKS_SIZE			 2
++#define SSC_RCMR_CKS_OFFSET			 0
++#define SSC_RCMR_PERIOD_SIZE			 8
++#define SSC_RCMR_PERIOD_OFFSET			24
++#define SSC_RCMR_START_SIZE			 4
++#define SSC_RCMR_START_OFFSET			 8
++#define SSC_RCMR_STOP_SIZE			 1
++#define SSC_RCMR_STOP_OFFSET			12
++#define SSC_RCMR_STTDLY_SIZE			 8
++#define SSC_RCMR_STTDLY_OFFSET			16
++
++/* SSC Receive Frame Mode Register */
++#define SSC_RFMR			0x00000014
++#define SSC_RFMR_DATLEN_SIZE			 5
++#define SSC_RFMR_DATLEN_OFFSET			 0
++#define SSC_RFMR_DATNB_SIZE			 4
++#define SSC_RFMR_DATNB_OFFSET			 8
++#define SSC_RFMR_FSEDGE_SIZE			 1
++#define SSC_RFMR_FSEDGE_OFFSET			24
++#define SSC_RFMR_FSLEN_SIZE			 4
++#define SSC_RFMR_FSLEN_OFFSET			16
++#define SSC_RFMR_FSOS_SIZE			 4
++#define SSC_RFMR_FSOS_OFFSET			20
++#define SSC_RFMR_LOOP_SIZE			 1
++#define SSC_RFMR_LOOP_OFFSET			 5
++#define SSC_RFMR_MSBF_SIZE			 1
++#define SSC_RFMR_MSBF_OFFSET			 7
++
++/* SSC Transmit Clock Mode Register */
++#define SSC_TCMR			0x00000018
++#define SSC_TCMR_CKG_SIZE			 2
++#define SSC_TCMR_CKG_OFFSET			 6
++#define SSC_TCMR_CKI_SIZE			 1
++#define SSC_TCMR_CKI_OFFSET			 5
++#define SSC_TCMR_CKO_SIZE			 3
++#define SSC_TCMR_CKO_OFFSET			 2
++#define SSC_TCMR_CKS_SIZE			 2
++#define SSC_TCMR_CKS_OFFSET			 0
++#define SSC_TCMR_PERIOD_SIZE			 8
++#define SSC_TCMR_PERIOD_OFFSET			24
++#define SSC_TCMR_START_SIZE			 4
++#define SSC_TCMR_START_OFFSET			 8
++#define SSC_TCMR_STTDLY_SIZE			 8
++#define SSC_TCMR_STTDLY_OFFSET			16
++
++/* SSC Transmit Frame Mode Register */
++#define SSC_TFMR			0x0000001c
++#define SSC_TFMR_DATDEF_SIZE			 1
++#define SSC_TFMR_DATDEF_OFFSET			 5
++#define SSC_TFMR_DATLEN_SIZE			 5
++#define SSC_TFMR_DATLEN_OFFSET			 0
++#define SSC_TFMR_DATNB_SIZE			 4
++#define SSC_TFMR_DATNB_OFFSET			 8
++#define SSC_TFMR_FSDEN_SIZE			 1
++#define SSC_TFMR_FSDEN_OFFSET			23
++#define SSC_TFMR_FSEDGE_SIZE			 1
++#define SSC_TFMR_FSEDGE_OFFSET			24
++#define SSC_TFMR_FSLEN_SIZE			 4
++#define SSC_TFMR_FSLEN_OFFSET			16
++#define SSC_TFMR_FSOS_SIZE			 3
++#define SSC_TFMR_FSOS_OFFSET			20
++#define SSC_TFMR_MSBF_SIZE			 1
++#define SSC_TFMR_MSBF_OFFSET			 7
++
++/* SSC Receive Hold Register */
++#define SSC_RHR				0x00000020
++#define SSC_RHR_RDAT_SIZE			32
++#define SSC_RHR_RDAT_OFFSET			 0
++
++/* SSC Transmit Hold Register */
++#define SSC_THR				0x00000024
++#define SSC_THR_TDAT_SIZE			32
++#define SSC_THR_TDAT_OFFSET			 0
++
++/* SSC Receive Sync. Holding Register */
++#define SSC_RSHR			0x00000030
++#define SSC_RSHR_RSDAT_SIZE			16
++#define SSC_RSHR_RSDAT_OFFSET			 0
++
++/* SSC Transmit Sync. Holding Register */
++#define SSC_TSHR			0x00000034
++#define SSC_TSHR_TSDAT_SIZE			16
++#define SSC_TSHR_RSDAT_OFFSET			 0
++
++/* SSC Receive Compare 0 Register */
++#define SSC_RC0R			0x00000038
++#define SSC_RC0R_CP0_SIZE			16
++#define SSC_RC0R_CP0_OFFSET			 0
++
++/* SSC Receive Compare 1 Register */
++#define SSC_RC1R			0x0000003c
++#define SSC_RC1R_CP1_SIZE			16
++#define SSC_RC1R_CP1_OFFSET			 0
++
++/* SSC Status Register */
++#define SSC_SR				0x00000040
++#define SSC_SR_CP0_SIZE				 1
++#define SSC_SR_CP0_OFFSET			 8
++#define SSC_SR_CP1_SIZE				 1
++#define SSC_SR_CP1_OFFSET			 9
++#define SSC_SR_ENDRX_SIZE			 1
++#define SSC_SR_ENDRX_OFFSET			 6
++#define SSC_SR_ENDTX_SIZE			 1
++#define SSC_SR_ENDTX_OFFSET			 2
++#define SSC_SR_OVRUN_SIZE			 1
++#define SSC_SR_OVRUN_OFFSET			 5
++#define SSC_SR_RXBUFF_SIZE			 1
++#define SSC_SR_RXBUFF_OFFSET			 7
++#define SSC_SR_RXEN_SIZE			 1
++#define SSC_SR_RXEN_OFFSET			17
++#define SSC_SR_RXRDY_SIZE			 1
++#define SSC_SR_RXRDY_OFFSET			 4
++#define SSC_SR_RXSYN_SIZE			 1
++#define SSC_SR_RXSYN_OFFSET			11
++#define SSC_SR_TXBUFE_SIZE			 1
++#define SSC_SR_TXBUFE_OFFSET			 3
++#define SSC_SR_TXEMPTY_SIZE			 1
++#define SSC_SR_TXEMPTY_OFFSET			 1
++#define SSC_SR_TXEN_SIZE			 1
++#define SSC_SR_TXEN_OFFSET			16
++#define SSC_SR_TXRDY_SIZE			 1
++#define SSC_SR_TXRDY_OFFSET			 0
++#define SSC_SR_TXSYN_SIZE			 1
++#define SSC_SR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Enable Register */
++#define SSC_IER				0x00000044
++#define SSC_IER_CP0_SIZE			 1
++#define SSC_IER_CP0_OFFSET			 8
++#define SSC_IER_CP1_SIZE			 1
++#define SSC_IER_CP1_OFFSET			 9
++#define SSC_IER_ENDRX_SIZE			 1
++#define SSC_IER_ENDRX_OFFSET			 6
++#define SSC_IER_ENDTX_SIZE			 1
++#define SSC_IER_ENDTX_OFFSET			 2
++#define SSC_IER_OVRUN_SIZE			 1
++#define SSC_IER_OVRUN_OFFSET			 5
++#define SSC_IER_RXBUFF_SIZE			 1
++#define SSC_IER_RXBUFF_OFFSET			 7
++#define SSC_IER_RXRDY_SIZE			 1
++#define SSC_IER_RXRDY_OFFSET			 4
++#define SSC_IER_RXSYN_SIZE			 1
++#define SSC_IER_RXSYN_OFFSET			11
++#define SSC_IER_TXBUFE_SIZE			 1
++#define SSC_IER_TXBUFE_OFFSET			 3
++#define SSC_IER_TXEMPTY_SIZE			 1
++#define SSC_IER_TXEMPTY_OFFSET			 1
++#define SSC_IER_TXRDY_SIZE			 1
++#define SSC_IER_TXRDY_OFFSET			 0
++#define SSC_IER_TXSYN_SIZE			 1
++#define SSC_IER_TXSYN_OFFSET			10
++
++/* SSC Interrupt Disable Register */
++#define SSC_IDR				0x00000048
++#define SSC_IDR_CP0_SIZE			 1
++#define SSC_IDR_CP0_OFFSET			 8
++#define SSC_IDR_CP1_SIZE			 1
++#define SSC_IDR_CP1_OFFSET			 9
++#define SSC_IDR_ENDRX_SIZE			 1
++#define SSC_IDR_ENDRX_OFFSET			 6
++#define SSC_IDR_ENDTX_SIZE			 1
++#define SSC_IDR_ENDTX_OFFSET			 2
++#define SSC_IDR_OVRUN_SIZE			 1
++#define SSC_IDR_OVRUN_OFFSET			 5
++#define SSC_IDR_RXBUFF_SIZE			 1
++#define SSC_IDR_RXBUFF_OFFSET			 7
++#define SSC_IDR_RXRDY_SIZE			 1
++#define SSC_IDR_RXRDY_OFFSET			 4
++#define SSC_IDR_RXSYN_SIZE			 1
++#define SSC_IDR_RXSYN_OFFSET			11
++#define SSC_IDR_TXBUFE_SIZE			 1
++#define SSC_IDR_TXBUFE_OFFSET			 3
++#define SSC_IDR_TXEMPTY_SIZE			 1
++#define SSC_IDR_TXEMPTY_OFFSET			 1
++#define SSC_IDR_TXRDY_SIZE			 1
++#define SSC_IDR_TXRDY_OFFSET			 0
++#define SSC_IDR_TXSYN_SIZE			 1
++#define SSC_IDR_TXSYN_OFFSET			10
++
++/* SSC Interrupt Mask Register */
++#define SSC_IMR				0x0000004c
++#define SSC_IMR_CP0_SIZE			 1
++#define SSC_IMR_CP0_OFFSET			 8
++#define SSC_IMR_CP1_SIZE			 1
++#define SSC_IMR_CP1_OFFSET			 9
++#define SSC_IMR_ENDRX_SIZE			 1
++#define SSC_IMR_ENDRX_OFFSET			 6
++#define SSC_IMR_ENDTX_SIZE			 1
++#define SSC_IMR_ENDTX_OFFSET			 2
++#define SSC_IMR_OVRUN_SIZE			 1
++#define SSC_IMR_OVRUN_OFFSET			 5
++#define SSC_IMR_RXBUFF_SIZE			 1
++#define SSC_IMR_RXBUFF_OFFSET			 7
++#define SSC_IMR_RXRDY_SIZE			 1
++#define SSC_IMR_RXRDY_OFFSET			 4
++#define SSC_IMR_RXSYN_SIZE			 1
++#define SSC_IMR_RXSYN_OFFSET			11
++#define SSC_IMR_TXBUFE_SIZE			 1
++#define SSC_IMR_TXBUFE_OFFSET			 3
++#define SSC_IMR_TXEMPTY_SIZE			 1
++#define SSC_IMR_TXEMPTY_OFFSET			 1
++#define SSC_IMR_TXRDY_SIZE			 1
++#define SSC_IMR_TXRDY_OFFSET			 0
++#define SSC_IMR_TXSYN_SIZE			 1
++#define SSC_IMR_TXSYN_OFFSET			10
++
++/* SSC PDC Receive Pointer Register */
++#define SSC_PDC_RPR			0x00000100
++
++/* SSC PDC Receive Counter Register */
++#define SSC_PDC_RCR			0x00000104
++
++/* SSC PDC Transmit Pointer Register */
++#define SSC_PDC_TPR			0x00000108
++
++/* SSC PDC Receive Next Pointer Register */
++#define SSC_PDC_RNPR			0x00000110
++
++/* SSC PDC Receive Next Counter Register */
++#define SSC_PDC_RNCR			0x00000114
++
++/* SSC PDC Transmit Counter Register */
++#define SSC_PDC_TCR			0x0000010c
++
++/* SSC PDC Transmit Next Pointer Register */
++#define SSC_PDC_TNPR			0x00000118
++
++/* SSC PDC Transmit Next Counter Register */
++#define SSC_PDC_TNCR			0x0000011c
++
++/* SSC PDC Transfer Control Register */
++#define SSC_PDC_PTCR			0x00000120
++#define SSC_PDC_PTCR_RXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_RXTDIS_OFFSET		 1
++#define SSC_PDC_PTCR_RXTEN_SIZE			 1
++#define SSC_PDC_PTCR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTCR_TXTDIS_SIZE		 1
++#define SSC_PDC_PTCR_TXTDIS_OFFSET		 9
++#define SSC_PDC_PTCR_TXTEN_SIZE			 1
++#define SSC_PDC_PTCR_TXTEN_OFFSET		 8
++
++/* SSC PDC Transfer Status Register */
++#define SSC_PDC_PTSR			0x00000124
++#define SSC_PDC_PTSR_RXTEN_SIZE			 1
++#define SSC_PDC_PTSR_RXTEN_OFFSET		 0
++#define SSC_PDC_PTSR_TXTEN_SIZE			 1
++#define SSC_PDC_PTSR_TXTEN_OFFSET		 8
 +
-+			/*
-+			 * RXRDY and TXCOMP are dropped when SETUP
-+			 * packets arrive.  Just pretend we received
-+			 * the status packet.
-+			 */
-+			if (ep->state == STATUS_STAGE_OUT
-+			    || ep->state == STATUS_STAGE_IN) {
-+				usba_ep_writel(ep, CTL_DIS,
-+					       USBA_BIT(RX_BK_RDY));
-+				status = 0;
-+			}
++/* Bit manipulation macros */
++#define SSC_BIT(name)					\
++	(1 << SSC_##name##_OFFSET)
++#define SSC_BF(name, value)				\
++	(((value) & ((1 << SSC_##name##_SIZE) - 1))	\
++	 << SSC_##name##_OFFSET)
++#define SSC_BFEXT(name, value)				\
++	(((value) >> SSC_##name##_OFFSET)		\
++	 & ((1 << SSC_##name##_SIZE) - 1))
++#define SSC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << SSC_##name##_SIZE) - 1)	\
++	<< SSC_##name##_OFFSET)) | SSC_BF(name, value))
 +
-+			if (req) {
-+				list_del_init(&req->queue);
-+				request_complete(ep, req, status);
-+			}
-+		}
++/* Register access macros */
++#define ssc_readl(base, reg)		__raw_readl(base + SSC_##reg)
++#define ssc_writel(base, reg, value)	__raw_writel((value), base + SSC_##reg)
++
++#endif /* __INCLUDE_ATMEL_SSC_H */
+diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h
+new file mode 100644
+index 0000000..0f20a70
+--- /dev/null
++++ b/include/linux/spi/at73c213.h
+@@ -0,0 +1,25 @@
++/*
++ * Board-specific data used to set up AT73c213 audio DAC driver.
++ */
 +
-+		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
-+		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
-+		if (pkt_len != sizeof(crq)) {
-+			printk(KERN_WARNING
-+			       "udc: Invalid packet length %u (expected %lu)\n",
-+			       pkt_len, sizeof(crq));
-+			set_protocol_stall(udc, ep);
-+			return;
-+		}
++#ifndef __LINUX_SPI_AT73C213_H
++#define __LINUX_SPI_AT73C213_H
 +
-+		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
-+		copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
++/**
++ * at73c213_board_info - how the external DAC is wired to the device.
++ *
++ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio.
++ * @dac_clk: the external clock used to provide master clock to the DAC.
++ * @shortname: a short discription for the DAC, seen by userspace tools.
++ *
++ * This struct contains the configuration of the hardware connection to the
++ * external DAC. The DAC needs a master clock and a I2S audio stream. It also
++ * provides a name which is used to identify it in userspace tools.
++ */
++struct at73c213_board_info {
++	int		ssc_id;
++	struct clk	*dac_clk;
++	char		shortname[32];
++};
 +
-+		/* Free up one bank in the FIFO so that we can
-+		 * generate or receive a reply right away. */
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_SETUP));
++#endif /* __LINUX_SPI_AT73C213_H */
+diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
+index f7844f6..6631586 100755
+--- a/scripts/checkstack.pl
++++ b/scripts/checkstack.pl
+@@ -12,6 +12,7 @@
+ #	sh64 port by Paul Mundt
+ #	Random bits by Matt Mackall <mpm@selenic.com>
+ #	M68k port by Geert Uytterhoeven and Andreas Schwab
++#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
+ #
+ #	Usage:
+ #	objdump -d vmlinux | stackcheck.pl [arch]
+@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs);
+ 	if ($arch eq 'arm') {
+ 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
+ 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
++	} elsif ($arch eq 'avr32') {
++		#8000008a:       20 1d           sub sp,4
++		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
++		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
+ 	} elsif ($arch =~ /^i[3456]86$/) {
+ 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
+ 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
+diff --git a/sound/Kconfig b/sound/Kconfig
+index e48b9b3..29a9979 100644
+--- a/sound/Kconfig
++++ b/sound/Kconfig
+@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig"
+ 
+ source "sound/arm/Kconfig"
+ 
++source "sound/avr32/Kconfig"
 +
-+		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
-+		       ep->state, crq.crq.bRequestType,
-+		       crq.crq.bRequest); */
++if SPI
++source "sound/spi/Kconfig"
++endif
 +
-+		if (crq.crq.bRequestType & USB_DIR_IN) {
-+			/*
-+			 * The USB 2.0 spec states that "if wLength is
-+			 * zero, there is no data transfer phase."
-+			 * However, testusb #14 seems to actually
-+			 * expect a data phase even if wLength = 0...
-+			 */
-+			ep->state = DATA_STAGE_IN;
-+		} else {
-+			if (crq.crq.wLength != __constant_cpu_to_le16(0))
-+				ep->state = DATA_STAGE_OUT;
-+			else
-+				ep->state = STATUS_STAGE_IN;
-+		}
+ source "sound/mips/Kconfig"
+ 
+ source "sound/sh/Kconfig"
+diff --git a/sound/Makefile b/sound/Makefile
+index 3ead922..e655df7 100644
+--- a/sound/Makefile
++++ b/sound/Makefile
+@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o
+ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o
+ obj-$(CONFIG_SOUND_PRIME) += oss/
+ obj-$(CONFIG_DMASOUND) += oss/
+-obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/
++obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/
++
+ obj-$(CONFIG_SND_AOA) += aoa/
+ 
+ # This one must be compilable even if sound is configured out
+diff --git a/sound/avr32/Kconfig b/sound/avr32/Kconfig
+new file mode 100644
+index 0000000..17d1d91
+--- /dev/null
++++ b/sound/avr32/Kconfig
+@@ -0,0 +1,11 @@
++menu "AVR32 devices"
++	depends on SND != n && AVR32
++
++config SND_ATMEL_AC97
++	tristate "Atmel AC97 Controller Driver"
++	select SND_PCM
++	select SND_AC97_CODEC
++	help
++	  ALSA sound driver for the Atmel AC97 controller.
 +
-+		ret = -1;
-+		if (ep->index == 0)
-+			ret = handle_ep0_setup(udc, ep, &crq.crq);
-+		else
-+			ret = udc->driver->setup(&udc->gadget, &crq.crq);
++endmenu
+diff --git a/sound/avr32/Makefile b/sound/avr32/Makefile
+new file mode 100644
+index 0000000..5d87d0e
+--- /dev/null
++++ b/sound/avr32/Makefile
+@@ -0,0 +1,3 @@
++snd-atmel-ac97-objs		:= ac97c.o
++
++obj-$(CONFIG_SND_ATMEL_AC97)	+= snd-atmel-ac97.o
+diff --git a/sound/avr32/ac97c.c b/sound/avr32/ac97c.c
+new file mode 100644
+index 0000000..0ec0b1c
+--- /dev/null
++++ b/sound/avr32/ac97c.c
+@@ -0,0 +1,914 @@
++/*
++ * Driver for the Atmel AC97 controller
++ *
++ * Copyright (C) 2005-2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/mutex.h>
++#include <linux/io.h>
 +
-+		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
-+		    crq.crq.bRequestType, crq.crq.bRequest,
-+		    le16_to_cpu(crq.crq.wLength), ep->state, ret);
++#include <sound/driver.h>
++#include <sound/core.h>
++#include <sound/initval.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/ac97_codec.h>
++#include <sound/memalloc.h>
 +
-+		if (ret < 0) {
-+			/* Let the host know that we failed */
-+			set_protocol_stall(udc, ep);
-+		}
-+	}
-+}
++#include <asm/dma-controller.h>
 +
-+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
-+{
-+	struct usba_request *req;
-+	u32 epstatus;
-+	u32 epctrl;
++#include "ac97c.h"
 +
-+	epstatus = usba_ep_readl(ep, STA);
-+	epctrl = usba_ep_readl(ep, CTL);
++/* Serialize access to opened */
++static DEFINE_MUTEX(opened_mutex);
 +
-+	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n",
-+	    ep_name(ep), epstatus);
++struct atmel_ac97_dma_info {
++	struct dma_request_cyclic req_tx;
++	struct dma_request_cyclic req_rx;
++	unsigned short rx_periph_id;
++	unsigned short tx_periph_id;
++};
 +
-+	while ((epctrl & USBA_BIT(TX_PK_RDY))
-+	       && !(epstatus & USBA_BIT(TX_PK_RDY))) {
-+		DBG(DBG_BUS, "%s: TX PK ready\n", ep_name(ep));
++struct atmel_ac97 {
++	/* Serialize access to opened */
++	spinlock_t lock;
++	void __iomem *regs;
++	struct snd_pcm_substream *playback_substream;
++	struct snd_pcm_substream *capture_substream;
++	struct snd_card *card;
++	struct snd_pcm *pcm;
++	struct snd_ac97 *ac97;
++	struct snd_ac97_bus *ac97_bus;
++	int opened;
++	int period;
++	u64 cur_format;
++	unsigned int cur_rate;
++	struct clk *mck;
++	struct platform_device *pdev;
++	struct atmel_ac97_dma_info dma;
++};
 +
-+		if (list_empty(&ep->queue)) {
-+			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
-+			usba_ep_writel(ep, CTL_DIS, USBA_BIT(TX_PK_RDY));
-+			return;
-+		}
++#define get_chip(card) ((struct atmel_ac97 *)(card)->private_data)
 +
-+		req = list_entry(ep->queue.next, struct usba_request, queue);
++#define ac97c_writel(chip, reg, val)			\
++	__raw_writel((val), (chip)->regs + AC97C_##reg)
++#define ac97c_readl(chip, reg)				\
++	__raw_readl((chip)->regs + AC97C_##reg)
 +
-+		if (req->using_dma) {
-+			/* Send a zero-length packet */
-+			usba_ep_writel(ep, SET_STA,
-+					USBA_BIT(TX_PK_RDY));
-+			usba_ep_writel(ep, CTL_DIS,
-+					USBA_BIT(TX_PK_RDY));
-+			list_del_init(&req->queue);
-+			submit_next_request(ep);
-+			request_complete(ep, req, 0);
-+		} else {
-+			if (req->submitted)
-+				next_fifo_transaction(ep, req);
-+			else
-+				submit_request(ep, req);
++/*
++ * PCM part
++ */
++static struct snd_pcm_hardware snd_atmel_ac97_playback_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 6,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
 +
-+			if (req->last_transaction) {
-+				list_del_init(&req->queue);
-+				submit_next_request(ep);
-+				request_complete(ep, req, 0);
-+			}
-+		}
++static struct snd_pcm_hardware snd_atmel_ac97_capture_hw = {
++	.info			= (SNDRV_PCM_INFO_INTERLEAVED
++				  | SNDRV_PCM_INFO_MMAP
++				  | SNDRV_PCM_INFO_MMAP_VALID
++				  | SNDRV_PCM_INFO_BLOCK_TRANSFER
++				  | SNDRV_PCM_INFO_JOINT_DUPLEX),
++	.formats		= (SNDRV_PCM_FMTBIT_S16_BE
++				  | SNDRV_PCM_FMTBIT_S16_LE),
++	.rates			= (SNDRV_PCM_RATE_CONTINUOUS),
++	.rate_min		= 4000,
++	.rate_max		= 48000,
++	.channels_min		= 1,
++	.channels_max		= 2,
++	.buffer_bytes_max	= 64*1024,
++	.period_bytes_min	= 512,
++	.period_bytes_max	= 4095,
++	.periods_min		= 8,
++	.periods_max		= 1024,
++};
 +
-+		epstatus = usba_ep_readl(ep, STA);
-+		epctrl = usba_ep_readl(ep, CTL);
-+	}
-+	if ((epstatus & epctrl) & USBA_BIT(RX_BK_RDY)) {
-+		DBG(DBG_BUS, "%s: RX data ready\n", ep_name(ep));
-+		receive_data(ep);
-+		usba_ep_writel(ep, CLR_STA, USBA_BIT(RX_BK_RDY));
-+	}
++/*
++ * PCM functions
++ */
++static int
++snd_atmel_ac97_playback_open(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_playback_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->playback_substream = substream;
++	chip->period = 0;
++	return 0;
 +}
 +
-+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
++static int
++snd_atmel_ac97_capture_open(struct snd_pcm_substream *substream)
 +{
-+	struct usba_request *req;
-+	u32 status, control, pending;
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
 +
-+	status = usba_dma_readl(ep, STATUS);
-+	control = usba_dma_readl(ep, CONTROL);
-+#ifdef CONFIG_DEBUG_FS
-+	ep->last_dma_status = status;
-+#endif
-+	pending = status & control;
-+	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n",
-+	    status, control);
++	mutex_lock(&opened_mutex);
++	chip->opened++;
++	runtime->hw = snd_atmel_ac97_capture_hw;
++	if (chip->cur_rate) {
++		runtime->hw.rate_min = chip->cur_rate;
++		runtime->hw.rate_max = chip->cur_rate;
++	}
++	if (chip->cur_format)
++		runtime->hw.formats = (1ULL << chip->cur_format);
++	mutex_unlock(&opened_mutex);
++	chip->capture_substream = substream;
++	chip->period = 0;
++	return 0;
++}
 +
-+	if (status & USBA_BIT(DMA_CH_EN)) {
-+		dev_err(&udc->pdev->dev,
-+			"DMA_CH_EN is set after transfer is finished!\n");
-+		dev_err(&udc->pdev->dev,
-+		       "status=%#08x, pending=%#08x, control=%#08x\n",
-+		       status, pending, control);
++static int snd_atmel_ac97_playback_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
++	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
 +
-+		/*
-+		 * try to pretend nothing happened. We might have to
-+		 * do something here...
-+		 */
++static int snd_atmel_ac97_capture_close(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	mutex_lock(&opened_mutex);
++	chip->opened--;
++	if (!chip->opened) {
++		chip->cur_rate = 0;
++		chip->cur_format = 0;
 +	}
++	mutex_unlock(&opened_mutex);
++	return 0;
++}
 +
-+	if (list_empty(&ep->queue))
-+		/* Might happen if a reset comes along at the right moment */
-+		return;
++static int
++snd_atmel_ac97_playback_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
 +
-+	if (pending & (USBA_BIT(DMA_END_TR_ST) | USBA_BIT(DMA_END_BUF_ST))) {
-+		req = list_entry(ep->queue.next, struct usba_request, queue);
-+		usba_update_req(ep, req, status);
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
 +
-+		list_del_init(&req->queue);
-+		submit_next_request(ep);
-+		request_complete(ep, req, 0);
-+	}
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
 +}
 +
-+static irqreturn_t usba_udc_irq(int irq, void *devid)
++static int
++snd_atmel_ac97_capture_hw_params(struct snd_pcm_substream *substream,
++		struct snd_pcm_hw_params *hw_params)
 +{
-+	struct usba_udc *udc = devid;
-+	u32 status;
-+	u32 dma_status;
-+	u32 ep_status;
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	int err;
++
++	err = snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++	if (err < 0)
++		return err;
++
++	/* Set restrictions to params */
++	mutex_lock(&opened_mutex);
++	chip->cur_rate = params_rate(hw_params);
++	chip->cur_format = params_format(hw_params);
++	mutex_unlock(&opened_mutex);
++
++	return 0;
++}
 +
-+	spin_lock(&udc->lock);
++static int snd_atmel_ac97_playback_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
 +
-+	status = usba_readl(udc, INT_STA);
-+	DBG(DBG_INT, "irq, status=%#08x\n", status);
++static int snd_atmel_ac97_capture_hw_free(struct snd_pcm_substream *substream)
++{
 +
-+	if (status & USBA_BIT(DET_SUSPEND)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(DET_SUSPEND));
-+		DBG(DBG_BUS, "Suspend detected\n");
-+		if (udc->gadget.speed != USB_SPEED_UNKNOWN
-+		    && udc->driver && udc->driver->suspend)
-+			udc->driver->suspend(&udc->gadget);
-+	}
++	return snd_pcm_lib_free_pages(substream);
++}
 +
-+	if (status & USBA_BIT(WAKE_UP)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(WAKE_UP));
-+		DBG(DBG_BUS, "Wake Up CPU detected\n");
-+	}
++static int snd_atmel_ac97_playback_prepare(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
 +
-+	if (status & USBA_BIT(END_OF_RESUME)) {
-+		usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESUME));
-+		DBG(DBG_BUS, "Resume detected\n");
-+		if (udc->gadget.speed != USB_SPEED_UNKNOWN
-+		    && udc->driver && udc->driver->resume)
-+			udc->driver->resume(&udc->gadget);
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_TO_DEVICE);
++
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
 +	}
++	ac97c_writel(chip, OCA, word);
 +
-+	dma_status = USBA_BFEXT(DMA_INT, status);
-+	if (dma_status) {
-+		int i;
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
 +
-+		for (i = 1; i < USBA_NR_ENDPOINTS; i++)
-+			if (dma_status & (1 << i))
-+				usba_dma_irq(udc, &usba_ep[i]);
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
++	default:
++		word &= ~AC97C_CMR_CEM_LITTLE;
++		break;
 +	}
 +
-+	ep_status = USBA_BFEXT(EPT_INT, status);
-+	if (ep_status) {
-+		int i;
++	ac97c_writel(chip, CAMR, word);
 +
-+		for (i = 0; i < USBA_NR_ENDPOINTS; i++)
-+			if (ep_status & (1 << i)) {
-+				if (ep_is_control(&usba_ep[i]))
-+					usba_control_irq(udc, &usba_ep[i]);
-+				else
-+					usba_ep_irq(udc, &usba_ep[i]);
-+			}
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
 +	}
 +
-+	if (status & USBA_BIT(END_OF_RESET)) {
-+		struct usba_ep *ep0;
-+
-+		usba_writel(udc, INT_CLR, USBA_BIT(END_OF_RESET));
-+		reset_all_endpoints(udc);
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE, runtime->rate);
 +
-+		if (status & USBA_BIT(HIGH_SPEED)) {
-+			DBG(DBG_BUS, "High-speed bus reset detected\n");
-+			udc->gadget.speed = USB_SPEED_HIGH;
-+		} else {
-+			DBG(DBG_BUS, "Full-speed bus reset detected\n");
-+			udc->gadget.speed = USB_SPEED_FULL;
-+		}
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
 +
-+		ep0 = &usba_ep[0];
-+		ep0->desc = &usba_ep0_desc;
-+		ep0->state = WAIT_FOR_SETUP;
-+		usba_ep_writel(ep0, CFG,
-+			       (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
-+				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
-+				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
-+		usba_ep_writel(ep0, CTL_ENB,
-+			       USBA_BIT(EPT_ENABLE) | USBA_BIT(RX_SETUP));
-+		usba_writel(udc, INT_ENB, (usba_readl(udc, INT_ENB)
-+					   | USBA_BF(EPT_INT, 1)
-+					   | USBA_BIT(DET_SUSPEND)
-+					   | USBA_BIT(END_OF_RESUME)));
++	chip->dma.req_tx.buffer_size = buffer_size;
++	chip->dma.req_tx.periods = runtime->periods;
 +
-+		if (!(usba_ep_readl(ep0, CFG) & USBA_BIT(EPT_MAPPED)))
-+			dev_warn(&udc->pdev->dev,
-+				 "WARNING: EP0 configuration is invalid!\n");
-+	}
++	BUG_ON(chip->dma.req_tx.buffer_size !=
++			(chip->dma.req_tx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
 +
-+	spin_unlock(&udc->lock);
++	chip->dma.req_tx.buffer_start = runtime->dma_addr;
++	chip->dma.req_tx.data_reg = (dma_addr_t)(chip->regs + AC97C_CATHR + 2);
++	chip->dma.req_tx.periph_id = chip->dma.tx_periph_id;
++	chip->dma.req_tx.direction = DMA_DIR_MEM_TO_PERIPH;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.dev_id = chip;
 +
-+	return IRQ_HANDLED;
++	return 0;
 +}
 +
-+static irqreturn_t usba_vbus_irq(int irq, void *devid)
++static int snd_atmel_ac97_capture_prepare(struct snd_pcm_substream *substream)
 +{
-+	struct usba_udc *udc = devid;
-+	int vbus;
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct platform_device *pdev = chip->pdev;
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size = frames_to_bytes(runtime, runtime->period_size);
++	unsigned long word = 0;
++	unsigned long buffer_size = 0;
 +
-+	/* debounce */
-+	udelay(10);
++	dma_sync_single_for_device(&pdev->dev, runtime->dma_addr,
++			block_size * 2, DMA_FROM_DEVICE);
 +
-+	spin_lock(&udc->lock);
-+	vbus = gpio_get_value(udc->vbus_pin);
-+	if (vbus != udc->vbus_prev) {
-+		if (vbus) {
-+			usba_writel(udc, CTRL, USBA_BIT(EN_USBA));
-+			usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET));
-+		} else {
-+			udc->gadget.speed = USB_SPEED_UNKNOWN;
-+			reset_all_endpoints(udc);
-+			usba_writel(udc, CTRL, 0);
-+			if (udc->driver)
-+				udc->driver->disconnect(&udc->gadget);
-+		}
-+		udc->vbus_prev = vbus;
++	/* Assign slots to channels */
++	switch (substream->runtime->channels) {
++	case 1:
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
++		break;
++	case 2:
++		/* Assign Left and Right slot to Channel A */
++		word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
++			| AC97C_CH_ASSIGN(PCM_RIGHT, A);
++		break;
++	default:
++		/* TODO: support more than two channels */
++		return -EINVAL;
++		break;
 +	}
-+	spin_unlock(&udc->lock);
++	ac97c_writel(chip, ICA, word);
 +
-+	return IRQ_HANDLED;
-+}
++	/* Configure sample format and size */
++	word = AC97C_CMR_PDCEN | AC97C_CMR_SIZE_16;
 +
-+int usb_gadget_register_driver(struct usb_gadget_driver *driver)
-+{
-+	struct usba_udc *udc = &the_udc;
-+	unsigned long flags;
-+	int ret;
++	switch (runtime->format) {
++	case SNDRV_PCM_FORMAT_S16_LE:
++		word |= AC97C_CMR_CEM_LITTLE;
++		break;
++	case SNDRV_PCM_FORMAT_S16_BE:
++	default:
++		word &= ~(AC97C_CMR_CEM_LITTLE);
++		break;
++	}
 +
-+	if (!udc->pdev)
-+		return -ENODEV;
++	ac97c_writel(chip, CAMR, word);
 +
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (udc->driver) {
-+		spin_unlock_irqrestore(&udc->lock, flags);
-+		return -EBUSY;
++	/* Set variable rate if needed */
++	if (runtime->rate != 48000) {
++		word = ac97c_readl(chip, MR);
++		word |= AC97C_MR_VRA;
++		ac97c_writel(chip, MR, word);
++	} else {
++		/* Clear Variable Rate Bit */
++		word = ac97c_readl(chip, MR);
++		word &= ~(AC97C_MR_VRA);
++		ac97c_writel(chip, MR, word);
 +	}
 +
-+	udc->driver = driver;
-+	udc->gadget.dev.driver = &driver->driver;
-+	spin_unlock_irqrestore(&udc->lock, flags);
-+
-+	clk_enable(udc->pclk);
-+	clk_enable(udc->hclk);
++	/* Set rate */
++	snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
 +
-+	ret = driver->bind(&udc->gadget);
-+	if (ret) {
-+		DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
-+		    driver->driver.name, ret);
-+		goto err_driver_bind;
-+	}
++	buffer_size = frames_to_bytes(runtime, runtime->period_size) *
++		runtime->periods;
 +
-+	DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
++	chip->dma.req_rx.buffer_size = buffer_size;
++	chip->dma.req_rx.periods = runtime->periods;
 +
-+	udc->vbus_prev = 0;
-+	if (udc->vbus_pin != -1) {
-+		ret = request_irq(gpio_to_irq(udc->vbus_pin),
-+				  usba_vbus_irq, 0, "atmel_usba_udc", udc);
-+		if (ret) {
-+			gpio_free(udc->vbus_pin);
-+			udc->vbus_pin = -1;
-+			dev_warn(&udc->pdev->dev,
-+				 "failed to request vbus irq; "
-+				 "assuming always on\n");
-+		}
-+	}
++	BUG_ON(chip->dma.req_rx.buffer_size !=
++			(chip->dma.req_rx.periods *
++			 frames_to_bytes(runtime, runtime->period_size)));
 +
-+	/* If Vbus is present, enable the controller and wait for reset */
-+	spin_lock_irqsave(&udc->lock, flags);
-+	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
-+		usba_writel(udc, CTRL, USBA_BIT(EN_USBA));
-+		usba_writel(udc, INT_ENB, USBA_BIT(END_OF_RESET));
-+	}
-+	spin_unlock_irqrestore(&udc->lock, flags);
++	chip->dma.req_rx.buffer_start = runtime->dma_addr;
++	chip->dma.req_rx.data_reg = (dma_addr_t)(chip->regs + AC97C_CARHR + 2);
++	chip->dma.req_rx.periph_id = chip->dma.rx_periph_id;
++	chip->dma.req_rx.direction = DMA_DIR_PERIPH_TO_MEM;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.dev_id = chip;
 +
 +	return 0;
-+
-+err_driver_bind:
-+	udc->driver = NULL;
-+	udc->gadget.dev.driver = NULL;
-+	return ret;
 +}
-+EXPORT_SYMBOL(usb_gadget_register_driver);
 +
-+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
++	static int
++snd_atmel_ac97_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 +{
-+	struct usba_udc *udc = &the_udc;
-+	unsigned long flags;
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
 +
-+	if (!udc->pdev)
-+		return -ENODEV;
-+	if (driver != udc->driver)
-+		return -EINVAL;
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
 +
-+	if (udc->vbus_pin != -1)
-+		free_irq(gpio_to_irq(udc->vbus_pin), udc);
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_tx.req.dmac,
++				&chip->dma.req_tx);
++		dma_start_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
 +
-+	spin_lock_irqsave(&udc->lock, flags);
-+	udc->gadget.speed = USB_SPEED_UNKNOWN;
-+	reset_all_endpoints(udc);
-+	spin_unlock_irqrestore(&udc->lock, flags);
++	ac97c_writel(chip, CAMR, camr);
 +
-+	/* This will also disable the DP pullup */
-+	usba_writel(udc, CTRL, 0);
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
++}
 +
-+	driver->unbind(&udc->gadget);
-+	udc->gadget.dev.driver = NULL;
-+	udc->driver = NULL;
++	static int
++snd_atmel_ac97_capture_trigger(struct snd_pcm_substream *substream, int cmd)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	unsigned long camr;
++	int flags, err = 0;
 +
-+	clk_disable(udc->hclk);
-+	clk_disable(udc->pclk);
++	spin_lock_irqsave(&chip->lock, flags);
++	camr = ac97c_readl(chip, CAMR);
 +
-+	DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		err = dma_prepare_request_cyclic(chip->dma.req_rx.req.dmac,
++				&chip->dma.req_rx);
++		dma_start_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		camr |= AC97C_CMR_CENA;
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		err = dma_stop_request(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++		mutex_lock(&opened_mutex);
++		if (chip->opened <= 1)
++			camr &= ~AC97C_CMR_CENA;
++		mutex_unlock(&opened_mutex);
++		break;
++	default:
++		err = -EINVAL;
++		break;
++	}
 +
-+	return 0;
++	ac97c_writel(chip, CAMR, camr);
++
++	spin_unlock_irqrestore(&chip->lock, flags);
++	return err;
 +}
-+EXPORT_SYMBOL(usb_gadget_unregister_driver);
 +
-+static int __devinit usba_udc_probe(struct platform_device *pdev)
++	static snd_pcm_uframes_t
++snd_atmel_ac97_playback_pointer(struct snd_pcm_substream *substream)
 +{
-+	struct usba_platform_data *pdata = pdev->dev.platform_data;
-+	struct resource *regs, *fifo;
-+	struct clk *pclk, *hclk;
-+	struct usba_udc *udc = &the_udc;
-+	int irq, ret, i;
-+
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
-+	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
-+	if (!regs || !fifo)
-+		return -ENXIO;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0)
-+		return irq;
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
 +
-+	pclk = clk_get(&pdev->dev, "pclk");
-+	if (IS_ERR(pclk))
-+		return PTR_ERR(pclk);
-+	hclk = clk_get(&pdev->dev, "hclk");
-+	if (IS_ERR(hclk)) {
-+		ret = PTR_ERR(hclk);
-+		goto err_get_hclk;
-+	}
++	bytes = (dma_get_current_pos
++			(chip->dma.req_tx.req.dmac,
++			 chip->dma.req_tx.req.channel) - runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
 +
-+	udc->pdev = pdev;
-+	udc->pclk = pclk;
-+	udc->hclk = hclk;
-+	udc->vbus_pin = -1;
++	return pos;
++}
 +
-+	ret = -ENOMEM;
-+	udc->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!udc->regs) {
-+		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
-+		goto err_map_regs;
-+	}
-+	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
-+		 (unsigned long)regs->start, udc->regs);
-+	udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1);
-+	if (!udc->fifo) {
-+		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
-+		goto err_map_fifo;
-+	}
-+	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
-+		 (unsigned long)fifo->start, udc->fifo);
++	static snd_pcm_uframes_t
++snd_atmel_ac97_capture_pointer(struct snd_pcm_substream *substream)
++{
++	struct atmel_ac97 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
 +
-+	device_initialize(&udc->gadget.dev);
-+	udc->gadget.dev.parent = &pdev->dev;
-+	udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
++	bytes = (dma_get_current_pos
++			(chip->dma.req_rx.req.dmac,
++			 chip->dma.req_rx.req.channel)
++			- runtime->dma_addr);
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
 +
-+	platform_set_drvdata(pdev, udc);
 +
-+	/* Make sure we start from a clean slate */
-+	clk_enable(pclk);
-+	usba_writel(udc, CTRL, 0);
-+	clk_disable(pclk);
++	return pos;
++}
 +
-+	INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
-+	usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
-+	usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
-+	usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
-+		struct usba_ep *ep = &usba_ep[i];
++static struct snd_pcm_ops atmel_ac97_playback_ops = {
++	.open		= snd_atmel_ac97_playback_open,
++	.close		= snd_atmel_ac97_playback_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_playback_hw_params,
++	.hw_free	= snd_atmel_ac97_playback_hw_free,
++	.prepare	= snd_atmel_ac97_playback_prepare,
++	.trigger	= snd_atmel_ac97_playback_trigger,
++	.pointer	= snd_atmel_ac97_playback_pointer,
++};
 +
-+		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
-+		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
-+		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
++static struct snd_pcm_ops atmel_ac97_capture_ops = {
++	.open		= snd_atmel_ac97_capture_open,
++	.close		= snd_atmel_ac97_capture_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_atmel_ac97_capture_hw_params,
++	.hw_free	= snd_atmel_ac97_capture_hw_free,
++	.prepare	= snd_atmel_ac97_capture_prepare,
++	.trigger	= snd_atmel_ac97_capture_trigger,
++	.pointer	= snd_atmel_ac97_capture_pointer,
++};
 +
-+		list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
-+	}
++static struct ac97_pcm atmel_ac97_pcm_defs[] __devinitdata = {
++	/* Playback */
++	{
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)
++					| (1 << AC97_SLOT_PCM_CENTER)
++					| (1 << AC97_SLOT_PCM_SLEFT)
++					| (1 << AC97_SLOT_PCM_SRIGHT)
++					| (1 << AC97_SLOT_LFE)),
++		} }
++	},
++	/* PCM in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = ((1 << AC97_SLOT_PCM_LEFT)
++					| (1 << AC97_SLOT_PCM_RIGHT)),
++		} }
++	},
++	/* Mic in */
++	{
++		.stream = 1,
++		.exclusive = 1,
++		.r = { {
++			.slots = (1<<AC97_SLOT_MIC),
++		} }
++	},
++};
 +
-+	ret = request_irq(irq, usba_udc_irq, IRQF_SAMPLE_RANDOM,
-+			  "atmel_usba_udc", udc);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
-+			irq, ret);
-+		goto err_request_irq;
-+	}
-+	udc->irq = irq;
++static int __devinit snd_atmel_ac97_pcm_new(struct atmel_ac97 *chip)
++{
++	struct snd_pcm *pcm;
++	int err;
 +
-+	ret = device_add(&udc->gadget.dev);
-+	if (ret) {
-+		dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
-+		goto err_device_add;
-+	}
++	err = snd_ac97_pcm_assign(chip->ac97_bus,
++			ARRAY_SIZE(atmel_ac97_pcm_defs),
++			atmel_ac97_pcm_defs);
++	if (err)
++		return err;
 +
-+	if (pdata && pdata->vbus_pin != GPIO_PIN_NONE)
-+		if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc"))
-+			udc->vbus_pin = pdata->vbus_pin;
++	err = snd_pcm_new(chip->card, "Atmel-AC97", 0, 1, 1, &pcm);
++	if (err)
++		return err;
 +
-+	usba_init_debugfs(udc);
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
-+		usba_ep_init_debugfs(udc, &usba_ep[i]);
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
++			&atmel_ac97_playback_ops);
++
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
++			&atmel_ac97_capture_ops);
++
++	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
++			&chip->pdev->dev,
++			128 * 1024, 128 * 1024);
++
++	pcm->private_data = chip;
++	pcm->info_flags = 0;
++	strcpy(pcm->name, "Atmel-AC97");
++	chip->pcm = pcm;
 +
 +	return 0;
++}
 +
-+err_device_add:
-+	free_irq(irq, udc);
-+err_request_irq:
-+	iounmap(udc->fifo);
-+err_map_fifo:
-+	iounmap(udc->regs);
-+err_map_regs:
-+	clk_put(hclk);
-+err_get_hclk:
-+	clk_put(pclk);
++/*
++ * Mixer part.
++ */
++static int snd_atmel_ac97_mixer_new(struct atmel_ac97 *chip)
++{
++	int err;
++	struct snd_ac97_template template;
 +
-+	platform_set_drvdata(pdev, NULL);
++	memset(&template, 0, sizeof(template));
++	template.private_data = chip;
++	err = snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
 +
-+	return ret;
++	return err;
 +}
 +
-+static int __devexit usba_udc_remove(struct platform_device *pdev)
++static void atmel_ac97_error(struct dma_request *_req)
 +{
-+	struct usba_udc *udc;
-+	int i;
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
 +
-+	udc = platform_get_drvdata(pdev);
++	dev_dbg(&chip->pdev->dev, "DMA Controller error, channel %d\n",
++			req->req.channel);
++}
 +
-+	for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
-+		usba_ep_cleanup_debugfs(&usba_ep[i]);
-+	usba_cleanup_debugfs(udc);
++static void atmel_ac97_block_complete(struct dma_request *_req)
++{
++	struct dma_request_cyclic *req = to_dma_request_cyclic(_req);
++	struct atmel_ac97 *chip = req->dev_id;
++	if (req->periph_id == chip->dma.tx_periph_id)
++		snd_pcm_period_elapsed(chip->playback_substream);
++	else
++		snd_pcm_period_elapsed(chip->capture_substream);
++}
 +
-+	if (udc->vbus_pin != -1)
-+		gpio_free(udc->vbus_pin);
++/*
++ * Codec part.
++ */
++static void snd_atmel_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
++		unsigned short val)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
 +
-+	free_irq(udc->irq, udc);
-+	iounmap(udc->fifo);
-+	iounmap(udc->regs);
-+	clk_put(udc->hclk);
-+	clk_put(udc->pclk);
++	word = (reg & 0x7f) << 16 | val;
 +
-+	device_unregister(&udc->gadget.dev);
++	do {
++		if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
++			ac97c_writel(chip, COTHR, word);
++			return;
++		}
++		udelay(1);
++	} while (--timeout);
 +
-+	return 0;
++	dev_dbg(&chip->pdev->dev, "codec write timeout\n");
 +}
 +
-+static struct platform_driver udc_driver = {
-+	.probe		= usba_udc_probe,
-+	.remove		= __devexit_p(usba_udc_remove),
-+	.driver		= {
-+		.name		= "atmel_usba_udc",
-+	},
-+};
++static unsigned short snd_atmel_ac97_read(struct snd_ac97 *ac97,
++		unsigned short reg)
++{
++	struct atmel_ac97 *chip = get_chip(ac97);
++	unsigned long word;
++	int timeout = 40;
++	int write = 10;
 +
-+static int __init udc_init(void)
++	word = (0x80 | (reg & 0x7f)) << 16;
++
++	if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
++		ac97c_readl(chip, CORHR);
++
++retry_write:
++	timeout = 40;
++
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
++			ac97c_writel(chip, COTHR, word);
++			goto read_reg;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++read_reg:
++	do {
++		if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
++			unsigned short val = ac97c_readl(chip, CORHR);
++			return val;
++		}
++		mdelay(10);
++	} while (--timeout);
++
++	if (!--write)
++		goto timed_out;
++	goto retry_write;
++
++timed_out:
++	dev_dbg(&chip->pdev->dev, "codec read timeout\n");
++	return 0xffff;
++}
++
++static void snd_atmel_ac97_reset(struct atmel_ac97 *chip)
 +{
-+	return platform_driver_register(&udc_driver);
++	ac97c_writel(chip, MR, AC97C_MR_WRST);
++	mdelay(1);
++	ac97c_writel(chip, MR, AC97C_MR_ENA);
 +}
-+module_init(udc_init);
 +
-+static void __exit udc_exit(void)
++static void snd_atmel_ac97_destroy(struct snd_card *card)
 +{
-+	platform_driver_unregister(&udc_driver);
++	struct atmel_ac97 *chip = get_chip(card);
++
++	if (chip->regs)
++		iounmap(chip->regs);
++
++	if (chip->mck) {
++		clk_disable(chip->mck);
++		clk_put(chip->mck);
++	}
++
++	if (chip->dma.req_tx.req.dmac) {
++		dma_release_channel(chip->dma.req_tx.req.dmac,
++				chip->dma.req_tx.req.channel);
++	}
++	if (chip->dma.req_rx.req.dmac) {
++		dma_release_channel(chip->dma.req_rx.req.dmac,
++				chip->dma.req_rx.req.channel);
++	}
 +}
-+module_exit(udc_exit);
 +
-+MODULE_DESCRIPTION("Atmel USBA UDC driver");
-+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.h linux-avr32.git/drivers/usb/gadget/atmel_usba_udc.h
---- linux-2.6.22.1/drivers/usb/gadget/atmel_usba_udc.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/usb/gadget/atmel_usba_udc.h	2007-07-12 14:00:19.000000000 +0200
-@@ -0,0 +1,402 @@
-+/*
-+ * Driver for the Atmel USBA high speed USB device controller
-+ *
-+ * Copyright (C) 2005-2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__
-+#define __LINUX_USB_GADGET_USBA_UDC_H__
++static int __devinit snd_atmel_ac97_create(struct snd_card *card,
++		struct platform_device *pdev)
++{
++	static struct snd_ac97_bus_ops ops = {
++		.write	= snd_atmel_ac97_write,
++		.read	= snd_atmel_ac97_read,
++	};
++	struct atmel_ac97 *chip = get_chip(card);
++	struct resource *regs;
++	struct clk *mck;
++	int err;
 +
-+/* USB register offsets */
-+#define USBA_CTRL				0x0000
-+#define USBA_FNUM				0x0004
-+#define USBA_INT_ENB				0x0010
-+#define USBA_INT_STA				0x0014
-+#define USBA_INT_CLR				0x0018
-+#define USBA_EPT_RST				0x001c
-+#define USBA_TST_SOF_CNT			0x00d0
-+#define USBA_TST_CNT_A				0x00d4
-+#define USBA_TST_CNT_B				0x00d8
-+#define USBA_TST_MODE_REG			0x00dc
-+#define USBA_TST				0x00e0
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
 +
-+/* USB endpoint register offsets */
-+#define USBA_EPT_CFG				0x0000
-+#define USBA_EPT_CTL_ENB			0x0004
-+#define USBA_EPT_CTL_DIS			0x0008
-+#define USBA_EPT_CTL				0x000c
-+#define USBA_EPT_SET_STA			0x0014
-+#define USBA_EPT_CLR_STA			0x0018
-+#define USBA_EPT_STA				0x001c
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	clk_enable(mck);
++	chip->mck = mck;
 +
-+/* USB DMA register offsets */
-+#define USBA_DMA_NXT_DSC			0x0000
-+#define USBA_DMA_ADDRESS			0x0004
-+#define USBA_DMA_CONTROL			0x0008
-+#define USBA_DMA_STATUS				0x000c
++	card->private_free = snd_atmel_ac97_destroy;
 +
-+/* Bitfields in CTRL */
-+#define USBA_DEV_ADDR_OFFSET			0
-+#define USBA_DEV_ADDR_SIZE			7
-+#define USBA_FADDR_EN_OFFSET			7
-+#define USBA_FADDR_EN_SIZE			1
-+#define USBA_EN_USBA_OFFSET			8
-+#define USBA_EN_USBA_SIZE			1
-+#define USBA_DETACH_OFFSET			9
-+#define USBA_DETACH_SIZE			1
-+#define USBA_REMOTE_WAKE_UP_OFFSET		10
-+#define USBA_REMOTE_WAKE_UP_SIZE		1
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->pdev = pdev;
 +
-+/* Bitfields in FNUM */
-+#define USBA_MICRO_FRAME_NUM_OFFSET		0
-+#define USBA_MICRO_FRAME_NUM_SIZE		3
-+#define USBA_FRAME_NUMBER_OFFSET		3
-+#define USBA_FRAME_NUMBER_SIZE			11
-+#define USBA_FRAME_NUM_ERROR_OFFSET		31
-+#define USBA_FRAME_NUM_ERROR_SIZE		1
++	chip->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!chip->regs)
++		return -ENOMEM;
 +
-+/* Bitfields in INT_ENB/INT_STA/INT_CLR */
-+#define USBA_HIGH_SPEED_OFFSET			0
-+#define USBA_HIGH_SPEED_SIZE			1
-+#define USBA_DET_SUSPEND_OFFSET			1
-+#define USBA_DET_SUSPEND_SIZE			1
-+#define USBA_MICRO_SOF_OFFSET			2
-+#define USBA_MICRO_SOF_SIZE			1
-+#define USBA_SOF_OFFSET				3
-+#define USBA_SOF_SIZE				1
-+#define USBA_END_OF_RESET_OFFSET		4
-+#define USBA_END_OF_RESET_SIZE			1
-+#define USBA_WAKE_UP_OFFSET			5
-+#define USBA_WAKE_UP_SIZE			1
-+#define USBA_END_OF_RESUME_OFFSET		6
-+#define USBA_END_OF_RESUME_SIZE			1
-+#define USBA_UPSTREAM_RESUME_OFFSET		7
-+#define USBA_UPSTREAM_RESUME_SIZE		1
-+#define USBA_EPT_INT_OFFSET			8
-+#define USBA_EPT_INT_SIZE			16
-+#define USBA_DMA_INT_OFFSET			24
-+#define USBA_DMA_INT_SIZE			8
++	snd_card_set_dev(card, &pdev->dev);
 +
-+/* Bitfields in EPT_RST */
-+#define USBA_RST_OFFSET				0
-+#define USBA_RST_SIZE				16
++	err = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
 +
-+/* Bitfields in TST_SOF_CNT */
-+#define USBA_SOF_CNT_MAX_OFFSET			0
-+#define USBA_SOF_CNT_MAX_SIZE			7
-+#define USBA_SOF_CNT_LOAD_OFFSET		7
-+#define USBA_SOF_CNT_LOAD_SIZE			1
++	return err;
++}
 +
-+/* Bitfields in TST_CNT_A */
-+#define USBA_CNT_A_MAX_OFFSET			0
-+#define USBA_CNT_A_MAX_SIZE			7
-+#define USBA_CNT_A_LOAD_OFFSET			7
-+#define USBA_CNT_A_LOAD_SIZE			1
++static int __devinit snd_atmel_ac97_probe(struct platform_device *pdev)
++{
++	static int dev;
++	struct snd_card *card;
++	struct atmel_ac97 *chip;
++	int err;
++	int ch;
 +
-+/* Bitfields in TST_CNT_B */
-+#define USBA_CNT_B_MAX_OFFSET			0
-+#define USBA_CNT_B_MAX_SIZE			7
-+#define USBA_CNT_B_LOAD_OFFSET			7
-+#define USBA_CNT_B_LOAD_SIZE			1
++	mutex_init(&opened_mutex);
 +
-+/* Bitfields in TST_MODE_REG */
-+#define USBA_TST_MODE_OFFSET			0
-+#define USBA_TST_MODE_SIZE			6
++	err = -ENOMEM;
++	card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
++			THIS_MODULE, sizeof(struct atmel_ac97));
++	if (!card)
++		goto out;
++	chip = get_chip(card);
 +
-+/* Bitfields in USBA_TST */
-+#define USBA_SPEED_CFG_OFFSET			0
-+#define USBA_SPEED_CFG_SIZE			2
-+#define USBA_TST_J_MODE_OFFSET			2
-+#define USBA_TST_J_MODE_SIZE			1
-+#define USBA_TST_K_MODE_OFFSET			3
-+#define USBA_TST_K_MODE_SIZE			1
-+#define USBA_TST_PKT_MODE_OFFSET		4
-+#define USBA_TST_PKT_MODE_SIZE			1
-+#define USBA_OPMODE2_OFFSET			5
-+#define USBA_OPMODE2_SIZE			1
++	err = snd_atmel_ac97_create(card, pdev);
++	if (err)
++		goto out_free_card;
 +
-+/* Bitfields in EPT_CFG */
-+#define USBA_EPT_SIZE_OFFSET			0
-+#define USBA_EPT_SIZE_SIZE			3
-+#define USBA_EPT_DIR_OFFSET			3
-+#define USBA_EPT_DIR_SIZE			1
-+#define USBA_EPT_TYPE_OFFSET			4
-+#define USBA_EPT_TYPE_SIZE			2
-+#define USBA_BK_NUMBER_OFFSET			6
-+#define USBA_BK_NUMBER_SIZE			2
-+#define USBA_NB_TRANS_OFFSET			8
-+#define USBA_NB_TRANS_SIZE			2
-+#define USBA_EPT_MAPPED_OFFSET			31
-+#define USBA_EPT_MAPPED_SIZE			1
++	snd_atmel_ac97_reset(chip);
 +
-+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
-+#define USBA_EPT_ENABLE_OFFSET			0
-+#define USBA_EPT_ENABLE_SIZE			1
-+#define USBA_AUTO_VALID_OFFSET			1
-+#define USBA_AUTO_VALID_SIZE			1
-+#define USBA_INTDIS_DMA_OFFSET			3
-+#define USBA_INTDIS_DMA_SIZE			1
-+#define USBA_NYET_DIS_OFFSET			4
-+#define USBA_NYET_DIS_SIZE			1
-+#define USBA_DATAX_RX_OFFSET			6
-+#define USBA_DATAX_RX_SIZE			1
-+#define USBA_MDATA_RX_OFFSET			7
-+#define USBA_MDATA_RX_SIZE			1
-+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
-+#define USBA_BUSY_BANK_IE_OFFSET		18
-+#define USBA_BUSY_BANK_IE_SIZE			1
++	err = snd_atmel_ac97_mixer_new(chip);
++	if (err)
++		goto out_free_card;
 +
-+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
-+#define USBA_FORCE_STALL_OFFSET			5
-+#define USBA_FORCE_STALL_SIZE			1
-+#define USBA_TOGGLE_SEQ_OFFSET			6
-+#define USBA_TOGGLE_SEQ_SIZE			2
-+#define USBA_ERR_OVFLW_OFFSET			8
-+#define USBA_ERR_OVFLW_SIZE			1
-+#define USBA_RX_BK_RDY_OFFSET			9
-+#define USBA_RX_BK_RDY_SIZE			1
-+#define USBA_KILL_BANK_OFFSET			9
-+#define USBA_KILL_BANK_SIZE			1
-+#define USBA_TX_COMPLETE_OFFSET			10
-+#define USBA_TX_COMPLETE_SIZE			1
-+#define USBA_TX_PK_RDY_OFFSET			11
-+#define USBA_TX_PK_RDY_SIZE			1
-+#define USBA_ISO_ERR_TRANS_OFFSET		11
-+#define USBA_ISO_ERR_TRANS_SIZE			1
-+#define USBA_RX_SETUP_OFFSET			12
-+#define USBA_RX_SETUP_SIZE			1
-+#define USBA_ISO_ERR_FLOW_OFFSET		12
-+#define USBA_ISO_ERR_FLOW_SIZE			1
-+#define USBA_STALL_SENT_OFFSET			13
-+#define USBA_STALL_SENT_SIZE			1
-+#define USBA_ISO_ERR_CRC_OFFSET			13
-+#define USBA_ISO_ERR_CRC_SIZE			1
-+#define USBA_ISO_ERR_NBTRANS_OFFSET		13
-+#define USBA_ISO_ERR_NBTRANS_SIZE		1
-+#define USBA_NAK_IN_OFFSET			14
-+#define USBA_NAK_IN_SIZE			1
-+#define USBA_ISO_ERR_FLUSH_OFFSET		14
-+#define USBA_ISO_ERR_FLUSH_SIZE			1
-+#define USBA_NAK_OUT_OFFSET			15
-+#define USBA_NAK_OUT_SIZE			1
-+#define USBA_CURRENT_BANK_OFFSET		16
-+#define USBA_CURRENT_BANK_SIZE			2
-+#define USBA_BUSY_BANKS_OFFSET			18
-+#define USBA_BUSY_BANKS_SIZE			2
-+#define USBA_BYTE_COUNT_OFFSET			20
-+#define USBA_BYTE_COUNT_SIZE			11
-+#define USBA_SHORT_PACKET_OFFSET		31
-+#define USBA_SHORT_PACKET_SIZE			1
++	err = snd_atmel_ac97_pcm_new(chip);
++	if (err)
++		goto out_free_card;
++
++	/* TODO: Get this information from the platform device */
++	chip->dma.req_tx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_tx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for TX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.dmac = find_dma_controller(0);
++	if (!chip->dma.req_rx.req.dmac) {
++		dev_dbg(&chip->pdev->dev, "DMA controller for RX missing\n");
++		err = -ENODEV;
++		goto out_free_card;
++	}
++
++	chip->dma.rx_periph_id = 3;
++	chip->dma.tx_periph_id = 4;
++
++	ch = dma_alloc_channel(chip->dma.req_tx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate TX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_tx.req.channel = ch;
++	chip->dma.req_tx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_tx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_tx.req.error = atmel_ac97_error;
++
++	ch = dma_alloc_channel(chip->dma.req_rx.req.dmac);
++	if (ch < 0) {
++		dev_dbg(&chip->pdev->dev,
++				"could not allocate RX DMA channel\n");
++		err = ch;
++		goto out_free_card;
++	}
++	chip->dma.req_rx.req.channel = ch;
++	chip->dma.req_rx.width = DMA_WIDTH_16BIT;
++	chip->dma.req_rx.req.block_complete = atmel_ac97_block_complete;
++	chip->dma.req_rx.req.error = atmel_ac97_error;
++
++	strcpy(card->driver, "atmel_ac97c");
++	strcpy(card->shortname, "atmel_ac97c");
++	sprintf(card->longname, "Atmel AVR32 AC97 controller");
++
++	err = snd_card_register(card);
++	if (err)
++		goto out_free_card;
 +
-+/* Bitfields in DMA_CONTROL */
-+#define USBA_DMA_CH_EN_OFFSET			0
-+#define USBA_DMA_CH_EN_SIZE			1
-+#define USBA_DMA_LINK_OFFSET			1
-+#define USBA_DMA_LINK_SIZE			1
-+#define USBA_DMA_END_TR_EN_OFFSET		2
-+#define USBA_DMA_END_TR_EN_SIZE			1
-+#define USBA_DMA_END_BUF_EN_OFFSET		3
-+#define USBA_DMA_END_BUF_EN_SIZE		1
-+#define USBA_DMA_END_TR_IE_OFFSET		4
-+#define USBA_DMA_END_TR_IE_SIZE			1
-+#define USBA_DMA_END_BUF_IE_OFFSET		5
-+#define USBA_DMA_END_BUF_IE_SIZE		1
-+#define USBA_DMA_DESC_LOAD_IE_OFFSET		6
-+#define USBA_DMA_DESC_LOAD_IE_SIZE		1
-+#define USBA_DMA_BURST_LOCK_OFFSET		7
-+#define USBA_DMA_BURST_LOCK_SIZE		1
-+#define USBA_DMA_BUF_LEN_OFFSET			16
-+#define USBA_DMA_BUF_LEN_SIZE			16
++	platform_set_drvdata(pdev, card);
++	dev++;
 +
-+/* Bitfields in DMA_STATUS */
-+#define USBA_DMA_CH_ACTIVE_OFFSET		1
-+#define USBA_DMA_CH_ACTIVE_SIZE			1
-+#define USBA_DMA_END_TR_ST_OFFSET		4
-+#define USBA_DMA_END_TR_ST_SIZE			1
-+#define USBA_DMA_END_BUF_ST_OFFSET		5
-+#define USBA_DMA_END_BUF_ST_SIZE		1
-+#define USBA_DMA_DESC_LOAD_ST_OFFSET		6
-+#define USBA_DMA_DESC_LOAD_ST_SIZE		1
++	dev_info(&pdev->dev, "Atmel AVR32 AC97 controller at 0x%p\n",
++			chip->regs);
 +
-+/* Constants for SPEED_CFG */
-+#define USBA_SPEED_CFG_NORMAL			0
-+#define USBA_SPEED_CFG_FORCE_HIGH		2
-+#define USBA_SPEED_CFG_FORCE_FULL		3
++	return 0;
 +
-+/* Constants for EPT_SIZE */
-+#define USBA_EPT_SIZE_8				0
-+#define USBA_EPT_SIZE_16			1
-+#define USBA_EPT_SIZE_32			2
-+#define USBA_EPT_SIZE_64			3
-+#define USBA_EPT_SIZE_128			4
-+#define USBA_EPT_SIZE_256			5
-+#define USBA_EPT_SIZE_512			6
-+#define USBA_EPT_SIZE_1024			7
++out_free_card:
++	snd_card_free(card);
++out:
++	return err;
++}
 +
-+/* Constants for EPT_TYPE */
-+#define USBA_EPT_TYPE_CONTROL			0
-+#define USBA_EPT_TYPE_ISO			1
-+#define USBA_EPT_TYPE_BULK			2
-+#define USBA_EPT_TYPE_INT			3
++#ifdef CONFIG_PM
++	static int
++snd_atmel_ac97_suspend(struct platform_device *pdev, pm_message_t msg)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
 +
-+/* Constants for BK_NUMBER */
-+#define USBA_BK_NUMBER_ZERO			0
-+#define USBA_BK_NUMBER_ONE			1
-+#define USBA_BK_NUMBER_DOUBLE			2
-+#define USBA_BK_NUMBER_TRIPLE			3
++	clk_disable(chip->mck);
 +
-+/* Bit manipulation macros */
-+#define USBA_BIT(name)						\
-+	(1 << USBA_##name##_OFFSET)
-+#define USBA_BF(name, value)					\
-+	(((value) & ((1 << USBA_##name##_SIZE) - 1))		\
-+	 << USBA_##name##_OFFSET)
-+#define USBA_BFEXT(name, value)					\
-+	(((value) >> USBA_##name##_OFFSET)			\
-+	 & ((1 << USBA_##name##_SIZE) - 1))
-+#define USBA_BFINS(name, value, old)				\
-+	(((old) & ~(((1 << USBA_##name##_SIZE) - 1)		\
-+		    << USBA_##name##_OFFSET))			\
-+	 | USBA_BF(name, value))
++	return 0;
++}
 +
-+/* Register access macros */
-+#define usba_readl(udc, reg)					\
-+	__raw_readl((udc)->regs + USBA_##reg)
-+#define usba_writel(udc, reg, value)				\
-+	__raw_writel((value), (udc)->regs + USBA_##reg)
-+#define usba_ep_readl(ep, reg)					\
-+	__raw_readl((ep)->ep_regs + USBA_EPT_##reg)
-+#define usba_ep_writel(ep, reg, value)				\
-+	__raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg)
-+#define usba_dma_readl(ep, reg)					\
-+	__raw_readl((ep)->dma_regs + USBA_DMA_##reg)
-+#define usba_dma_writel(ep, reg, value)				\
-+	__raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)
++static int snd_atmel_ac97_resume(struct platform_device *pdev)
++{
++	struct snd_card *card = dev_get_drvdata(pdev);
++	struct atmel_ac97 *chip = card->private_data;
 +
-+/* Calculate base address for a given endpoint or DMA controller */
-+#define USBA_EPT_BASE(x)	(0x100 + (x) * 0x20)
-+#define USBA_DMA_BASE(x)	(0x300 + (x) * 0x10)
-+#define USBA_FIFO_BASE(x)	((x) << 16)
++	clk_enable(chip->mck);
++
++	return 0;
++}
++#else
++#define snd_atmel_ac97_suspend NULL
++#define snd_atmel_ac97_resume NULL
++#endif
++
++static int __devexit snd_atmel_ac97_remove(struct platform_device *pdev)
++{
++	struct snd_card *card = platform_get_drvdata(pdev);
++
++	snd_card_free(card);
++	platform_set_drvdata(pdev, NULL);
++	return 0;
++}
++
++static struct platform_driver atmel_ac97_driver = {
++	.remove		= __devexit_p(snd_atmel_ac97_remove),
++	.driver		= {
++		.name	= "atmel_ac97c",
++	},
++	.suspend	= snd_atmel_ac97_suspend,
++	.resume		= snd_atmel_ac97_resume,
++};
 +
-+/* Synth parameters */
-+#define USBA_NR_ENDPOINTS	7
++static int __init atmel_ac97_init(void)
++{
++	return platform_driver_probe(&atmel_ac97_driver,
++			snd_atmel_ac97_probe);
++}
++module_init(atmel_ac97_init);
 +
-+#define EP0_FIFO_SIZE		64
-+#define EP0_EPT_SIZE		USBA_EPT_SIZE_64
-+#define EP0_NR_BANKS		1
-+#define BULK_FIFO_SIZE		512
-+#define BULK_EPT_SIZE		USBA_EPT_SIZE_512
-+#define BULK_NR_BANKS		2
-+#define ISO_FIFO_SIZE		1024
-+#define ISO_EPT_SIZE		USBA_EPT_SIZE_1024
-+#define ISO_NR_BANKS		3
-+#define INT_FIFO_SIZE		64
-+#define INT_EPT_SIZE		USBA_EPT_SIZE_64
-+#define INT_NR_BANKS		3
++static void __exit atmel_ac97_exit(void)
++{
++	platform_driver_unregister(&atmel_ac97_driver);
++}
++module_exit(atmel_ac97_exit);
 +
-+enum usba_ctrl_state {
-+	WAIT_FOR_SETUP,
-+	DATA_STAGE_IN,
-+	DATA_STAGE_OUT,
-+	STATUS_STAGE_IN,
-+	STATUS_STAGE_OUT,
-+	STATUS_STAGE_ADDR,
-+	STATUS_STAGE_TEST,
-+};
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION("Driver for Atmel AC97 Controller");
++MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
+diff --git a/sound/avr32/ac97c.h b/sound/avr32/ac97c.h
+new file mode 100644
+index 0000000..96246e7
+--- /dev/null
++++ b/sound/avr32/ac97c.h
+@@ -0,0 +1,71 @@
 +/*
-+  EP_STATE_IDLE,
-+  EP_STATE_SETUP,
-+  EP_STATE_IN_DATA,
-+  EP_STATE_OUT_DATA,
-+  EP_STATE_SET_ADDR_STATUS,
-+  EP_STATE_RX_STATUS,
-+  EP_STATE_TX_STATUS,
-+  EP_STATE_HALT,
-+*/
++ * Register definitions for the Atmel AC97 Controller.
++ *
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __SOUND_AVR32_AC97C_H
++#define __SOUND_AVR32_AC97C_H
++
++#define AC97C_MR		0x08
++#define AC97C_ICA		0x10
++#define AC97C_OCA		0x14
++#define AC97C_CARHR		0x20
++#define AC97C_CATHR		0x24
++#define AC97C_CASR		0x28
++#define AC97C_CAMR		0x2c
++#define AC97C_CBRHR		0x30
++#define AC97C_CBTHR		0x34
++#define AC97C_CBSR		0x38
++#define AC97C_CBMR		0x3c
++#define AC97C_CORHR		0x40
++#define AC97C_COTHR		0x44
++#define AC97C_COSR		0x48
++#define AC97C_COMR		0x4c
++#define AC97C_SR		0x50
++#define AC97C_IER		0x54
++#define AC97C_IDR		0x58
++#define AC97C_IMR		0x5c
++#define AC97C_VERSION		0xfc
++
++#define AC97C_CATPR		PDC_TPR
++#define AC97C_CATCR		PDC_TCR
++#define AC97C_CATNPR		PDC_TNPR
++#define AC97C_CATNCR		PDC_TNCR
++#define AC97C_CARPR		PDC_RPR
++#define AC97C_CARCR		PDC_RCR
++#define AC97C_CARNPR		PDC_RNPR
++#define AC97C_CARNCR		PDC_RNCR
++#define AC97C_PTCR		PDC_PTCR
++
++#define AC97C_MR_ENA		(1 << 0)
++#define AC97C_MR_WRST		(1 << 1)
++#define AC97C_MR_VRA		(1 << 2)
++
++#define AC97C_CSR_TXRDY		(1 << 0)
++#define AC97C_CSR_UNRUN		(1 << 2)
++#define AC97C_CSR_RXRDY		(1 << 4)
++#define AC97C_CSR_ENDTX		(1 << 10)
++#define AC97C_CSR_ENDRX		(1 << 14)
++
++#define AC97C_CMR_SIZE_20	(0 << 16)
++#define AC97C_CMR_SIZE_18	(1 << 16)
++#define AC97C_CMR_SIZE_16	(2 << 16)
++#define AC97C_CMR_SIZE_10	(3 << 16)
++#define AC97C_CMR_CEM_LITTLE	(1 << 18)
++#define AC97C_CMR_CEM_BIG	(0 << 18)
++#define AC97C_CMR_CENA		(1 << 21)
++#define AC97C_CMR_PDCEN		(1 << 22)
++
++#define AC97C_SR_CAEVT		(1 << 3)
++
++#define AC97C_CH_ASSIGN(slot, channel)					\
++	(AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
++#define AC97C_CHANNEL_NONE	0x0
++#define AC97C_CHANNEL_A		0x1
++#define AC97C_CHANNEL_B		0x2
++
++#endif /* __SOUND_AVR32_AC97C_H */
+diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig
+index af37cd0..e3cc557 100644
+--- a/sound/oss/Kconfig
++++ b/sound/oss/Kconfig
+@@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL
+ 	int "DAC channel"
+ 	default "1"
+ 	depends on SOUND_SH_DAC_AUDIO
++
++config SOUND_AT32_ABDAC
++	tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support"
++	depends on SOUND_PRIME && AVR32
+diff --git a/sound/oss/Makefile b/sound/oss/Makefile
+index 1200670..fafc246 100644
+--- a/sound/oss/Makefile
++++ b/sound/oss/Makefile
+@@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232)	+= cs4232.o ad1848.o
+ 
+ # Please leave it as is, cause the link order is significant !
+ 
++obj-$(CONFIG_SOUND_AT32_ABDAC)	+= at32_abdac.o
+ obj-$(CONFIG_SOUND_SH_DAC_AUDIO)	+= sh_dac_audio.o
+ obj-$(CONFIG_SOUND_HAL2)	+= hal2.o
+ obj-$(CONFIG_SOUND_AEDSP16)	+= aedsp16.o
+diff --git a/sound/oss/at32_abdac.c b/sound/oss/at32_abdac.c
+new file mode 100644
+index 0000000..cb997d7
+--- /dev/null
++++ b/sound/oss/at32_abdac.c
+@@ -0,0 +1,722 @@
++/*
++ * OSS Sound Driver for the Atmel AT32 on-chip DAC.
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/clk.h>
++#include <linux/dma-mapping.h>
++#include <linux/fs.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/sound.h>
++#include <linux/soundcard.h>
 +
-+struct usba_dma_desc {
-+	dma_addr_t next;
-+	dma_addr_t addr;
-+	u32 ctrl;
-+};
++#include <asm/byteorder.h>
++#include <asm/dma-controller.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
 +
-+struct usba_ep {
-+	int					state;
-+	void __iomem				*ep_regs;
-+	void __iomem				*dma_regs;
-+	void __iomem				*fifo;
-+	struct usb_ep				ep;
-+	struct usba_udc				*udc;
++/* We want to use the "bizarre" swap-bytes-in-each-halfword macro */
++#include <linux/byteorder/swabb.h>
 +
-+	struct list_head			queue;
-+	const struct usb_endpoint_descriptor	*desc;
++#include "at32_abdac.h"
 +
-+	u16					fifo_size;
-+	u8					nr_banks;
-+	u8					index;
-+	unsigned int				can_dma:1;
-+	unsigned int				can_isoc:1;
-+	unsigned int				is_isoc:1;
-+	unsigned int				is_in:1;
++#define DMA_BUFFER_SIZE	32768
++#define DMA_PERIOD_SHIFT 10
++#define DMA_PERIOD_SIZE (1 << DMA_PERIOD_SHIFT)
++#define DMA_WRITE_THRESHOLD DMA_PERIOD_SIZE
 +
-+#ifdef CONFIG_DEBUG_FS
-+	u32					last_dma_status;
-+	struct dentry				*debugfs_dir;
-+	struct dentry				*debugfs_queue;
-+	struct dentry				*debugfs_dma_status;
-+	struct dentry				*debugfs_state;
-+#endif
++struct sound_settings {
++	unsigned int format;
++	unsigned int channels;
++	unsigned int sample_rate;
++	/* log2(bytes per sample) */
++	unsigned int input_order;
 +};
 +
-+struct usba_request {
-+	struct usb_request			req;
-+	struct list_head			queue;
++struct at32_dac {
++	spinlock_t lock;
++	void __iomem *regs;
 +
-+	u32					ctrl;
++	/* head and tail refer to number of words */
++	struct {
++		u32 *buf;
++		int head;
++		int tail;
++	} dma;
 +
-+	unsigned int				submitted:1;
-+	unsigned int				last_transaction:1;
-+	unsigned int				using_dma:1;
-+	unsigned int				mapped:1;
-+};
++	struct semaphore sem;
++	wait_queue_head_t write_wait;
 +
-+struct usba_udc {
-+	/* Protect hw registers from concurrent modifications */
-+	spinlock_t lock;
++	/*
++	 * Read at most ucount bytes from ubuf, translate to 2-channel
++	 * signed 16-bit big endian format and write to the DMA buffer
++	 * as long as there is room left.  Return the number of bytes
++	 * successfully copied from ubuf, or -EFAULT if the first
++	 * sample from ubuf couldn't be read.  This function is not
++	 * called unless there is room for at least one sample (4
++	 * bytes) in the DMA buffer.
++	 */
++	ssize_t (*trans)(struct at32_dac *dac, const char __user *ubuf,
++			 size_t ucount);
 +
-+	void __iomem *regs;
-+	void __iomem *fifo;
++	struct sound_settings dsp_settings;
++	struct dma_request_cyclic req;
 +
-+	struct usb_gadget gadget;
-+	struct usb_gadget_driver *driver;
++	struct clk *mck;
++	struct clk *sample_clk;
 +	struct platform_device *pdev;
-+	int irq;
-+	int vbus_pin;
-+	struct clk *pclk;
-+	struct clk *hclk;
++	int busy;
++	int playing;
++	int dev_dsp;
++};
++static struct at32_dac *the_dac;
 +
-+	int test_mode;
-+	int vbus_prev;
++static inline unsigned int abdac_get_head(struct at32_dac *dac)
++{
++	return dac->dma.head & ((DMA_BUFFER_SIZE / 4) - 1);
++}
 +
-+#ifdef CONFIG_DEBUG_FS
-+	struct dentry *debugfs_root;
-+	struct dentry *debugfs_regs;
-+#endif
-+};
++static inline unsigned int abdac_get_tail(struct at32_dac *dac)
++{
++	return dac->dma.tail & ((DMA_BUFFER_SIZE / 4) - 1);
++}
 +
-+#define to_usba_ep(x) container_of((x), struct usba_ep, ep)
-+#define to_usba_req(x) container_of((x), struct usba_request, req)
-+#define to_usba_udc(x) container_of((x), struct usba_udc, gadget)
++static inline unsigned int abdac_dma_space(struct at32_dac *dac)
++{
++	unsigned int space;
 +
-+#define ep_index(ep)		((ep)->index)
-+#define ep_can_dma(ep)		((ep)->can_dma)
-+#define ep_is_in(ep)		((ep)->is_in)
-+#define ep_is_isochronous(ep)	((ep)->is_isoc)
-+#define ep_is_control(ep)	(ep_index(ep) == 0)
-+#define ep_name(ep)		((ep)->ep.name)
-+#define ep_is_idle(ep)		((ep)->state == EP_STATE_IDLE)
++	space = ((dac->dma.tail - dac->dma.head - 1)
++		 & ((DMA_BUFFER_SIZE / 4) - 1));
++	return space;
++}
 +
-+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/ether.c linux-avr32.git/drivers/usb/gadget/ether.c
---- linux-2.6.22.1/drivers/usb/gadget/ether.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/usb/gadget/ether.c	2007-07-12 14:00:19.000000000 +0200
-@@ -277,7 +277,7 @@
- #define DEV_CONFIG_CDC
- #endif
- 
--#ifdef CONFIG_USB_GADGET_HUSB2DEV
-+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
- #define DEV_CONFIG_CDC
- #endif
- 
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/gadget_chips.h linux-avr32.git/drivers/usb/gadget/gadget_chips.h
---- linux-2.6.22.1/drivers/usb/gadget/gadget_chips.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/usb/gadget/gadget_chips.h	2007-07-12 14:00:19.000000000 +0200
-@@ -75,10 +75,10 @@
- #define	gadget_is_pxa27x(g)	0
- #endif
- 
--#ifdef CONFIG_USB_GADGET_HUSB2DEV
--#define gadget_is_husb2dev(g)	!strcmp("husb2_udc", (g)->name)
-+#ifdef CONFIG_USB_GADGET_ATMEL_USBA
-+#define gadget_is_atmel_usba(g)	!strcmp("atmel_usba_udc", (g)->name)
- #else
--#define gadget_is_husb2dev(g)	0
-+#define gadget_is_atmel_usba(g)	0
- #endif
- 
- #ifdef CONFIG_USB_GADGET_S3C2410
-@@ -181,7 +181,7 @@
- 		return 0x16;
- 	else if (gadget_is_mpc8272(gadget))
- 		return 0x17;
--	else if (gadget_is_husb2dev(gadget))
-+	else if (gadget_is_atmel_usba(gadget))
- 		return 0x18;
- 	else if (gadget_is_fsl_usb2(gadget))
- 		return 0x19;
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/inode.c linux-avr32.git/drivers/usb/gadget/inode.c
---- linux-2.6.22.1/drivers/usb/gadget/inode.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/usb/gadget/inode.c	2007-07-12 14:00:19.000000000 +0200
-@@ -37,7 +37,7 @@
- #include <linux/device.h>
- #include <linux/moduleparam.h>
- 
--#include <linux/usb_gadgetfs.h>
-+#include <linux/usb/gadgetfs.h>
- #include <linux/usb_gadget.h>
- 
- 
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/Kconfig linux-avr32.git/drivers/usb/gadget/Kconfig
---- linux-2.6.22.1/drivers/usb/gadget/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/usb/gadget/Kconfig	2007-07-12 14:00:19.000000000 +0200
-@@ -175,6 +175,19 @@
- 	default USB_GADGET
- 	select USB_GADGET_SELECTED
- 
-+config USB_GADGET_ATMEL_USBA
-+	boolean "Atmel USBA"
-+	select USB_GADGET_DUALSPEED
-+	depends on AVR32
-+	help
-+	  USBA is the integrated high-speed USB Device controller on
-+	  the AT32AP700x processors from Atmel.
++static void abdac_update_dma_tail(struct at32_dac *dac)
++{
++	dma_addr_t dma_addr;
++	unsigned int new_tail;
 +
-+config USB_ATMEL_USBA
-+	tristate
-+	depends on USB_GADGET_ATMEL_USBA
-+	default USB_GADGET
-+	select USB_GADGET_SELECTED
- 
- config USB_GADGET_OMAP
- 	boolean "OMAP USB Device Controller"
-diff -x .git -Nur linux-2.6.22.1/drivers/usb/gadget/Makefile linux-avr32.git/drivers/usb/gadget/Makefile
---- linux-2.6.22.1/drivers/usb/gadget/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/usb/gadget/Makefile	2007-07-12 14:00:19.000000000 +0200
-@@ -8,6 +8,7 @@
- obj-$(CONFIG_USB_OMAP)		+= omap_udc.o
- obj-$(CONFIG_USB_LH7A40X)	+= lh7a40x_udc.o
- obj-$(CONFIG_USB_AT91)		+= at91_udc.o
-+obj-$(CONFIG_USB_ATMEL_USBA)	+= atmel_usba_udc.o
- obj-$(CONFIG_USB_FSL_USB2)	+= fsl_usb2_udc.o
- 
- #
-diff -x .git -Nur linux-2.6.22.1/drivers/video/atmel_lcdfb.c linux-avr32.git/drivers/video/atmel_lcdfb.c
---- linux-2.6.22.1/drivers/video/atmel_lcdfb.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/video/atmel_lcdfb.c	2007-07-12 14:00:20.000000000 +0200
-@@ -37,7 +37,9 @@
- #endif
- 
- #if defined(CONFIG_ARCH_AT91)
--#define	ATMEL_LCDFB_FBINFO_DEFAULT	FBINFO_DEFAULT
-+#define	ATMEL_LCDFB_FBINFO_DEFAULT	(FBINFO_DEFAULT \
-+					 | FBINFO_PARTIAL_PAN_OK \
-+					 | FBINFO_HWACCEL_YPAN)
- 
- static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
- 					struct fb_var_screeninfo *var)
-@@ -74,11 +76,34 @@
- 	.type		= FB_TYPE_PACKED_PIXELS,
- 	.visual		= FB_VISUAL_TRUECOLOR,
- 	.xpanstep	= 0,
--	.ypanstep	= 0,
-+	.ypanstep	= 1,
- 	.ywrapstep	= 0,
- 	.accel		= FB_ACCEL_NONE,
- };
- 
-+static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
++	if (dac->playing) {
++		dma_addr = dma_get_current_pos(dac->req.req.dmac,
++					       dac->req.req.channel);
++		new_tail = (dma_addr - dac->req.buffer_start) / 4;
++		if (new_tail >= dac->dma.head
++		    && (dac->dma.tail < dac->dma.head
++			|| dac->dma.tail > new_tail))
++			dev_notice(&dac->pdev->dev, "DMA underrun detected!\n");
++		dac->dma.tail = new_tail;
++		dev_dbg(&dac->pdev->dev, "update tail: 0x%x - 0x%x = %u\n",
++			dma_addr, dac->req.buffer_start, dac->dma.tail);
++	}
++}
++
++static int abdac_start(struct at32_dac *dac)
 +{
-+	unsigned long value;
++	int ret;
 +
-+	if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
-+		return xres;
++	if (dac->playing)
++		return 0;
 +
-+	value = xres;
-+	if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
-+		/* STN display */
-+		if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
-+			value *= 3;
-+		}
-+		if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
-+		   || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
-+		      && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
-+			value = DIV_ROUND_UP(value, 4);
-+		else
-+			value = DIV_ROUND_UP(value, 8);
++	memset(dac->dma.buf, 0, DMA_BUFFER_SIZE);
++
++	clk_enable(dac->sample_clk);
++
++	ret = dma_prepare_request_cyclic(dac->req.req.dmac, &dac->req);
++	if (ret)
++		goto out_stop_clock;
++
++	dev_dbg(&dac->pdev->dev, "starting DMA...\n");
++	ret = dma_start_request(dac->req.req.dmac, dac->req.req.channel);
++	if (ret)
++		goto out_stop_request;
++
++	dac_writel(dac, CTRL, DAC_BIT(EN));
++	dac->playing = 1;
++
++	return 0;
++
++out_stop_request:
++	dma_stop_request(dac->req.req.dmac,
++			 dac->req.req.channel);
++out_stop_clock:
++	clk_disable(dac->sample_clk);
++	return ret;
++}
++
++static int abdac_stop(struct at32_dac *dac)
++{
++	if (dac->playing) {
++		dma_stop_request(dac->req.req.dmac, dac->req.req.channel);
++		dac_writel(dac, DATA, 0);
++		dac_writel(dac, CTRL, 0);
++		dac->playing = 0;
++		clk_disable(dac->sample_clk);
 +	}
 +
-+	return value;
++	return 0;
 +}
- 
- static void atmel_lcdfb_update_dma(struct fb_info *info,
- 			       struct fb_var_screeninfo *var)
-@@ -181,6 +206,7 @@
- 	var->xoffset = var->yoffset = 0;
- 
- 	switch (var->bits_per_pixel) {
-+	case 1:
- 	case 2:
- 	case 4:
- 	case 8:
-@@ -195,8 +221,11 @@
- 		var->blue.offset = 10;
- 		var->red.length = var->green.length = var->blue.length = 5;
- 		break;
--	case 24:
- 	case 32:
-+		var->transp.offset = 24;
-+		var->transp.length = 8;
-+		/* fall through */
-+	case 24:
- 		var->red.offset = 0;
- 		var->green.offset = 8;
- 		var->blue.offset = 16;
-@@ -228,8 +257,10 @@
- static int atmel_lcdfb_set_par(struct fb_info *info)
- {
- 	struct atmel_lcdfb_info *sinfo = info->par;
-+	unsigned long hozval_linesz;
- 	unsigned long value;
- 	unsigned long clk_value_khz;
-+	unsigned long bits_per_line;
- 
- 	dev_dbg(info->device, "%s:\n", __func__);
- 	dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
-@@ -241,12 +272,15 @@
- 
- 	lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
- 
--	if (info->var.bits_per_pixel <= 8)
-+	if (info->var.bits_per_pixel == 1)
-+		info->fix.visual = FB_VISUAL_MONO01;
-+	else if (info->var.bits_per_pixel <= 8)
- 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
- 	else
- 		info->fix.visual = FB_VISUAL_TRUECOLOR;
- 
--	info->fix.line_length = info->var.xres_virtual * (info->var.bits_per_pixel / 8);
-+	bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
-+	info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
- 
- 	/* Re-initialize the DMA engine... */
- 	dev_dbg(info->device, "  * update DMA engine\n");
-@@ -262,18 +296,21 @@
- 	/* Set pixel clock */
- 	clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
- 
--	value = clk_value_khz / PICOS2KHZ(info->var.pixclock);
--
--	if (clk_value_khz % PICOS2KHZ(info->var.pixclock))
--		value++;
-+	value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
- 
- 	value = (value / 2) - 1;
-+	dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n", value);
- 
- 	if (value <= 0) {
- 		dev_notice(info->device, "Bypassing pixel clock divider\n");
- 		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
--	} else
-+	} else {
- 		lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
-+		info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
-+		dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
-+					PICOS2KHZ(info->var.pixclock));
-+	}
-+
- 
- 	/* Initialize control register 2 */
- 	value = sinfo->default_lcdcon2;
-@@ -311,9 +348,14 @@
- 	dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
- 	lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
- 
-+	/* Horizontal value (aka line size) */
-+	hozval_linesz = compute_hozval(info->var.xres,
-+					lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
-+
- 	/* Display size */
--	value = (info->var.xres - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
-+	value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
- 	value |= info->var.yres - 1;
-+	dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
- 	lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
- 
- 	/* FIFO Threshold: Use formula from data sheet */
-@@ -421,6 +463,15 @@
- 			ret = 0;
- 		}
- 		break;
-+
-+	case FB_VISUAL_MONO01:
-+		if (regno < 2) {
-+			val = (regno == 0) ? 0x00 : 0x1F;
-+			lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
-+			ret = 0;
-+		}
-+		break;
 +
- 	}
- 
- 	return ret;
-diff -x .git -Nur linux-2.6.22.1/drivers/video/backlight/Kconfig linux-avr32.git/drivers/video/backlight/Kconfig
---- linux-2.6.22.1/drivers/video/backlight/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/video/backlight/Kconfig	2007-07-12 14:00:20.000000000 +0200
-@@ -8,26 +8,44 @@
- 	  Enable this to be able to choose the drivers for controlling the
- 	  backlight and the LCD panel on some platforms, for example on PDAs.
- 
--config BACKLIGHT_CLASS_DEVICE
--        tristate "Lowlevel Backlight controls"
-+#
-+# LCD
-+#
-+config LCD_CLASS_DEVICE
-+        tristate "Lowlevel LCD controls"
- 	depends on BACKLIGHT_LCD_SUPPORT
- 	default m
- 	help
--	  This framework adds support for low-level control of the LCD
--          backlight. This includes support for brightness and power.
-+	  This framework adds support for low-level control of LCD.
-+	  Some framebuffer devices connect to platform-specific LCD modules
-+	  in order to have a platform-specific way to control the flat panel
-+	  (contrast and applying power to the LCD (not to the backlight!)).
- 
- 	  To have support for your specific LCD panel you will have to
- 	  select the proper drivers which depend on this option.
- 
--config LCD_CLASS_DEVICE
--        tristate "Lowlevel LCD controls"
-+config LCD_LTV350QV
-+	tristate "Samsung LTV350QV LCD Panel"
-+	depends on LCD_CLASS_DEVICE && SPI_MASTER
-+	default n
-+	help
-+	  If you have a Samsung LTV350QV LCD panel, say y to include a
-+	  power control driver for it.  The panel starts up in power
-+	  off state, so you need this driver in order to see any
-+	  output.
++static int abdac_dma_prepare(struct at32_dac *dac)
++{
++	dac->dma.buf = dma_alloc_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++					  &dac->req.buffer_start, GFP_KERNEL);
++	if (!dac->dma.buf)
++		return -ENOMEM;
 +
-+	  The LTV350QV panel is present on all ATSTK1000 boards.
++	dac->dma.head = dac->dma.tail = 0;
++	dac->req.periods = DMA_BUFFER_SIZE / DMA_PERIOD_SIZE;
++	dac->req.buffer_size = DMA_BUFFER_SIZE;
 +
-+#
-+# Backlight
-+#
-+config BACKLIGHT_CLASS_DEVICE
-+        tristate "Lowlevel Backlight controls"
- 	depends on BACKLIGHT_LCD_SUPPORT
- 	default m
- 	help
--	  This framework adds support for low-level control of LCD.
--	  Some framebuffer devices connect to platform-specific LCD modules
--	  in order to have a platform-specific way to control the flat panel
--	  (contrast and applying power to the LCD (not to the backlight!)).
-+	  This framework adds support for low-level control of the LCD
-+          backlight. This includes support for brightness and power.
- 
- 	  To have support for your specific LCD panel you will have to
- 	  select the proper drivers which depend on this option.
-diff -x .git -Nur linux-2.6.22.1/drivers/video/backlight/ltv350qv.c linux-avr32.git/drivers/video/backlight/ltv350qv.c
---- linux-2.6.22.1/drivers/video/backlight/ltv350qv.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/video/backlight/ltv350qv.c	2007-06-06 11:34:00.000000000 +0200
-@@ -0,0 +1,340 @@
-+/*
-+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel
-+ *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/lcd.h>
-+#include <linux/module.h>
-+#include <linux/spi/spi.h>
++	return 0;
++}
 +
-+#include "ltv350qv.h"
++static void abdac_dma_cleanup(struct at32_dac *dac)
++{
++	if (dac->dma.buf)
++		dma_free_coherent(&dac->pdev->dev, DMA_BUFFER_SIZE,
++				  dac->dma.buf, dac->req.buffer_start);
++	dac->dma.buf = NULL;
++}
 +
-+#define POWER_IS_ON(pwr)	((pwr) <= FB_BLANK_NORMAL)
++static void abdac_dma_block_complete(struct dma_request *req)
++{
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
 +
-+struct ltv350qv {
-+	struct spi_device	*spi;
-+	u8			*buffer;
-+	int			power;
-+	struct lcd_device	*ld;
-+};
++	wake_up(&dac->write_wait);
++}
 +
-+/*
-+ * The power-on and power-off sequences are taken from the
-+ * LTV350QV-F04 data sheet from Samsung. The register definitions are
-+ * taken from the S6F2002 command list also from Samsung. Both
-+ * documents are distributed with the AVR32 Linux BSP CD from Atmel.
-+ *
-+ * There's still some voodoo going on here, but it's a lot better than
-+ * in the first incarnation of the driver where all we had was the raw
-+ * numbers from the initialization sequence.
-+ */
-+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
++static void abdac_dma_error(struct dma_request *req)
 +{
-+	struct spi_message msg;
-+	struct spi_transfer index_xfer = {
-+		.len		= 3,
-+		.cs_change	= 1,
-+	};
-+	struct spi_transfer value_xfer = {
-+		.len		= 3,
-+		.cs_change	= 1,
-+	};
++	struct dma_request_cyclic *creq = to_dma_request_cyclic(req);
++	struct at32_dac *dac = container_of(creq, struct at32_dac, req);
 +
-+	spi_message_init(&msg);
++	dev_err(&dac->pdev->dev, "DMA error\n");
++}
 +
-+	/* register index */
-+	lcd->buffer[0] = LTV_OPC_INDEX;
-+	lcd->buffer[1] = 0x00;
-+	lcd->buffer[2] = reg & 0x7f;
-+	index_xfer.tx_buf = lcd->buffer;
-+	spi_message_add_tail(&index_xfer, &msg);
++static irqreturn_t abdac_interrupt(int irq, void *dev_id)
++{
++	struct at32_dac *dac = dev_id;
++	u32 status;
 +
-+	/* register value */
-+	lcd->buffer[4] = LTV_OPC_DATA;
-+	lcd->buffer[5] = val >> 8;
-+	lcd->buffer[6] = val;
-+	value_xfer.tx_buf = lcd->buffer + 4;
-+	spi_message_add_tail(&value_xfer, &msg);
++	status = dac_readl(dac, INT_STATUS);
++	if (status & DAC_BIT(UNDERRUN)) {
++		dev_err(&dac->pdev->dev, "Underrun detected!\n");
++		dac_writel(dac, INT_CLR, DAC_BIT(UNDERRUN));
++	} else {
++		dev_err(&dac->pdev->dev, "Spurious interrupt (status=0x%x)\n",
++			status);
++		dac_writel(dac, INT_CLR, status);
++	}
 +
-+	return spi_sync(lcd->spi, &msg);
++	return IRQ_HANDLED;
 +}
 +
-+/* The comments are taken straight from the data sheet */
-+static int ltv350qv_power_on(struct ltv350qv *lcd)
++static ssize_t trans_s16be(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
 +{
-+	int ret;
++	ssize_t ret;
 +
-+	/* Power On Reset Display off State */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
-+		goto err;
-+	msleep(15);
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
 +
-+	/* Power Setting Function 1 */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
-+		goto err;
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
-+		goto err_power1;
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
 +
-+	/* Power Setting Function 2 */
-+	if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+			       LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+			       | LTV_SUPPLY_CURRENT(5)))
-+		goto err_power2;
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)] = sample;
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
 +
-+	msleep(55);
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
 +
-+	/* Instruction Setting */
-+	ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
-+				 LTV_NMD | LTV_REV | LTV_NL(0x1d));
-+	ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
-+				  LTV_DS_SAME | LTV_CHS_480
-+				  | LTV_DF_RGB | LTV_RGB_BGR);
-+	ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
-+				  LTV_VSPL_ACTIVE_LOW
-+				  | LTV_HSPL_ACTIVE_LOW
-+				  | LTV_DPL_SAMPLE_RISING
-+				  | LTV_EPL_ACTIVE_LOW
-+				  | LTV_SS_RIGHT_TO_LEFT);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_FWI(3));
-+	ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
-+	ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
-+	ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
-+	ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
-+	if (ret)
-+		goto err_settings;
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
 +
-+	/* Wait more than 2 frames */
-+	msleep(20);
++	return ret;
++}
 +
-+	/* Display On Sequence */
-+	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+				 LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE
-+				 | LTV_POWER_ON | LTV_DRIVE_CURRENT(5)
-+				 | LTV_SUPPLY_CURRENT(5));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3));
-+	if (ret)
-+		goto err_disp_on;
++static ssize_t trans_s16le(struct at32_dac *dac, const char __user *ubuf,
++			   size_t ucount)
++{
++	ssize_t ret;
 +
-+	/* Display should now be ON. Phew. */
-+	return 0;
++	if (dac->dsp_settings.channels == 2) {
++		const u32 __user *up = (const u32 __user *)ubuf;
++		u32 sample;
 +
-+err_disp_on:
-+	/*
-+	 * Try to recover. Error handling probably isn't very useful
-+	 * at this point, just make a best effort to switch the panel
-+	 * off.
-+	 */
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+			   LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5)
-+			   | LTV_SUPPLY_CURRENT(5));
-+	ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+			   LTV_NW_INV_1LINE | LTV_FWI(3));
-+err_settings:
-+err_power2:
-+err_power1:
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
-+	msleep(1);
-+err:
-+	ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
-+	return -EIO;
++		for (ret = 0; ret < (ssize_t)(ucount - 3); ret += 4) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			/* Swap bytes in each halfword */
++			dac->dma.buf[abdac_get_head(dac)] = swahb32(sample);
++			dac->dma.head++;
++		}
++	} else {
++		const u16 __user *up = (const u16 __user *)ubuf;
++		u16 sample;
++
++		for (ret = 0; ret < (ssize_t)(ucount - 1); ret += 2) {
++			if (!abdac_dma_space(dac))
++				break;
++
++			if (unlikely(__get_user(sample, up++))) {
++				if (ret == 0)
++					ret = -EFAULT;
++				break;
++			}
++			sample = swab16(sample);
++			dac->dma.buf[abdac_get_head(dac)]
++				= (sample << 16) | sample;
++			dac->dma.head++;
++		}
++	}
++
++	return ret;
 +}
 +
-+static int ltv350qv_power_off(struct ltv350qv *lcd)
++static ssize_t abdac_dma_translate_from_user(struct at32_dac *dac,
++					       const char __user *buffer,
++					       size_t count)
 +{
-+	int ret;
++	/* At least one buffer must be available at this point */
++	dev_dbg(&dac->pdev->dev, "copying %zu bytes from user...\n", count);
 +
-+	/* Display Off Sequence */
-+	ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
-+				 LTV_VCOM_DISABLE
-+				 | LTV_DRIVE_CURRENT(5)
-+				 | LTV_SUPPLY_CURRENT(5));
-+	ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
-+				  LTV_NW_INV_1LINE | LTV_FWI(3));
++	return dac->trans(dac, buffer, count);
++}
 +
-+	/* Power down setting 1 */
-+	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
++static int abdac_set_format(struct at32_dac *dac, int format)
++{
++	unsigned int order;
 +
-+	/* Wait at least 1 ms */
-+	msleep(1);
++	switch (format) {
++	case AFMT_S16_BE:
++		order = 1;
++		dac->trans = trans_s16be;
++		break;
++	case AFMT_S16_LE:
++		order = 1;
++		dac->trans = trans_s16le;
++		break;
++	default:
++		dev_dbg(&dac->pdev->dev, "unsupported format: %d\n", format);
++		return -EINVAL;
++	}
 +
-+	/* Power down setting 2 */
-+	ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
++	if (dac->dsp_settings.channels == 2)
++		order++;
 +
-+	/*
-+	 * No point in trying to recover here. If we can't switch the
-+	 * panel off, what are we supposed to do other than inform the
-+	 * user about the failure?
-+	 */
-+	if (ret)
-+		return -EIO;
++	dac->dsp_settings.input_order = order;
++	dac->dsp_settings.format = format;
++	return 0;
++}
++
++static int abdac_set_sample_rate(struct at32_dac *dac, unsigned long rate)
++{
++	unsigned long new_rate;
++	int ret;
++
++	ret = clk_set_rate(dac->sample_clk, 256 * rate);
++	if (ret < 0)
++		return ret;
++
++	/* TODO: mplayer seems to have a problem with this */
++#if 0
++	new_rate = clk_get_rate(dac->sample_clk);
++	dac->dsp_settings.sample_rate = new_rate / 256;
++#else
++	dac->dsp_settings.sample_rate = rate;
++#endif
 +
-+	/* Display power should now be OFF */
 +	return 0;
 +}
 +
-+static int ltv350qv_power(struct ltv350qv *lcd, int power)
++static ssize_t abdac_dsp_write(struct file *file,
++				 const char __user *buffer,
++				 size_t count, loff_t *ppos)
 +{
-+	int ret = 0;
++	struct at32_dac *dac = file->private_data;
++	DECLARE_WAITQUEUE(wait, current);
++	unsigned int avail;
++	ssize_t copied;
++	ssize_t ret;
 +
-+	if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
-+		ret = ltv350qv_power_on(lcd);
-+	else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
-+		ret = ltv350qv_power_off(lcd);
++	/* Avoid address space checking in the translation functions */
++	if (!access_ok(buffer, count, VERIFY_READ))
++		return -EFAULT;
 +
-+	if (!ret)
-+		lcd->power = power;
++	down(&dac->sem);
++
++	if (!dac->dma.buf) {
++		ret = abdac_dma_prepare(dac);
++		if (ret)
++			goto out;
++	}
++
++	add_wait_queue(&dac->write_wait, &wait);
++	ret = 0;
++	while (count > 0) {
++		do {
++			abdac_update_dma_tail(dac);
++			avail = abdac_dma_space(dac);
++			set_current_state(TASK_INTERRUPTIBLE);
++			if (avail >= DMA_WRITE_THRESHOLD)
++				break;
++
++			if (file->f_flags & O_NONBLOCK) {
++				if (!ret)
++					ret = -EAGAIN;
++				goto out;
++			}
++
++			pr_debug("Going to wait (avail = %u, count = %zu)\n",
++				 avail, count);
++
++			up(&dac->sem);
++			schedule();
++			if (signal_pending(current)) {
++				if (!ret)
++					ret = -ERESTARTSYS;
++				goto out_nosem;
++			}
++			down(&dac->sem);
++		} while (1);
++
++		copied = abdac_dma_translate_from_user(dac, buffer, count);
++		if (copied < 0) {
++			if (!ret)
++				ret = -EFAULT;
++			goto out;
++		}
++
++		abdac_start(dac);
++
++		count -= copied;
++		ret += copied;
++	}
 +
++out:
++	up(&dac->sem);
++out_nosem:
++	remove_wait_queue(&dac->write_wait, &wait);
++	set_current_state(TASK_RUNNING);
 +	return ret;
 +}
 +
-+static int ltv350qv_set_power(struct lcd_device *ld, int power)
++static int abdac_dsp_ioctl(struct inode *inode, struct file *file,
++			     unsigned int cmd, unsigned long arg)
 +{
-+	struct ltv350qv *lcd;
++	struct at32_dac *dac = file->private_data;
++	int __user *up = (int __user *)arg;
++	struct audio_buf_info abinfo;
++	int val, ret;
 +
-+	lcd = class_get_devdata(&ld->class_dev);
-+	return ltv350qv_power(lcd, power);
++	switch (cmd) {
++	case OSS_GETVERSION:
++		return put_user(SOUND_VERSION, up);
++
++	case SNDCTL_DSP_SPEED:
++		if (get_user(val, up))
++			return -EFAULT;
++		if (val >= 0) {
++			abdac_stop(dac);
++			ret = abdac_set_sample_rate(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(dac->dsp_settings.sample_rate, up);
++
++	case SNDCTL_DSP_STEREO:
++		if (get_user(val, up))
++			return -EFAULT;
++		abdac_stop(dac);
++		if (val && dac->dsp_settings.channels == 1)
++			dac->dsp_settings.input_order++;
++		else if (!val && dac->dsp_settings.channels != 1)
++			dac->dsp_settings.input_order--;
++		dac->dsp_settings.channels = val ? 2 : 1;
++		return 0;
++
++	case SNDCTL_DSP_CHANNELS:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val) {
++			if (val < 0 || val > 2)
++				return -EINVAL;
++
++			abdac_stop(dac);
++			dac->dsp_settings.input_order
++				+= val - dac->dsp_settings.channels;
++			dac->dsp_settings.channels = val;
++		}
++		return put_user(val, (int *)arg);
++
++	case SNDCTL_DSP_GETFMTS:
++		return put_user(AFMT_S16_BE | AFMT_S16_BE, up);
++
++	case SNDCTL_DSP_SETFMT:
++		if (get_user(val, up))
++			return -EFAULT;
++
++		if (val == AFMT_QUERY) {
++			val = dac->dsp_settings.format;
++		} else {
++			ret = abdac_set_format(dac, val);
++			if (ret)
++				return ret;
++		}
++		return put_user(val, up);
++
++	case SNDCTL_DSP_GETOSPACE:
++		abdac_update_dma_tail(dac);
++		abinfo.fragsize = ((1 << dac->dsp_settings.input_order)
++				   * (DMA_PERIOD_SIZE / 4));
++		abinfo.bytes = (abdac_dma_space(dac)
++				<< dac->dsp_settings.input_order);
++		abinfo.fragstotal = ((DMA_BUFFER_SIZE * 4)
++				     >> (DMA_PERIOD_SHIFT
++					 + dac->dsp_settings.input_order));
++		abinfo.fragments = ((abinfo.bytes
++				     >> dac->dsp_settings.input_order)
++				    / (DMA_PERIOD_SIZE / 4));
++		pr_debug("fragments=%d  fragstotal=%d  fragsize=%d bytes=%d\n",
++			 abinfo.fragments, abinfo.fragstotal, abinfo.fragsize,
++			 abinfo.bytes);
++		return copy_to_user(up, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
++
++	default:
++		dev_dbg(&dac->pdev->dev, "Unimplemented ioctl cmd: 0x%x\n", cmd);
++		return -EINVAL;
++	}
++}
++
++static int abdac_dsp_open(struct inode *inode, struct file *file)
++{
++	struct at32_dac *dac = the_dac;
++	int ret;
++
++	if (file->f_mode & FMODE_READ)
++		return -ENXIO;
++
++	down(&dac->sem);
++	ret = -EBUSY;
++	if (dac->busy)
++		goto out;
++
++	dac->dma.head = dac->dma.tail = 0;
++
++	/* FIXME: What are the correct defaults?  */
++	dac->dsp_settings.channels = 2;
++	abdac_set_format(dac, AFMT_S16_BE);
++	ret = abdac_set_sample_rate(dac, 8000);
++	if (ret)
++		goto out;
++
++	file->private_data = dac;
++	dac->busy = 1;
++
++	ret = 0;
++
++out:
++	up(&dac->sem);
++	return ret;
 +}
 +
-+static int ltv350qv_get_power(struct lcd_device *ld)
++static int abdac_dsp_release(struct inode *inode, struct file *file)
 +{
-+	struct ltv350qv *lcd;
++	struct at32_dac *dac = file->private_data;
 +
-+	lcd = class_get_devdata(&ld->class_dev);
-+	return lcd->power;
++	down(&dac->sem);
++
++	abdac_stop(dac);
++	abdac_dma_cleanup(dac);
++	dac->busy = 0;
++
++	up(&dac->sem);
++
++	return 0;
 +}
 +
-+static struct lcd_ops ltv_ops = {
-+	.get_power	= ltv350qv_get_power,
-+	.set_power	= ltv350qv_set_power,
++static struct file_operations abdac_dsp_fops = {
++	.owner		= THIS_MODULE,
++	.llseek		= no_llseek,
++	.write		= abdac_dsp_write,
++	.ioctl		= abdac_dsp_ioctl,
++	.open		= abdac_dsp_open,
++	.release	= abdac_dsp_release,
 +};
 +
-+static int __devinit ltv350qv_probe(struct spi_device *spi)
++static int __init abdac_probe(struct platform_device *pdev)
 +{
-+	struct ltv350qv *lcd;
-+	struct lcd_device *ld;
++	struct at32_dac *dac;
++	struct resource *regs;
++	struct clk *mck;
++	struct clk *sample_clk;
++	int irq;
 +	int ret;
 +
-+	lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL);
-+	if (!lcd)
-+		return -ENOMEM;
++	if (the_dac)
++		return -EBUSY;
 +
-+	lcd->spi = spi;
-+	lcd->power = FB_BLANK_POWERDOWN;
-+	lcd->buffer = kzalloc(8, GFP_KERNEL);
++	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++	if (!regs)
++		return -ENXIO;
++	irq = platform_get_irq(pdev, 0);
++	if (irq < 0)
++		return irq;
 +
-+	ld = lcd_device_register("ltv350qv", lcd, &ltv_ops);
-+	if (IS_ERR(ld)) {
-+		ret = PTR_ERR(ld);
-+		goto out_free_lcd;
++	mck = clk_get(&pdev->dev, "pclk");
++	if (IS_ERR(mck))
++		return PTR_ERR(mck);
++	sample_clk = clk_get(&pdev->dev, "sample_clk");
++	if (IS_ERR(sample_clk)) {
++		ret = PTR_ERR(sample_clk);
++		goto out_put_mck;
 +	}
-+	lcd->ld = ld;
-+
-+	ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
-+	if (ret)
-+		goto out_unregister;
++	clk_enable(mck);
 +
-+	dev_set_drvdata(&spi->dev, lcd);
++	ret = -ENOMEM;
++	dac = kzalloc(sizeof(struct at32_dac), GFP_KERNEL);
++	if (!dac)
++		goto out_disable_clk;
 +
-+	return 0;
++	spin_lock_init(&dac->lock);
++	init_MUTEX(&dac->sem);
++	init_waitqueue_head(&dac->write_wait);
++	dac->pdev = pdev;
++	dac->mck = mck;
++	dac->sample_clk = sample_clk;
 +
-+out_unregister:
-+	lcd_device_unregister(ld);
-+out_free_lcd:
-+	kfree(lcd);
-+	return ret;
-+}
++	dac->regs = ioremap(regs->start, regs->end - regs->start + 1);
++	if (!dac->regs)
++		goto out_free_dac;
 +
-+static int __devexit ltv350qv_remove(struct spi_device *spi)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++	ret = request_irq(irq, abdac_interrupt, 0, "dac", dac);
++	if (ret)
++		goto out_unmap_regs;
 +
-+	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
-+	lcd_device_unregister(lcd->ld);
-+	kfree(lcd);
++	/* FIXME */
++	dac->req.req.dmac = find_dma_controller(0);
++	if (!dac->req.req.dmac)
++		goto out_free_irq;
 +
-+	return 0;
-+}
++	ret = dma_alloc_channel(dac->req.req.dmac);
++	if (ret < 0)
++		goto out_free_irq;
 +
-+#ifdef CONFIG_PM
-+static int ltv350qv_suspend(struct spi_device *spi,
-+			    pm_message_t state, u32 level)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++	dac->req.req.channel = ret;
++	dac->req.req.block_complete = abdac_dma_block_complete;
++	dac->req.req.error = abdac_dma_error;
++	dac->req.data_reg = regs->start + DAC_DATA;
++	dac->req.periph_id = 2; /* FIXME */
++	dac->req.direction = DMA_DIR_MEM_TO_PERIPH;
++	dac->req.width = DMA_WIDTH_32BIT;
 +
-+	if (level == SUSPEND_POWER_DOWN)
-+		return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	/* Make sure the DAC is silent and disabled */
++	dac_writel(dac, DATA, 0);
++	dac_writel(dac, CTRL, 0);
 +
-+	return 0;
-+}
++	ret = register_sound_dsp(&abdac_dsp_fops, -1);
++	if (ret < 0)
++		goto out_free_dma;
++	dac->dev_dsp = ret;
 +
-+static int ltv350qv_resume(struct spi_device *spi, u32 level)
-+{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++	/* TODO: Register mixer */
 +
-+	if (level == RESUME_POWER_ON)
-+		return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
++	the_dac = dac;
++	platform_set_drvdata(pdev, dac);
 +
 +	return 0;
++
++out_free_dma:
++	dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++out_free_irq:
++	free_irq(irq, dac);
++out_unmap_regs:
++	iounmap(dac->regs);
++out_free_dac:
++	kfree(dac);
++out_disable_clk:
++	clk_disable(mck);
++	clk_put(sample_clk);
++out_put_mck:
++	clk_put(mck);
++	return ret;
 +}
-+#else
-+#define ltv350qv_suspend	NULL
-+#define ltv350qv_resume		NULL
-+#endif
 +
-+/* Power down all displays on reboot, poweroff or halt */
-+static void ltv350qv_shutdown(struct spi_device *spi)
++static int __exit abdac_remove(struct platform_device *pdev)
 +{
-+	struct ltv350qv *lcd = dev_get_drvdata(&spi->dev);
++	struct at32_dac *dac;
 +
-+	ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
++	dac = platform_get_drvdata(pdev);
++	if (dac) {
++		unregister_sound_dsp(dac->dev_dsp);
++		dma_release_channel(dac->req.req.dmac, dac->req.req.channel);
++		free_irq(platform_get_irq(pdev, 0), dac);
++		iounmap(dac->regs);
++		clk_disable(dac->mck);
++		clk_put(dac->sample_clk);
++		clk_put(dac->mck);
++		kfree(dac);
++		platform_set_drvdata(pdev, NULL);
++		the_dac = NULL;
++	}
++
++	return 0;
 +}
 +
-+static struct spi_driver ltv350qv_driver = {
-+	.driver = {
-+		.name		= "ltv350qv",
-+		.bus		= &spi_bus_type,
-+		.owner		= THIS_MODULE,
++static struct platform_driver abdac_driver = {
++	.remove		= __exit_p(abdac_remove),
++	.driver		= {
++		.name	= "abdac",
 +	},
-+
-+	.probe		= ltv350qv_probe,
-+	.remove		= __devexit_p(ltv350qv_remove),
-+	.shutdown	= ltv350qv_shutdown,
-+	.suspend	= ltv350qv_suspend,
-+	.resume		= ltv350qv_resume,
 +};
 +
-+static int __init ltv350qv_init(void)
++static int __init abdac_init(void)
 +{
-+	return spi_register_driver(&ltv350qv_driver);
++	return platform_driver_probe(&abdac_driver, abdac_probe);
 +}
++module_init(abdac_init);
 +
-+static void __exit ltv350qv_exit(void)
++static void __exit abdac_exit(void)
 +{
-+	spi_unregister_driver(&ltv350qv_driver);
++	platform_driver_unregister(&abdac_driver);
 +}
-+module_init(ltv350qv_init);
-+module_exit(ltv350qv_exit);
++module_exit(abdac_exit);
 +
 +MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
-+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver");
++MODULE_DESCRIPTION("Sound Driver for the Atmel AT32 ABDAC");
 +MODULE_LICENSE("GPL");
-diff -x .git -Nur linux-2.6.22.1/drivers/video/backlight/ltv350qv.h linux-avr32.git/drivers/video/backlight/ltv350qv.h
---- linux-2.6.22.1/drivers/video/backlight/ltv350qv.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/drivers/video/backlight/ltv350qv.h	2007-06-06 11:34:00.000000000 +0200
-@@ -0,0 +1,95 @@
+diff --git a/sound/oss/at32_abdac.h b/sound/oss/at32_abdac.h
+new file mode 100644
+index 0000000..3c88e25
+--- /dev/null
++++ b/sound/oss/at32_abdac.h
+@@ -0,0 +1,59 @@
 +/*
-+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel
++ * Register definitions for the Atmel AT32 on-chip DAC.
 + *
-+ * Copyright (C) 2006, 2007 Atmel Corporation
++ * Copyright (C) 2006 Atmel Corporation
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
-+#ifndef __LTV350QV_H
-+#define __LTV350QV_H
++#ifndef __SOUND_OSS_AT32_ABDAC_H__
++#define __SOUND_OSS_AT32_ABDAC_H__
++
++/* DAC register offsets */
++#define DAC_DATA                                0x0000
++#define DAC_CTRL                                0x0008
++#define DAC_INT_MASK                            0x000c
++#define DAC_INT_EN                              0x0010
++#define DAC_INT_DIS                             0x0014
++#define DAC_INT_CLR                             0x0018
++#define DAC_INT_STATUS                          0x001c
++#define DAC_PDC_DATA                            0x0020
 +
-+#define LTV_OPC_INDEX	0x74
-+#define LTV_OPC_DATA	0x76
++/* Bitfields in CTRL */
++#define DAC_SWAP_OFFSET                         30
++#define DAC_SWAP_SIZE                           1
++#define DAC_EN_OFFSET                           31
++#define DAC_EN_SIZE                             1
++
++/* Bitfields in INT_MASK/INT_EN/INT_DIS/INT_STATUS/INT_CLR */
++#define DAC_UNDERRUN_OFFSET                     28
++#define DAC_UNDERRUN_SIZE                       1
++#define DAC_TX_READY_OFFSET                     29
++#define DAC_TX_READY_SIZE                       1
++#define DAC_TX_BUFFER_EMPTY_OFFSET              30
++#define DAC_TX_BUFFER_EMPTY_SIZE                1
++#define DAC_CHANNEL_TX_END_OFFSET               31
++#define DAC_CHANNEL_TX_END_SIZE                 1
 +
-+#define LTV_ID		0x00		/* ID Read */
-+#define LTV_IFCTL	0x01		/* Display Interface Control */
-+#define LTV_DATACTL	0x02		/* Display Data Control */
-+#define LTV_ENTRY_MODE	0x03		/* Entry Mode */
-+#define LTV_GATECTL1	0x04		/* Gate Control 1 */
-+#define LTV_GATECTL2	0x05		/* Gate Control 2 */
-+#define LTV_VBP		0x06		/* Vertical Back Porch */
-+#define LTV_HBP		0x07		/* Horizontal Back Porch */
-+#define LTV_SOTCTL	0x08		/* Source Output Timing Control */
-+#define LTV_PWRCTL1	0x09		/* Power Control 1 */
-+#define LTV_PWRCTL2	0x0a		/* Power Control 2 */
-+#define LTV_GAMMA(x)	(0x10 + (x))	/* Gamma control */
++/* Bit manipulation macros */
++#define DAC_BIT(name)					\
++	(1 << DAC_##name##_OFFSET)
++#define DAC_BF(name, value)				\
++	(((value) & ((1 << DAC_##name##_SIZE) - 1))	\
++	 << DAC_##name##_OFFSET)
++#define DAC_BFEXT(name, value)				\
++	(((value) >> DAC_##name##_OFFSET)		\
++	 & ((1 << DAC_##name##_SIZE) - 1))
++#define DAC_BFINS(name, value, old)			\
++	(((old) & ~(((1 << DAC_##name##_SIZE) - 1)	\
++		    << DAC_##name##_OFFSET))		\
++	 | DAC_BF(name,value))
 +
-+/* Bit definitions for LTV_IFCTL */
-+#define LTV_IM			(1 << 15)
-+#define LTV_NMD			(1 << 14)
-+#define LTV_SSMD		(1 << 13)
-+#define LTV_REV			(1 <<  7)
-+#define LTV_NL(x)		(((x) & 0x001f) << 0)
++/* Register access macros */
++#define dac_readl(port, reg)				\
++	__raw_readl((port)->regs + DAC_##reg)
++#define dac_writel(port, reg, value)			\
++	__raw_writel((value), (port)->regs + DAC_##reg)
++
++#endif /* __SOUND_OSS_AT32_ABDAC_H__ */
+diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig
+new file mode 100644
+index 0000000..0d08c29
+--- /dev/null
++++ b/sound/spi/Kconfig
+@@ -0,0 +1,31 @@
++#SPI drivers
++
++menu "SPI devices"
++	depends on SND != n
++
++config SND_AT73C213
++	tristate "Atmel AT73C213 DAC driver"
++	depends on ATMEL_SSC
++	select SND_PCM
++	help
++	  Say Y here if you want to use the Atmel AT73C213 external DAC. This
++	  DAC can be found on Atmel development boards.
 +
-+/* Bit definitions for LTV_DATACTL */
-+#define LTV_DS_SAME		(0 << 12)
-+#define LTV_DS_D_TO_S		(1 << 12)
-+#define LTV_DS_S_TO_D		(2 << 12)
-+#define LTV_CHS_384		(0 <<  9)
-+#define LTV_CHS_480		(1 <<  9)
-+#define LTV_CHS_492		(2 <<  9)
-+#define LTV_DF_RGB		(0 <<  6)
-+#define LTV_DF_RGBX		(1 <<  6)
-+#define LTV_DF_XRGB		(2 <<  6)
-+#define LTV_RGB_RGB		(0 <<  2)
-+#define LTV_RGB_BGR		(1 <<  2)
-+#define LTV_RGB_GRB		(2 <<  2)
-+#define LTV_RGB_RBG		(3 <<  2)
++	  This driver requires the Atmel SSC driver for sound sink, a
++	  peripheral found on most AT91 and AVR32 microprocessors.
 +
-+/* Bit definitions for LTV_ENTRY_MODE */
-+#define LTV_VSPL_ACTIVE_LOW	(0 << 15)
-+#define LTV_VSPL_ACTIVE_HIGH	(1 << 15)
-+#define LTV_HSPL_ACTIVE_LOW	(0 << 14)
-+#define LTV_HSPL_ACTIVE_HIGH	(1 << 14)
-+#define LTV_DPL_SAMPLE_RISING	(0 << 13)
-+#define LTV_DPL_SAMPLE_FALLING	(1 << 13)
-+#define LTV_EPL_ACTIVE_LOW	(0 << 12)
-+#define LTV_EPL_ACTIVE_HIGH	(1 << 12)
-+#define LTV_SS_LEFT_TO_RIGHT	(0 <<  8)
-+#define LTV_SS_RIGHT_TO_LEFT	(1 <<  8)
-+#define LTV_STB			(1 <<  1)
++	  To compile this driver as a module, choose M here: the module will be
++	  called snd-at73c213.
++
++config SND_AT73C213_TARGET_BITRATE
++	int "Target bitrate for AT73C213"
++	depends on SND_AT73C213
++	default "48000"
++	range 8000 50000
++	help
++	  Sets the target bitrate for the bitrate calculator in the driver.
++	  Limited by hardware to be between 8000 Hz and 50000 Hz.
++
++	  Set to 48000 Hz by default.
++
++endmenu
+diff --git a/sound/spi/Makefile b/sound/spi/Makefile
+new file mode 100644
+index 0000000..026fb73
+--- /dev/null
++++ b/sound/spi/Makefile
+@@ -0,0 +1,5 @@
++# Makefile for SPI drivers
++
++snd-at73c213-objs		:= at73c213.o
++
++obj-$(CONFIG_SND_AT73C213)	+= snd-at73c213.o
+diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c
+new file mode 100644
+index 0000000..f514f47
+--- /dev/null
++++ b/sound/spi/at73c213.c
+@@ -0,0 +1,1121 @@
++/*
++ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
++ *
++ * Copyright (C) 2006-2007 Atmel Norway
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published by
++ * the Free Software Foundation.
++ */
++
++/*#define DEBUG*/
++
++#include <linux/clk.h>
++#include <linux/err.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/dma-mapping.h>
++#include <linux/init.h>
++#include <linux/interrupt.h>
++#include <linux/module.h>
++#include <linux/platform_device.h>
++#include <linux/io.h>
++
++#include <sound/driver.h>
++#include <sound/initval.h>
++#include <sound/control.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++
++#include <linux/atmel-ssc.h>
++
++#include <linux/spi/spi.h>
++#include <linux/spi/at73c213.h>
++
++#include "at73c213.h"
++
++#define BITRATE_MIN	 8000 /* Hardware limit? */
++#define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
++#define BITRATE_MAX	50000 /* Hardware limit. */
++
++/* Initial (hardware reset) AT73C213 register values. */
++static u8 snd_at73c213_original_image[18] =
++{
++	0x00,	/* 00 - CTRL    */
++	0x05,	/* 01 - LLIG    */
++	0x05,	/* 02 - RLIG    */
++	0x08,	/* 03 - LPMG    */
++	0x08,	/* 04 - RPMG    */
++	0x00,	/* 05 - LLOG    */
++	0x00,	/* 06 - RLOG    */
++	0x22,	/* 07 - OLC     */
++	0x09,	/* 08 - MC      */
++	0x00,	/* 09 - CSFC    */
++	0x00,	/* 0A - MISC    */
++	0x00,	/* 0B -         */
++	0x00,	/* 0C - PRECH   */
++	0x05,	/* 0D - AUXG    */
++	0x00,	/* 0E -         */
++	0x00,	/* 0F -         */
++	0x00,	/* 10 - RST     */
++	0x00,	/* 11 - PA_CTRL */
++};
++
++struct snd_at73c213 {
++	struct snd_card			*card;
++	struct snd_pcm			*pcm;
++	struct snd_pcm_substream	*substream;
++	struct at73c213_board_info	*board;
++	int				irq;
++	int				period;
++	unsigned long			bitrate;
++	struct clk			*bitclk;
++	struct ssc_device		*ssc;
++	struct spi_device		*spi;
++	u8				spi_wbuffer[2];
++	u8				spi_rbuffer[2];
++	/* Image of the SPI registers in AT73C213. */
++	u8				reg_image[18];
++	/* Protect registers against concurrent access. */
++	spinlock_t			lock;
++};
++
++#define get_chip(card) ((struct snd_at73c213 *)card->private_data)
++
++static int
++snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
++{
++	struct spi_message msg;
++	struct spi_transfer msg_xfer = {
++		.len		= 2,
++		.cs_change	= 0,
++	};
++	int retval;
++
++	spi_message_init(&msg);
++
++	chip->spi_wbuffer[0] = reg;
++	chip->spi_wbuffer[1] = val;
++
++	msg_xfer.tx_buf = chip->spi_wbuffer;
++	msg_xfer.rx_buf = chip->spi_rbuffer;
++	spi_message_add_tail(&msg_xfer, &msg);
++
++	retval = spi_sync(chip->spi, &msg);
++
++	if (!retval)
++		chip->reg_image[reg] = val;
++
++	return retval;
++}
++
++static struct snd_pcm_hardware snd_at73c213_playback_hw = {
++	.info		= SNDRV_PCM_INFO_INTERLEAVED |
++			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
++	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
++	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
++	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
++	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
++	.channels_min	= 2,
++	.channels_max	= 2,
++	.buffer_bytes_max = 64 * 1024 - 1,
++	.period_bytes_min = 512,
++	.period_bytes_max = 64 * 1024 - 1,
++	.periods_min	= 4,
++	.periods_max	= 1024,
++};
++
++/*
++ * Calculate and set bitrate and divisions.
++ */
++static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
++{
++	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
++	unsigned long dac_rate_new, ssc_div, status;
++	unsigned long ssc_div_max, ssc_div_min;
++	int max_tries;
++
++	/*
++	 * We connect two clocks here, picking divisors so the I2S clocks
++	 * out data at the same rate the DAC clocks it in ... and as close
++	 * as practical to the desired target rate.
++	 *
++	 * The DAC master clock (MCLK) is programmable, and is either 256
++	 * or (not here) 384 times the I2S output clock (BCLK).
++	 */
++
++	/* SSC clock / (bitrate * stereo * 16-bit). */
++	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
++	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
++	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
++	max_tries = (ssc_div_max - ssc_div_min) / 2;
++
++	if (max_tries < 1)
++		max_tries = 1;
++
++	/* ssc_div must be a power of 2. */
++	ssc_div = (ssc_div + 1) & ~1UL;
++
++	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
++		ssc_div -= 2;
++		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
++			return -ENXIO;
++	}
++
++	/* Search for a possible bitrate. */
++	do {
++		/* SSC clock / (ssc divider * 16-bit * stereo). */
++		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
++			return -ENXIO;
++
++		/* 256 / (2 * 16) = 8 */
++		dac_rate_new = 8 * (ssc_rate / ssc_div);
++
++		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
++		if (status < 0)
++			return status;
++
++		/* Ignore difference smaller than 256 Hz. */
++		if ((status/256) == (dac_rate_new/256))
++			goto set_rate;
++
++		ssc_div += 2;
++	} while (--max_tries);
++
++	/* Not able to find a valid bitrate. */
++	return -ENXIO;
++
++set_rate:
++	status = clk_set_rate(chip->board->dac_clk, status);
++	if (status < 0)
++		return status;
++
++	/* Set divider in SSC device. */
++	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
++
++	/* SSC clock / (ssc divider * 16-bit * stereo). */
++	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
++
++	dev_info(&chip->spi->dev,
++			"at73c213: supported bitrate is %lu (%lu divider)\n",
++			chip->bitrate, ssc_div);
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++
++	snd_at73c213_playback_hw.rate_min = chip->bitrate;
++	snd_at73c213_playback_hw.rate_max = chip->bitrate;
++	runtime->hw = snd_at73c213_playback_hw;
++	chip->substream = substream;
++
++	return 0;
++}
++
++static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	chip->substream = NULL;
++	return 0;
++}
++
++static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
++				 struct snd_pcm_hw_params *hw_params)
++{
++	return snd_pcm_lib_malloc_pages(substream,
++					params_buffer_bytes(hw_params));
++}
++
++static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream)
++{
++	return snd_pcm_lib_free_pages(substream);
++}
 +
-+/* Bit definitions for LTV_GATECTL1 */
-+#define LTV_CLW(x)		(((x) & 0x0007) << 12)
-+#define LTV_GAON		(1 <<  5)
-+#define LTV_SDR			(1 <<  3)
++static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	int block_size;
 +
-+/* Bit definitions for LTV_GATECTL2 */
-+#define LTV_NW_INV_FRAME	(0 << 14)
-+#define LTV_NW_INV_1LINE	(1 << 14)
-+#define LTV_NW_INV_2LINE	(2 << 14)
-+#define LTV_DSC			(1 << 12)
-+#define LTV_GIF			(1 <<  8)
-+#define LTV_FHN			(1 <<  7)
-+#define LTV_FTI(x)		(((x) & 0x0003) << 4)
-+#define LTV_FWI(x)		(((x) & 0x0003) << 0)
++	block_size = frames_to_bytes(runtime, runtime->period_size);
 +
-+/* Bit definitions for LTV_SOTCTL */
-+#define LTV_SDT(x)		(((x) & 0x0007) << 10)
-+#define LTV_EQ(x)		(((x) & 0x0007) <<  2)
++	chip->period = 0;
 +
-+/* Bit definitions for LTV_PWRCTL1 */
-+#define LTV_VCOM_DISABLE	(1 << 14)
-+#define LTV_VCOMOUT_ENABLE	(1 << 11)
-+#define LTV_POWER_ON		(1 <<  9)
-+#define LTV_DRIVE_CURRENT(x)	(((x) & 0x0007) << 4)	/* 0=off, 5=max */
-+#define LTV_SUPPLY_CURRENT(x)	(((x) & 0x0007) << 0)	/* 0=off, 5=max */
++	ssc_writel(chip->ssc->regs, PDC_TPR,
++			(long)runtime->dma_addr);
++	ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2);
++	ssc_writel(chip->ssc->regs, PDC_TNPR,
++			(long)runtime->dma_addr + block_size);
++	ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
 +
-+/* Bit definitions for LTV_PWRCTL2 */
-+#define LTV_VCOML_ENABLE	(1 << 13)
-+#define LTV_VCOML_VOLTAGE(x)	(((x) & 0x001f) << 8)	/* 0=1V, 31=-1V */
-+#define LTV_VCOMH_VOLTAGE(x)	(((x) & 0x001f) << 0)	/* 0=3V, 31=4.5V */
++	return 0;
++}
 +
-+#endif /* __LTV350QV_H */
-diff -x .git -Nur linux-2.6.22.1/drivers/video/backlight/Makefile linux-avr32.git/drivers/video/backlight/Makefile
---- linux-2.6.22.1/drivers/video/backlight/Makefile	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/video/backlight/Makefile	2007-07-12 14:00:20.000000000 +0200
-@@ -1,6 +1,8 @@
- # Backlight & LCD drivers
- 
- obj-$(CONFIG_LCD_CLASS_DEVICE)     += lcd.o
-+obj-$(CONFIG_LCD_LTV350QV)	+= ltv350qv.o
++static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
++				   int cmd)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	int retval = 0;
 +
- obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
- obj-$(CONFIG_BACKLIGHT_CORGI)	+= corgi_bl.o
- obj-$(CONFIG_BACKLIGHT_HP680)	+= hp680_bl.o
-diff -x .git -Nur linux-2.6.22.1/drivers/video/Kconfig linux-avr32.git/drivers/video/Kconfig
---- linux-2.6.22.1/drivers/video/Kconfig	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/drivers/video/Kconfig	2007-07-12 14:00:20.000000000 +0200
-@@ -849,6 +849,16 @@
- 	  Say Y if you want to map Frame Buffer in internal SRAM. Say N if you want
- 	  to let frame buffer in external SDRAM.
- 
-+config FB_ATMEL_STN
-+	bool "Use a STN display with AT91/AT32 LCD Controller"
-+	depends on FB_ATMEL && ARCH_AT91SAM9261
-+	default n
-+	help
-+	  Say Y if you want to connect a STN LCD display to the AT91/AT32 LCD
-+	  Controller. Say N if you want to connect a TFT.
++	spin_lock(&chip->lock);
 +
-+	  If unsure, say N.
++	switch (cmd) {
++	case SNDRV_PCM_TRIGGER_START:
++		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
++		break;
++	case SNDRV_PCM_TRIGGER_STOP:
++		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
++		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
++		break;
++	default:
++		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
++		retval = -EINVAL;
++		break;
++	}
 +
- config FB_NVIDIA
- 	tristate "nVidia Framebuffer Support"
- 	depends on FB && PCI
-diff -x .git -Nur linux-2.6.22.1/include/asm-arm/arch-at91/board.h linux-avr32.git/include/asm-arm/arch-at91/board.h
---- linux-2.6.22.1/include/asm-arm/arch-at91/board.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/asm-arm/arch-at91/board.h	2007-07-12 14:00:26.000000000 +0200
-@@ -64,6 +64,7 @@
- 
-  /* Ethernet (EMAC & MACB) */
- struct at91_eth_data {
-+	u32		phy_mask;
- 	u8		phy_irq_pin;	/* PHY IRQ */
- 	u8		is_rmii;	/* using RMII interface? */
- };
-diff -x .git -Nur linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h linux-avr32.git/include/asm-avr32/arch-at32ap/board.h
---- linux-2.6.22.1/include/asm-avr32/arch-at32ap/board.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/asm-avr32/arch-at32ap/board.h	2007-07-12 14:00:26.000000000 +0200
-@@ -6,6 +6,8 @@
- 
- #include <linux/types.h>
- 
-+#define GPIO_PIN_NONE	(-1)
++	spin_unlock(&chip->lock);
 +
- /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
- void at32_add_system_devices(void);
- 
-@@ -21,6 +23,7 @@
- struct platform_device *at32_add_device_usart(unsigned int id);
- 
- struct eth_platform_data {
-+	u32	phy_mask;
- 	u8	is_rmii;
- };
- struct platform_device *
-@@ -30,9 +33,41 @@
- struct platform_device *
- at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);
- 
-+struct platform_device *at32_add_device_twi(unsigned int id);
++	return retval;
++}
 +
-+struct mci_platform_data {
-+	int detect_pin;
-+	int wp_pin;
-+};
-+struct platform_device *
-+at32_add_device_mci(unsigned int id, struct mci_platform_data *data);
++static snd_pcm_uframes_t
++snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
++{
++	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
++	struct snd_pcm_runtime *runtime = substream->runtime;
++	snd_pcm_uframes_t pos;
++	unsigned long bytes;
 +
-+struct usba_platform_data {
-+	int vbus_pin;
++	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
++		- (unsigned long)runtime->dma_addr;
++
++	pos = bytes_to_frames(runtime, bytes);
++	if (pos >= runtime->buffer_size)
++		pos -= runtime->buffer_size;
++
++	return pos;
++}
++
++static struct snd_pcm_ops at73c213_playback_ops = {
++	.open		= snd_at73c213_pcm_open,
++	.close		= snd_at73c213_pcm_close,
++	.ioctl		= snd_pcm_lib_ioctl,
++	.hw_params	= snd_at73c213_pcm_hw_params,
++	.hw_free	= snd_at73c213_pcm_hw_free,
++	.prepare	= snd_at73c213_pcm_prepare,
++	.trigger	= snd_at73c213_pcm_trigger,
++	.pointer	= snd_at73c213_pcm_pointer,
 +};
-+struct platform_device *
-+at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
 +
- struct atmel_lcdfb_info;
- struct platform_device *
- at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
- 		     unsigned long fbmem_start, unsigned long fbmem_len);
- 
-+struct platform_device *at32_add_device_ac97c(unsigned int id);
-+struct platform_device *at32_add_device_abdac(unsigned int id);
++static void snd_at73c213_pcm_free(struct snd_pcm *pcm)
++{
++	struct snd_at73c213 *chip = snd_pcm_chip(pcm);
++	if (chip->pcm) {
++		snd_pcm_lib_preallocate_free_for_all(chip->pcm);
++		chip->pcm = NULL;
++	}
++}
 +
-+/* depending on what's hooked up, not all SSC pins will be used */
-+#define	ATMEL_SSC_TK		0x01
-+#define	ATMEL_SSC_TF		0x02
-+#define	ATMEL_SSC_TD		0x04
-+#define	ATMEL_SSC_TX		(ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)
++static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
++{
++	struct snd_pcm *pcm;
++	int retval;
 +
-+#define	ATMEL_SSC_RK		0x10
-+#define	ATMEL_SSC_RF		0x20
-+#define	ATMEL_SSC_RD		0x40
-+#define	ATMEL_SSC_RX		(ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)
++	retval = snd_pcm_new(chip->card, chip->card->shortname,
++			device, 1, 0, &pcm);
++	if (retval < 0)
++		goto out;
 +
-+struct platform_device *
-+at32_add_device_ssc(unsigned int id, unsigned int flags);
++	pcm->private_data = chip;
++	pcm->private_free = snd_at73c213_pcm_free;
++	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
++	strcpy(pcm->name, "at73c213");
++	chip->pcm = pcm;
 +
- #endif /* __ASM_ARCH_BOARD_H */
-diff -x .git -Nur linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h linux-avr32.git/include/asm-avr32/arch-at32ap/portmux.h
---- linux-2.6.22.1/include/asm-avr32/arch-at32ap/portmux.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/asm-avr32/arch-at32ap/portmux.h	2007-07-12 14:00:26.000000000 +0200
-@@ -25,4 +25,16 @@
- void at32_select_gpio(unsigned int pin, unsigned long flags);
- void at32_reserve_pin(unsigned int pin);
- 
-+#ifdef CONFIG_GPIO_DEV
++	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
 +
-+/* Gang allocators and accessors; used by the GPIO /dev driver */
-+int at32_gpio_port_is_valid(unsigned int port);
-+int at32_select_gpio_pins(unsigned int port, u32 pins, u32 oe_mask);
-+void at32_deselect_pins(unsigned int port, u32 pins);
++	retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm,
++			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
++			64 * 1024, 64 * 1024);
++out:
++	return retval;
++}
 +
-+u32 at32_gpio_get_value_multiple(unsigned int port, u32 pins);
-+void at32_gpio_set_value_multiple(unsigned int port, u32 value, u32 mask);
++static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
++{
++	struct snd_at73c213 *chip = dev_id;
++	struct snd_pcm_runtime *runtime = chip->substream->runtime;
++	u32 status;
++	int offset;
++	int block_size;
++	int next_period;
++	int retval = IRQ_NONE;
 +
-+#endif /* CONFIG_GPIO_DEV */
++	spin_lock(&chip->lock);
++
++	block_size = frames_to_bytes(runtime, runtime->period_size);
++	status = ssc_readl(chip->ssc->regs, IMR);
++
++	if (status & SSC_BIT(IMR_ENDTX)) {
++		chip->period++;
++		if (chip->period == runtime->periods)
++			chip->period = 0;
++		next_period = chip->period + 1;
++		if (next_period == runtime->periods)
++			next_period = 0;
++
++		offset = block_size * next_period;
++
++		ssc_writel(chip->ssc->regs, PDC_TNPR,
++				(long)runtime->dma_addr + offset);
++		ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2);
++		retval = IRQ_HANDLED;
++	}
++
++	ssc_readl(chip->ssc->regs, IMR);
++	spin_unlock(&chip->lock);
++
++	if (status & SSC_BIT(IMR_ENDTX))
++		snd_pcm_period_elapsed(chip->substream);
++
++	return retval;
++}
 +
- #endif /* __ASM_ARCH_PORTMUX_H__ */
-diff -x .git -Nur linux-2.6.22.1/include/asm-avr32/arch-at32ap/sm.h linux-avr32.git/include/asm-avr32/arch-at32ap/sm.h
---- linux-2.6.22.1/include/asm-avr32/arch-at32ap/sm.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/asm-avr32/arch-at32ap/sm.h	1970-01-01 01:00:00.000000000 +0100
-@@ -1,27 +0,0 @@
--/*
-- * AT32 System Manager interface.
-- *
-- * Copyright (C) 2006 Atmel Corporation
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--#ifndef __ASM_AVR32_AT32_SM_H__
--#define __ASM_AVR32_AT32_SM_H__
--
--struct irq_chip;
--struct platform_device;
--
--struct at32_sm {
--	spinlock_t lock;
--	void __iomem *regs;
--	struct irq_chip *eim_chip;
--	unsigned int eim_first_irq;
--	struct platform_device *pdev;
--};
--
--extern struct platform_device at32_sm_device;
--extern struct at32_sm system_manager;
--
--#endif /* __ASM_AVR32_AT32_SM_H__ */
-diff -x .git -Nur linux-2.6.22.1/include/asm-avr32/dma-controller.h linux-avr32.git/include/asm-avr32/dma-controller.h
---- linux-2.6.22.1/include/asm-avr32/dma-controller.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/include/asm-avr32/dma-controller.h	2007-06-06 11:34:11.000000000 +0200
-@@ -0,0 +1,166 @@
 +/*
-+ * Copyright (C) 2005-2006 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
++ * Mixer functions.
 + */
-+#ifndef __ASM_AVR32_DMA_CONTROLLER_H
-+#define __ASM_AVR32_DMA_CONTROLLER_H
++static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
 +
-+#include <linux/device.h>
++	spin_lock_irq(&chip->lock);
 +
-+#define DMA_DIR_MEM_TO_MEM		0x0000
-+#define DMA_DIR_MEM_TO_PERIPH		0x0001
-+#define DMA_DIR_PERIPH_TO_MEM		0x0002
-+#define DMA_DIR_PERIPH_TO_PERIPH	0x0003
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask;
 +
-+#define DMA_WIDTH_8BIT			0
-+#define DMA_WIDTH_16BIT			1
-+#define DMA_WIDTH_32BIT			2
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
 +
-+struct dma_request {
-+	struct dma_controller *dmac;
-+	struct list_head list;
++	spin_unlock_irq(&chip->lock);
 +
-+	unsigned short channel;
++	return 0;
++}
 +
-+	void (*xfer_complete)(struct dma_request *req);
-+	void (*block_complete)(struct dma_request *req);
-+	void (*error)(struct dma_request *req);
-+};
++static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
 +
-+struct dma_request_sg {
-+	struct dma_request req;
++	val = (ucontrol->value.integer.value[0] & mask);
++	if (invert)
++		val = mask - val;
++	val <<= shift;
 +
-+	int nr_sg;
-+	struct scatterlist *sg;
-+	unsigned long block_size;
-+	unsigned int nr_blocks;
++	spin_lock_irq(&chip->lock);
 +
-+	dma_addr_t data_reg;
-+	unsigned short periph_id;
++	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
++	change = val != chip->reg_image[reg];
++	retval = snd_at73c213_write_reg(chip, reg, val);
 +
-+	unsigned char direction;
-+	unsigned char width;
-+};
-+#define to_dma_request_sg(_req)				\
-+	container_of(_req, struct dma_request_sg, req)
++	spin_unlock_irq(&chip->lock);
 +
-+struct dma_request_cyclic {
-+	struct dma_request req;
++	if (retval)
++		return retval;
 +
-+        int periods;
-+	unsigned long buffer_size;
++	return change;
++}
 +
-+        dma_addr_t buffer_start;
-+	dma_addr_t data_reg;
++static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	int mask = (kcontrol->private_value >> 24) & 0xff;
 +
-+	unsigned short periph_id;
-+	unsigned char direction;
-+	unsigned char width;
++	if (mask == 1)
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	else
++		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
 +
-+        void *dev_id;
-+};
-+#define to_dma_request_cyclic(_req)				\
-+	container_of(_req, struct dma_request_cyclic, req)
++	uinfo->count = 2;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = mask;
 +
-+struct dma_request_memcpy {
-+	struct dma_request req;
++	return 0;
++}
 +
-+	dma_addr_t src_addr;
-+	unsigned int src_width;
-+	unsigned int src_stride;
++static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
 +
-+	dma_addr_t dst_addr;
-+	unsigned int dst_width;
-+	unsigned int dst_stride;
++	spin_lock_irq(&chip->lock);
 +
-+	size_t length;
++	ucontrol->value.integer.value[0] =
++		(chip->reg_image[left_reg] >> shift_left) & mask;
++	ucontrol->value.integer.value[1] =
++		(chip->reg_image[right_reg] >> shift_right) & mask;
 +
-+	unsigned short src_reverse:1;
-+	unsigned short dst_reverse:1;
-+};
-+#define to_dma_request_memcpy(_req)				\
-+	container_of(_req, struct dma_request_memcpy, req)
++	if (invert) {
++		ucontrol->value.integer.value[0] =
++			(mask - ucontrol->value.integer.value[0]);
++		ucontrol->value.integer.value[1] =
++			(mask - ucontrol->value.integer.value[1]);
++	}
 +
-+struct dma_controller {
-+	struct list_head list;
-+	int id;
-+	struct device *dev;
++	spin_unlock_irq(&chip->lock);
 +
-+	int (*alloc_channel)(struct dma_controller *dmac);
-+	void (*release_channel)(struct dma_controller *dmac,
-+				int channel);
-+	int (*prepare_request_sg)(struct dma_controller *dmac,
-+				  struct dma_request_sg *req);
-+        int (*prepare_request_cyclic)(struct dma_controller *dmac,
-+				      struct dma_request_cyclic *req);
-+	int (*prepare_request_memcpy)(struct dma_controller *dmac,
-+				      struct dma_request_memcpy *req);
-+	int (*start_request)(struct dma_controller *dmac,
-+			     unsigned int channel);
-+	int (*stop_request)(struct dma_controller *dmac,
-+                            unsigned int channel);
-+        dma_addr_t (*get_current_pos)(struct dma_controller *dmac,
-+                                      unsigned int channel);
-+};
++	return 0;
++}
++
++static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int left_reg = kcontrol->private_value & 0xff;
++	int right_reg = (kcontrol->private_value >> 8) & 0xff;
++	int shift_left = (kcontrol->private_value >> 16) & 0x07;
++	int shift_right = (kcontrol->private_value >> 19) & 0x07;
++	int mask = (kcontrol->private_value >> 24) & 0xff;
++	int invert = (kcontrol->private_value >> 22) & 1;
++	int change, retval;
++	unsigned short val1, val2;
++
++	val1 = ucontrol->value.integer.value[0] & mask;
++	val2 = ucontrol->value.integer.value[1] & mask;
++	if (invert) {
++		val1 = mask - val1;
++		val2 = mask - val2;
++	}
++	val1 <<= shift_left;
++	val2 <<= shift_right;
++
++	spin_lock_irq(&chip->lock);
++
++	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
++	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
++	change = val1 != chip->reg_image[left_reg]
++		|| val2 != chip->reg_image[right_reg];
++	retval = snd_at73c213_write_reg(chip, left_reg, val1);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++	retval = snd_at73c213_write_reg(chip, right_reg, val2);
++	if (retval) {
++		spin_unlock_irq(&chip->lock);
++		goto out;
++	}
++
++	spin_unlock_irq(&chip->lock);
++
++	return change;
++
++out:
++	return retval;
++}
++
++static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
++{
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = 1;
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++
++	spin_lock_irq(&chip->lock);
++
++	ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01;
++
++	if (invert)
++		ucontrol->value.integer.value[0] =
++			(0x01 - ucontrol->value.integer.value[0]);
++
++	spin_unlock_irq(&chip->lock);
++
++	return 0;
++}
++
++static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
++				 struct snd_ctl_elem_value *ucontrol)
++{
++	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
++	int reg = kcontrol->private_value & 0xff;
++	int shift = (kcontrol->private_value >> 8) & 0xff;
++	int mask = (kcontrol->private_value >> 16) & 0xff;
++	int invert = (kcontrol->private_value >> 24) & 0xff;
++	int change, retval;
++	unsigned short val;
++
++	if (ucontrol->value.integer.value[0])
++		val = mask;
++	else
++		val = 0;
 +
-+static inline int
-+dma_alloc_channel(struct dma_controller *dmac)
++	if (invert)
++		val = mask - val;
++	val <<= shift;
++
++	spin_lock_irq(&chip->lock);
++
++	val |= (chip->reg_image[reg] & ~(mask << shift));
++	change = val != chip->reg_image[reg];
++
++	retval = snd_at73c213_write_reg(chip, reg, val);
++
++	spin_unlock_irq(&chip->lock);
++
++	if (retval)
++		return retval;
++
++	return change;
++}
++
++static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
++				  struct snd_ctl_elem_info *uinfo)
 +{
-+	return dmac->alloc_channel(dmac);
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	uinfo->value.integer.min = 0;
++	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
++
++	return 0;
 +}
 +
-+static inline void
-+dma_release_channel(struct dma_controller *dmac, int chan)
++static int snd_at73c213_line_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
 +{
-+	dmac->release_channel(dmac, chan);
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 2;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
 +}
 +
-+static inline int
-+dma_prepare_request_sg(struct dma_controller *dmac,
-+		       struct dma_request_sg *req)
++static int snd_at73c213_aux_capture_volume_info(
++		struct snd_kcontrol *kcontrol,
++		struct snd_ctl_elem_info *uinfo)
 +{
-+	return dmac->prepare_request_sg(dmac, req);
++	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
++	uinfo->count = 1;
++	/* When inverted will give values 0x10001 => 0. */
++	uinfo->value.integer.min = 14;
++	uinfo->value.integer.max = 31;
++
++	return 0;
 +}
 +
-+static inline int
-+dma_prepare_request_cyclic(struct dma_controller *dmac,
-+			   struct dma_request_cyclic *req)
++#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_mono_switch_info,				\
++	.get = snd_at73c213_mono_switch_get,				\
++	.put = snd_at73c213_mono_switch_put,				\
++	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
++}
++
++#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
++{									\
++	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
++	.name = xname,							\
++	.index = xindex,						\
++	.info = snd_at73c213_stereo_info,				\
++	.get = snd_at73c213_stereo_get,					\
++	.put = snd_at73c213_stereo_put,					\
++	.private_value = (left_reg | (right_reg << 8)			\
++			| (shift_left << 16) | (shift_right << 19)	\
++			| (mask << 24) | (invert << 22))		\
++}
++
++static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = {
++AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
++AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
++AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
++AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "PA Playback Volume",
++	.index	= 0,
++	.info	= snd_at73c213_pa_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1),
++AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Aux Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_aux_capture_volume_info,
++	.get	= snd_at73c213_mono_get,
++	.put	= snd_at73c213_mono_put,
++	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
++},
++AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0),
++{
++	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
++	.name	= "Line Capture Volume",
++	.index	= 0,
++	.info	= snd_at73c213_line_capture_volume_info,
++	.get	= snd_at73c213_stereo_get,
++	.put	= snd_at73c213_stereo_put,
++	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
++		| (0x1f << 24) | (1 << 22),
++},
++AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
++};
++
++static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip)
 +{
-+	return dmac->prepare_request_cyclic(dmac, req);
++	struct snd_card *card;
++	int errval, idx;
++
++	if (chip == NULL || chip->pcm == NULL)
++		return -EINVAL;
++
++	card = chip->card;
++
++	strcpy(card->mixername, chip->pcm->name);
++
++	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
++		errval = snd_ctl_add(card,
++				snd_ctl_new1(&snd_at73c213_controls[idx],
++					chip));
++		if (errval < 0)
++			goto cleanup;
++	}
++
++	return 0;
++
++cleanup:
++	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
++		struct snd_kcontrol *kctl;
++		kctl = snd_ctl_find_numid(card, idx);
++		if (kctl)
++			snd_ctl_remove(card, kctl);
++	}
++	return errval;
 +}
 +
-+static inline int
-+dma_prepare_request_memcpy(struct dma_controller *dmac,
-+			   struct dma_request_memcpy *req)
++/*
++ * Device functions
++ */
++static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
 +{
-+	return dmac->prepare_request_memcpy(dmac, req);
++	/*
++	 * Continuous clock output.
++	 * Starts on falling TF.
++	 * Delay 1 cycle (1 bit).
++	 * Periode is 16 bit (16 - 1).
++	 */
++	ssc_writel(chip->ssc->regs, TCMR,
++			SSC_BF(TCMR_CKO, 1)
++			| SSC_BF(TCMR_START, 4)
++			| SSC_BF(TCMR_STTDLY, 1)
++			| SSC_BF(TCMR_PERIOD, 16 - 1));
++	/*
++	 * Data length is 16 bit (16 - 1).
++	 * Transmit MSB first.
++	 * Transmit 2 words each transfer.
++	 * Frame sync length is 16 bit (16 - 1).
++	 * Frame starts on negative pulse.
++	 */
++	ssc_writel(chip->ssc->regs, TFMR,
++			SSC_BF(TFMR_DATLEN, 16 - 1)
++			| SSC_BIT(TFMR_MSBF)
++			| SSC_BF(TFMR_DATNB, 1)
++			| SSC_BF(TFMR_FSLEN, 16 - 1)
++			| SSC_BF(TFMR_FSOS, 1));
++
++	return 0;
 +}
 +
-+static inline int
-+dma_start_request(struct dma_controller *dmac,
-+		  unsigned int channel)
++static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
 +{
-+	return dmac->start_request(dmac, channel);
++	int retval;
++	unsigned char dac_ctrl = 0;
++
++	retval = snd_at73c213_set_bitrate(chip);
++	if (retval)
++		goto out;
++
++	/* Enable DAC master clock. */
++	clk_enable(chip->board->dac_clk);
++
++	/* Initialize at73c213 on SPI bus. */
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
++	if (retval)
++		goto out_clk;
++	msleep(1);
++	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
++	if (retval)
++		goto out_clk;
++
++	/* Precharge everything. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
++			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
++	if (retval)
++		goto out_clk;
++
++	msleep(50);
++
++	/* Stop precharging PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL,
++			(1<<PA_CTRL_APALP) | 0x0f);
++	if (retval)
++		goto out_clk;
++
++	msleep(450);
++
++	/* Stop precharging DAC, turn on master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
++	if (retval)
++		goto out_clk;
++
++	msleep(1);
++
++	/* Turn on DAC. */
++	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
++		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
++
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
++	if (retval)
++		goto out_clk;
++
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out_clk;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out_clk;
++
++	/* Enable I2S device, i.e. clock output. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
++
++	goto out;
++
++out_clk:
++	clk_disable(chip->board->dac_clk);
++out:
++	return retval;
 +}
 +
-+static inline int
-+dma_stop_request(struct dma_controller *dmac,
-+                 unsigned int channel)
++static int snd_at73c213_dev_free(struct snd_device *device)
 +{
-+	return dmac->stop_request(dmac, channel);
++	struct snd_at73c213 *chip = device->device_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	if (chip->irq >= 0) {
++		free_irq(chip->irq, chip);
++		chip->irq = -1;
++	}
++
++	return 0;
 +}
 +
-+static inline dma_addr_t
-+dma_get_current_pos(struct dma_controller *dmac,
-+                    unsigned int channel)
++static int __devinit snd_at73c213_dev_init(struct snd_card *card,
++					 struct spi_device *spi)
 +{
-+	return dmac->get_current_pos(dmac, channel);
++	static struct snd_device_ops ops = {
++		.dev_free	= snd_at73c213_dev_free,
++	};
++	struct snd_at73c213 *chip = get_chip(card);
++	int irq, retval;
++
++	irq = chip->ssc->irq;
++	if (irq < 0)
++		return irq;
++
++	spin_lock_init(&chip->lock);
++	chip->card = card;
++	chip->irq = -1;
++
++	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
++	if (retval) {
++		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
++		goto out;
++	}
++	chip->irq = irq;
++
++	memcpy(&chip->reg_image, &snd_at73c213_original_image,
++			sizeof(snd_at73c213_original_image));
++
++	retval = snd_at73c213_ssc_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_chip_init(chip);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_pcm_new(chip, 0);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
++	if (retval)
++		goto out_irq;
++
++	retval = snd_at73c213_mixer(chip);
++	if (retval)
++		goto out_snd_dev;
++
++	snd_card_set_dev(card, &spi->dev);
++
++	goto out;
++
++out_snd_dev:
++	snd_device_free(card, chip);
++out_irq:
++	free_irq(chip->irq, chip);
++	chip->irq = -1;
++out:
++	return retval;
 +}
 +
-+extern int register_dma_controller(struct dma_controller *dmac);
-+extern struct dma_controller *find_dma_controller(int id);
++static int snd_at73c213_probe(struct spi_device *spi)
++{
++	struct snd_card			*card;
++	struct snd_at73c213		*chip;
++	struct at73c213_board_info	*board;
++	int				retval;
++	char				id[16];
 +
-+#endif /* __ASM_AVR32_DMA_CONTROLLER_H */
-diff -x .git -Nur linux-2.6.22.1/include/asm-avr32/unaligned.h linux-avr32.git/include/asm-avr32/unaligned.h
---- linux-2.6.22.1/include/asm-avr32/unaligned.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/asm-avr32/unaligned.h	2007-07-12 14:00:26.000000000 +0200
-@@ -7,19 +7,10 @@
-  * words, but halfwords must be halfword-aligned, and doublewords must
-  * be word-aligned.
-  *
-- * TODO: Make all this CPU-specific and optimize.
-+ * However, swapped word loads must be word-aligned so we can't
-+ * optimize word loads in general.
-  */
- 
--#include <linux/string.h>
--
--/* Use memmove here, so gcc does not insert a __builtin_memcpy. */
--
--#define get_unaligned(ptr) \
--  ({ __typeof__(*(ptr)) __tmp; memmove(&__tmp, (ptr), sizeof(*(ptr))); __tmp; })
--
--#define put_unaligned(val, ptr)				\
--  ({ __typeof__(*(ptr)) __tmp = (val);			\
--     memmove((ptr), &__tmp, sizeof(*(ptr)));		\
--     (void)0; })
-+#include <asm-generic/unaligned.h>
- 
- #endif /* __ASM_AVR32_UNALIGNED_H */
-diff -x .git -Nur linux-2.6.22.1/include/linux/gpio_mouse.h linux-avr32.git/include/linux/gpio_mouse.h
---- linux-2.6.22.1/include/linux/gpio_mouse.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/include/linux/gpio_mouse.h	2007-07-13 11:24:16.000000000 +0200
-@@ -0,0 +1,61 @@
-+/*
-+ * Driver for simulating a mouse on GPIO lines.
-+ *
-+ * Copyright (C) 2007 Atmel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
++	board = spi->dev.platform_data;
++	if (!board) {
++		dev_dbg(&spi->dev, "no platform_data\n");
++		return -ENXIO;
++	}
 +
-+#ifndef _GPIO_MOUSE_H
-+#define _GPIO_MOUSE_H
++	if (!board->dac_clk) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return -ENXIO;
++	}
 +
-+#define GPIO_MOUSE_POLARITY_ACT_HIGH	0x00
-+#define GPIO_MOUSE_POLARITY_ACT_LOW	0x01
++	if (IS_ERR(board->dac_clk)) {
++		dev_dbg(&spi->dev, "no DAC clk\n");
++		return PTR_ERR(board->dac_clk);
++	}
 +
-+#define GPIO_MOUSE_PIN_UP	0
-+#define GPIO_MOUSE_PIN_DOWN	1
-+#define GPIO_MOUSE_PIN_LEFT	2
-+#define GPIO_MOUSE_PIN_RIGHT	3
-+#define GPIO_MOUSE_PIN_BLEFT	4
-+#define GPIO_MOUSE_PIN_BMIDDLE	5
-+#define GPIO_MOUSE_PIN_BRIGHT	6
-+#define GPIO_MOUSE_PIN_MAX	7
++	retval = -ENOMEM;
 +
-+/**
-+ * struct gpio_mouse_platform_data
-+ * @scan_ms: integer in ms specifying the scan periode.
-+ * @polarity: Pin polarity, active high or low.
-+ * @up: GPIO line for up value.
-+ * @down: GPIO line for down value.
-+ * @left: GPIO line for left value.
-+ * @right: GPIO line for right value.
-+ * @bleft: GPIO line for left button.
-+ * @bmiddle: GPIO line for middle button.
-+ * @bright: GPIO line for right button.
-+ *
-+ * This struct must be added to the platform_device in the board code.
-+ * It is used by the gpio_mouse driver to setup GPIO lines and to
-+ * calculate mouse movement.
-+ */
-+struct gpio_mouse_platform_data {
-+	int scan_ms;
-+	int polarity;
++	/* Allocate "card" using some unused identifiers. */
++	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
++	card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213));
++	if (!card)
++		goto out;
 +
-+	union {
-+		struct {
-+			int up;
-+			int down;
-+			int left;
-+			int right;
-+
-+			int bleft;
-+			int bmiddle;
-+			int bright;
-+		};
-+		int pins[GPIO_MOUSE_PIN_MAX];
-+	};
-+};
++	chip = card->private_data;
++	chip->spi = spi;
++	chip->board = board;
 +
-+#endif /* _GPIO_MOUSE_H */
-diff -x .git -Nur linux-2.6.22.1/include/linux/leds.h linux-avr32.git/include/linux/leds.h
---- linux-2.6.22.1/include/linux/leds.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/linux/leds.h	2007-07-12 14:00:30.000000000 +0200
-@@ -110,4 +110,18 @@
- #define ledtrig_ide_activity() do {} while(0)
- #endif
- 
-+/* For the leds-gpio driver */
-+struct gpio_led {
-+	const char *name;
-+	char *default_trigger;
-+	unsigned 	gpio;
-+	u8 		active_low;
-+};
++	chip->ssc = ssc_request(board->ssc_id);
++	if (IS_ERR(chip->ssc)) {
++		dev_dbg(&spi->dev, "could not get ssc%d device\n",
++				board->ssc_id);
++		retval = PTR_ERR(chip->ssc);
++		goto out_card;
++	}
 +
-+struct gpio_led_platform_data {
-+	int 		num_leds;
-+	struct gpio_led *leds;
-+};
++	retval = snd_at73c213_dev_init(card, spi);
++	if (retval)
++		goto out_ssc;
 +
++	strcpy(card->driver, "at73c213");
++	strcpy(card->shortname, board->shortname);
++	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
 +
- #endif		/* __LINUX_LEDS_H_INCLUDED */
-diff -x .git -Nur linux-2.6.22.1/include/linux/usb/gadgetfs.h linux-avr32.git/include/linux/usb/gadgetfs.h
---- linux-2.6.22.1/include/linux/usb/gadgetfs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-avr32.git/include/linux/usb/gadgetfs.h	2007-07-12 14:00:31.000000000 +0200
-@@ -0,0 +1,81 @@
-+#ifndef __LINUX_USB_GADGETFS_H
-+#define __LINUX_USB_GADGETFS_H
++	retval = snd_card_register(card);
++	if (retval)
++		goto out_ssc;
 +
-+#include <asm/types.h>
-+#include <asm/ioctl.h>
++	dev_set_drvdata(&spi->dev, card);
 +
-+#include <linux/usb/ch9.h>
++	goto out;
 +
-+/*
-+ * Filesystem based user-mode API to USB Gadget controller hardware
-+ *
-+ * Other than ep0 operations, most things are done by read() and write()
-+ * on endpoint files found in one directory.  They are configured by
-+ * writing descriptors, and then may be used for normal stream style
-+ * i/o requests.  When ep0 is configured, the device can enumerate;
-+ * when it's closed, the device disconnects from usb.  Operations on
-+ * ep0 require ioctl() operations.
-+ *
-+ * Configuration and device descriptors get written to /dev/gadget/$CHIP,
-+ * which may then be used to read usb_gadgetfs_event structs.  The driver
-+ * may activate endpoints as it handles SET_CONFIGURATION setup events,
-+ * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT
-+ * then performing data transfers by reading or writing.
-+ */
++out_ssc:
++	ssc_free(chip->ssc);
++out_card:
++	snd_card_free(card);
++out:
++	return retval;
++}
 +
-+/*
-+ * Events are delivered on the ep0 file descriptor, when the user mode driver
-+ * reads from this file descriptor after writing the descriptors.  Don't
-+ * stop polling this descriptor.
-+ */
++static int __devexit snd_at73c213_remove(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++	int retval;
 +
-+enum usb_gadgetfs_event_type {
-+	GADGETFS_NOP = 0,
++	/* Stop playback. */
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
 +
-+	GADGETFS_CONNECT,
-+	GADGETFS_DISCONNECT,
-+	GADGETFS_SETUP,
-+	GADGETFS_SUSPEND,
-+	// and likely more !
-+};
++	/* Mute sound. */
++	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
++	if (retval)
++		goto out;
++	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
++	if (retval)
++		goto out;
 +
-+/* NOTE:  this structure must stay the same size and layout on
-+ * both 32-bit and 64-bit kernels.
-+ */
-+struct usb_gadgetfs_event {
-+	union {
-+		// NOP, DISCONNECT, SUSPEND: nothing
-+		// ... some hardware can't report disconnection
-+
-+		// CONNECT: just the speed
-+		enum usb_device_speed	speed;
-+
-+		// SETUP: packet; DATA phase i/o precedes next event
-+		// (setup.bmRequestType & USB_DIR_IN) flags direction
-+		// ... includes SET_CONFIGURATION, SET_INTERFACE
-+		struct usb_ctrlrequest	setup;
-+	} u;
-+	enum usb_gadgetfs_event_type	type;
-+};
++	/* Turn off PA. */
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f));
++	if (retval)
++		goto out;
++	msleep(10);
++	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f);
++	if (retval)
++		goto out;
 +
++	/* Turn off external DAC. */
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
++	if (retval)
++		goto out;
++	msleep(2);
++	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
++	if (retval)
++		goto out;
 +
-+/* endpoint ioctls */
++	/* Turn off master power. */
++	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
++	if (retval)
++		goto out;
 +
-+/* IN transfers may be reported to the gadget driver as complete
-+ *	when the fifo is loaded, before the host reads the data;
-+ * OUT transfers may be reported to the host's "client" driver as
-+ *	complete when they're sitting in the FIFO unread.
-+ * THIS returns how many bytes are "unclaimed" in the endpoint fifo
-+ * (needed for precise fault handling, when the hardware allows it)
-+ */
-+#define	GADGETFS_FIFO_STATUS	_IO('g',1)
++out:
++	/* Stop DAC master clock. */
++	clk_disable(chip->board->dac_clk);
 +
-+/* discards any unclaimed data in the fifo. */
-+#define	GADGETFS_FIFO_FLUSH	_IO('g',2)
++	ssc_free(chip->ssc);
++	snd_card_free(card);
++	dev_set_drvdata(&spi->dev, NULL);
 +
-+/* resets endpoint halt+toggle; used to implement set_interface.
-+ * some hardware (like pxa2xx) can't support this.
-+ */
-+#define	GADGETFS_CLEAR_HALT	_IO('g',3)
-+
-+#endif /* __LINUX_USB_GADGETFS_H */
-diff -x .git -Nur linux-2.6.22.1/include/linux/usb/Kbuild linux-avr32.git/include/linux/usb/Kbuild
---- linux-2.6.22.1/include/linux/usb/Kbuild	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/linux/usb/Kbuild	2007-07-12 14:00:31.000000000 +0200
-@@ -1,5 +1,6 @@
- unifdef-y += audio.h
- unifdef-y += cdc.h
- unifdef-y += ch9.h
-+unifdef-y += gadgetfs.h
- unifdef-y += midi.h
- 
-diff -x .git -Nur linux-2.6.22.1/include/linux/usb_gadgetfs.h linux-avr32.git/include/linux/usb_gadgetfs.h
---- linux-2.6.22.1/include/linux/usb_gadgetfs.h	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/include/linux/usb_gadgetfs.h	1970-01-01 01:00:00.000000000 +0100
-@@ -1,75 +0,0 @@
--
--#include <asm/types.h>
--#include <asm/ioctl.h>
--
--#include <linux/usb/ch9.h>
--
--/*
-- * Filesystem based user-mode API to USB Gadget controller hardware
-- *
-- * Almost everything can be done with only read and write operations,
-- * on endpoint files found in one directory.  They are configured by
-- * writing descriptors, and then may be used for normal stream style
-- * i/o requests.  When ep0 is configured, the device can enumerate;
-- * when it's closed, the device disconnects from usb.
-- *
-- * Configuration and device descriptors get written to /dev/gadget/$CHIP,
-- * which may then be used to read usb_gadgetfs_event structs.  The driver
-- * may activate endpoints as it handles SET_CONFIGURATION setup events,
-- * or earlier; writing endpoint descriptors to /dev/gadget/$ENDPOINT
-- * then performing data transfers by reading or writing.
-- */
--
--/*
-- * Events are delivered on the ep0 file descriptor, if the user mode driver
-- * reads from this file descriptor after writing the descriptors.  Don't
-- * stop polling this descriptor, if you write that kind of driver.
-- */
--
--enum usb_gadgetfs_event_type {
--	GADGETFS_NOP = 0,
--
--	GADGETFS_CONNECT,
--	GADGETFS_DISCONNECT,
--	GADGETFS_SETUP,
--	GADGETFS_SUSPEND,
--	// and likely more !
--};
--
--struct usb_gadgetfs_event {
--	enum usb_gadgetfs_event_type	type;
--	union {
--		// NOP, DISCONNECT, SUSPEND: nothing
--		// ... some hardware can't report disconnection
--
--		// CONNECT: just the speed
--		enum usb_device_speed	speed;
--
--		// SETUP: packet; DATA phase i/o precedes next event
--		// (setup.bmRequestType & USB_DIR_IN) flags direction 
--		// ... includes SET_CONFIGURATION, SET_INTERFACE
--		struct usb_ctrlrequest	setup;
--	} u;
--};
--
--
--/* endpoint ioctls */
--
--/* IN transfers may be reported to the gadget driver as complete
-- * 	when the fifo is loaded, before the host reads the data;
-- * OUT transfers may be reported to the host's "client" driver as
-- * 	complete when they're sitting in the FIFO unread.
-- * THIS returns how many bytes are "unclaimed" in the endpoint fifo
-- * (needed for precise fault handling, when the hardware allows it)
-- */
--#define	GADGETFS_FIFO_STATUS	_IO('g',1)
--
--/* discards any unclaimed data in the fifo. */
--#define	GADGETFS_FIFO_FLUSH	_IO('g',2)
--
--/* resets endpoint halt+toggle; used to implement set_interface.
-- * some hardware (like pxa2xx) can't support this.
-- */
--#define	GADGETFS_CLEAR_HALT	_IO('g',3)
--
--
-diff -x .git -Nur linux-2.6.22.1/init/do_mounts.c linux-avr32.git/init/do_mounts.c
---- linux-2.6.22.1/init/do_mounts.c	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/init/do_mounts.c	2007-07-12 14:00:31.000000000 +0200
-@@ -25,6 +25,7 @@
- int root_mountflags = MS_RDONLY | MS_SILENT;
- char * __initdata root_device_name;
- static char __initdata saved_root_name[64];
-+int __initdata root_wait;
- 
- dev_t ROOT_DEV;
- 
-@@ -216,6 +217,14 @@
- 
- __setup("root=", root_dev_setup);
- 
-+static int __init rootwait_setup(char *line)
++	return 0;
++}
++
++#ifdef CONFIG_PM
++static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg)
 +{
-+	root_wait = simple_strtol(line,NULL,0);
-+	return 1;
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
++
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
++	clk_disable(chip->board->dac_clk);
++
++	return 0;
 +}
 +
-+__setup("rootwait=", rootwait_setup);
++static int snd_at73c213_resume(struct spi_device *spi)
++{
++	struct snd_card *card = dev_get_drvdata(&spi->dev);
++	struct snd_at73c213 *chip = card->private_data;
 +
- static char * __initdata root_mount_data;
- static int __init root_data_setup(char *str)
- {
-@@ -438,11 +447,24 @@
- 			root_device_name += 5;
- 	}
- 
--	is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR;
--
- 	if (initrd_load())
- 		goto out;
- 
-+	/* wait for any asynchronous scanning to complete */
-+	if ((ROOT_DEV == 0) && root_wait) {
-+		printk(KERN_INFO "Waiting for root device %s...\n",
-+			saved_root_name);
-+		do {
-+			while (driver_probe_done() != 0)
-+				msleep(100);
-+			ROOT_DEV = name_to_dev_t(saved_root_name);
-+			if (ROOT_DEV == 0)
-+				msleep(100);
-+		} while (ROOT_DEV == 0);
-+	}
++	clk_enable(chip->board->dac_clk);
++	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
 +
-+	is_floppy = MAJOR(ROOT_DEV) == FLOPPY_MAJOR;
++	return 0;
++}
++#else
++#define snd_at73c213_suspend NULL
++#define snd_at73c213_resume NULL
++#endif
 +
- 	if (is_floppy && rd_doload && rd_load_disk(0))
- 		ROOT_DEV = Root_RAM0;
- 
-diff -x .git -Nur linux-2.6.22.1/MAINTAINERS linux-avr32.git/MAINTAINERS
---- linux-2.6.22.1/MAINTAINERS	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/MAINTAINERS	2007-07-12 13:59:48.000000000 +0200
-@@ -674,6 +674,13 @@
- M:	hskinnemoen@atmel.com
- S:	Supported
- 
-+ATMEL USBA UDC DRIVER
-+P:	Haavard Skinnemoen
-+M:	hskinnemoen@atmel.com
-+L:	kernel@avr32linux.org
-+W:	http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver
-+S:	Supported
++static struct spi_driver at73c213_driver = {
++	.driver		= {
++		.name	= "at73c213",
++	},
++	.probe		= snd_at73c213_probe,
++	.suspend	= snd_at73c213_suspend,
++	.resume		= snd_at73c213_resume,
++	.remove		= __devexit_p(snd_at73c213_remove),
++};
 +
- ATMEL WIRELESS DRIVER
- P:	Simon Kelley
- M:	simon@thekelleys.org.uk
-diff -x .git -Nur linux-2.6.22.1/scripts/checkstack.pl linux-avr32.git/scripts/checkstack.pl
---- linux-2.6.22.1/scripts/checkstack.pl	2007-07-10 20:56:30.000000000 +0200
-+++ linux-avr32.git/scripts/checkstack.pl	2007-06-06 11:34:14.000000000 +0200
-@@ -12,6 +12,7 @@
- #	sh64 port by Paul Mundt
- #	Random bits by Matt Mackall <mpm@selenic.com>
- #	M68k port by Geert Uytterhoeven and Andreas Schwab
-+#	AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com>
- #
- #	Usage:
- #	objdump -d vmlinux | stackcheck.pl [arch]
-@@ -37,6 +38,10 @@
- 	if ($arch eq 'arm') {
- 		#c0008ffc:	e24dd064	sub	sp, sp, #100	; 0x64
- 		$re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o;
-+	} elsif ($arch eq 'avr32') {
-+		#8000008a:       20 1d           sub sp,4
-+		#80000ca8:       fa cd 05 b0     sub sp,sp,1456
-+		$re = qr/^.*sub.*sp.*,([0-9]{1,8})/o;
- 	} elsif ($arch =~ /^i[3456]86$/) {
- 		#c0105234:       81 ec ac 05 00 00       sub    $0x5ac,%esp
- 		$re = qr/^.*[as][du][db]    \$(0x$x{1,8}),\%esp$/o;
++static int __init at73c213_init(void)
++{
++	return spi_register_driver(&at73c213_driver);
++}
++module_init(at73c213_init);
++
++static void __exit at73c213_exit(void)
++{
++	spi_unregister_driver(&at73c213_driver);
++}
++module_exit(at73c213_exit);
++
++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
++MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
++MODULE_LICENSE("GPL");
+diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h
+new file mode 100644
+index 0000000..fd8b372
+--- /dev/null
++++ b/sound/spi/at73c213.h
+@@ -0,0 +1,119 @@
++/*
++ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000
++ *
++ * Copyright (C) 2006 - 2007 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful, but
++ * WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ * General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
++ * 02111-1307, USA.
++ *
++ * The full GNU General Public License is included in this
++ * distribution in the file called COPYING.
++ */
++
++#ifndef _SND_AT73C213_H
++#define _SND_AT73C213_H
++
++/* DAC control register */
++#define DAC_CTRL		0x00
++#define DAC_CTRL_ONPADRV	7
++#define DAC_CTRL_ONAUXIN	6
++#define DAC_CTRL_ONDACR		5
++#define DAC_CTRL_ONDACL		4
++#define DAC_CTRL_ONLNOR		3
++#define DAC_CTRL_ONLNOL		2
++#define DAC_CTRL_ONLNIR		1
++#define DAC_CTRL_ONLNIL		0
++
++/* DAC left line in gain register */
++#define DAC_LLIG		0x01
++#define DAC_LLIG_LLIG		0
++
++/* DAC right line in gain register */
++#define DAC_RLIG		0x02
++#define DAC_RLIG_RLIG		0
++
++/* DAC Left Master Playback Gain Register */
++#define DAC_LMPG		0x03
++#define DAC_LMPG_LMPG		0
++
++/* DAC Right Master Playback Gain Register */
++#define DAC_RMPG		0x04
++#define DAC_RMPG_RMPG		0
++
++/* DAC Left Line Out Gain Register */
++#define DAC_LLOG		0x05
++#define DAC_LLOG_LLOG		0
++
++/* DAC Right Line Out Gain Register */
++#define DAC_RLOG		0x06
++#define DAC_RLOG_RLOG		0
++
++/* DAC Output Level Control Register */
++#define DAC_OLC			0x07
++#define DAC_OLC_RSHORT		7
++#define DAC_OLC_ROLC		4
++#define DAC_OLC_LSHORT		3
++#define DAC_OLC_LOLC		0
++
++/* DAC Mixer Control Register */
++#define DAC_MC			0x08
++#define DAC_MC_INVR		5
++#define DAC_MC_INVL		4
++#define DAC_MC_RMSMIN2		3
++#define DAC_MC_RMSMIN1		2
++#define DAC_MC_LMSMIN2		1
++#define DAC_MC_LMSMIN1		0
++
++/* DAC Clock and Sampling Frequency Control Register */
++#define DAC_CSFC		0x09
++#define DAC_CSFC_OVRSEL		4
++
++/* DAC Miscellaneous Register */
++#define DAC_MISC		0x0A
++#define DAC_MISC_VCMCAPSEL	7
++#define DAC_MISC_DINTSEL	4
++#define DAC_MISC_DITHEN		3
++#define DAC_MISC_DEEMPEN	2
++#define DAC_MISC_NBITS		0
++
++/* DAC Precharge Control Register */
++#define DAC_PRECH		0x0C
++#define DAC_PRECH_PRCHGPDRV	7
++#define DAC_PRECH_PRCHGAUX1	6
++#define DAC_PRECH_PRCHGLNOR	5
++#define DAC_PRECH_PRCHGLNOL	4
++#define DAC_PRECH_PRCHGLNIR	3
++#define DAC_PRECH_PRCHGLNIL	2
++#define DAC_PRECH_PRCHG		1
++#define DAC_PRECH_ONMSTR	0
++
++/* DAC Auxiliary Input Gain Control Register */
++#define DAC_AUXG		0x0D
++#define DAC_AUXG_AUXG		0
++
++/* DAC Reset Register */
++#define DAC_RST			0x10
++#define DAC_RST_RESMASK		2
++#define DAC_RST_RESFILZ		1
++#define DAC_RST_RSTZ		0
++
++/* Power Amplifier Control Register */
++#define PA_CTRL			0x11
++#define PA_CTRL_APAON		6
++#define PA_CTRL_APAPRECH	5
++#define PA_CTRL_APALP		4
++#define PA_CTRL_APAGAIN		0
++
++#endif /* _SND_AT73C213_H */
-- 
2.30.2