From 7362afc32b7d7b4279a1cd12572dcff500ec132a Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Thu, 4 Sep 2014 12:14:09 -0700 Subject: [PATCH] staging: comedi: adl_pci9118: all registers are 32-bit According to the PCI-9118 User's Manual, all registers are 32-bit. Fix a couple of read/write operations that use 16-bit access. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- drivers/staging/comedi/drivers/adl_pci9118.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/comedi/drivers/adl_pci9118.c b/drivers/staging/comedi/drivers/adl_pci9118.c index 225c0469cda9..0a59e3dac86e 100644 --- a/drivers/staging/comedi/drivers/adl_pci9118.c +++ b/drivers/staging/comedi/drivers/adl_pci9118.c @@ -512,7 +512,7 @@ static int pci9118_insn_read_ai(struct comedi_device *dev, outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ for (n = 0; n < insn->n; n++) { - outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */ + outl(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */ udelay(2); ret = comedi_timeout(dev, s, insn, pci9118_ai_eoc, 0); @@ -527,7 +527,7 @@ static int pci9118_insn_read_ai(struct comedi_device *dev, PCI9118_AD_DATA) & 0xffff) ^ 0x8000; } else { data[n] = - (inw(dev->iobase + PCI9118_AD_DATA) >> 4) & 0xfff; + (inl(dev->iobase + PCI9118_AD_DATA) >> 4) & 0xfff; } } @@ -871,7 +871,7 @@ static void interrupt_pci9118_ai_onesample(struct comedi_device *dev, if (pci9118_decode_error_status(dev, s, int_adstat)) return; - sampl = inw(dev->iobase + PCI9118_AD_DATA); + sampl = inl(dev->iobase + PCI9118_AD_DATA); #ifdef PCI9118_PARANOIDCHECK if (s->maxdata != 0xffff) { @@ -999,7 +999,7 @@ static irqreturn_t pci9118_interrupt(int irq, void *d) outl(intcsr | 0x00ff0000, devpriv->iobase_a + AMCC_OP_REG_INTCSR); - adstat = inw(dev->iobase + PCI9118_ADSTAT) & 0x1ff; + adstat = inl(dev->iobase + PCI9118_ADSTAT) & 0x1ff; if (!devpriv->ai_do) return IRQ_HANDLED; -- 2.30.2