From 6a2c1aaae7de22b4892ba0a12159bec346f87f0d Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Delgado Date: Tue, 26 Jan 2016 11:24:15 +0100 Subject: [PATCH] ppc: xilinx-ppc4xx-generic: Update xparameters.h -Remove UART address (It is now part of the dts). -Include dummy ns16550 clock -Fix address to last test Signed-off-by: Ricardo Ribalda Delgado Acked-by: Stefan Roese Signed-off-by: Michal Simek Reviewed-by: Michal Simek --- board/xilinx/ppc405-generic/xparameters.h | 6 +++--- board/xilinx/ppc440-generic/xparameters.h | 10 +++++----- include/configs/xilinx-ppc.h | 1 + 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/board/xilinx/ppc405-generic/xparameters.h b/board/xilinx/ppc405-generic/xparameters.h index e610407859..90fe969d33 100644 --- a/board/xilinx/ppc405-generic/xparameters.h +++ b/board/xilinx/ppc405-generic/xparameters.h @@ -14,12 +14,12 @@ #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 #define XPAR_INTC_0_BASEADDR 0x81800000 #define XPAR_SPI_0_BASEADDR 0x83400000 -#define XPAR_UARTLITE_0_BASEADDR 0x84000000 #define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 #define XPAR_CORE_CLOCK_FREQ_HZ 400000000 -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 -#define XPAR_UARTLITE_0_BAUDRATE 9600 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 32 #define XPAR_SPI_0_NUM_TRANSFER_BITS 8 +#define XPAR_UARTNS550_0_BASEADDR 0xdeadbeef +#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000 #endif diff --git a/board/xilinx/ppc440-generic/xparameters.h b/board/xilinx/ppc440-generic/xparameters.h index 3c135ec42b..e307de9474 100644 --- a/board/xilinx/ppc440-generic/xparameters.h +++ b/board/xilinx/ppc440-generic/xparameters.h @@ -12,12 +12,12 @@ #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 -#define XPAR_INTC_0_BASEADDR 0x81800000 -#define XPAR_UARTLITE_0_BASEADDR 0x84000000 -#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 +#define XPAR_INTC_0_BASEADDR 0x87000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xF0000000 #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 #define XPAR_CORE_CLOCK_FREQ_HZ 400000000 -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 -#define XPAR_UARTLITE_0_BAUDRATE 9600 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 32 +#define XPAR_UARTNS550_0_BASEADDR 0xdeadbeef +#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000 #endif diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index 876750b138..c5579e1a81 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -109,6 +109,7 @@ #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } #else #ifdef XPAR_UARTNS550_0_BASEADDR +#define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 4 #define CONFIG_CONS_INDEX 1 -- 2.30.2