From 67856d4d3ccdd4612bcef3a7b624aa33e5b6828d Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Wed, 20 Apr 2016 20:46:04 +0300 Subject: [PATCH] drm/i915/bxt: Use PHY0 GRC value for HW state verification MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It's possible that BIOS enables PHY1 only to read out the GRC value from it to be used in PHY0 and then disables PHY1. In this case we can't use the PHY1 GRC value for state verification, so use instead the one in PHY0 always. Signed-off-by: Imre Deak Reviewed-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/1461174366-16758-2-git-send-email-imre.deak@intel.com --- drivers/gpu/drm/i915/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index a887b31cb684..59dbd479c32b 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1778,7 +1778,7 @@ static void broxton_phy_init(struct drm_i915_private *dev_priv, DRM_DEBUG_DRIVER("DDI PHY %d already enabled, " "won't reprogram it\n", phy); /* Still read out the GRC value for state verification */ - if (phy == DPIO_PHY1) + if (phy == DPIO_PHY0) dev_priv->bxt_phy_grc = broxton_get_grc(dev_priv, phy); return; -- 2.30.2