From 648013696767f0266aa7bd44407786a99f7a7910 Mon Sep 17 00:00:00 2001 From: Harry Wentland Date: Fri, 24 Feb 2017 11:31:23 -0500 Subject: [PATCH] drm/amd/display: Fix warnings in DC Signed-off-by: Harry Wentland Acked-by: Harry Wentland Reviewed-by: Tony Cheng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 2 -- drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 2 +- drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 1 - .../gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c | 1 - 4 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 6516c275e0c7..e0d9572768cb 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1068,7 +1068,6 @@ bool dc_pre_update_surfaces_to_stream( int prev_disp_clk = core_dc->current_context->dispclk_khz; struct dc_stream_status *stream_status = NULL; struct validate_context *context; - struct validate_context *temp_context; bool ret = true; pre_surface_trace(dc, new_surfaces, new_surface_count); @@ -1425,7 +1424,6 @@ void dc_update_surfaces_for_stream(struct dc *dc, if (update_type == UPDATE_TYPE_FULL) { for (j = 0; j < context->res_ctx.pool->pipe_count; j++) { struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; - struct core_stream *stream = pipe_ctx->stream; if (pipe_ctx->surface != surface) continue; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c index 21fedd447bd1..943895faee49 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c @@ -121,7 +121,7 @@ const struct dc_surface_status *dc_surface_get_status( const struct dc_surface *dc_surface) { struct dc_surface_status *surface_status; - struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface);; + struct core_surface *core_surface = DC_SURFACE_TO_CORE(dc_surface); struct core_dc *core_dc; int i; diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c index 7005ebb28d46..45a3079c0973 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c @@ -292,7 +292,6 @@ static void dce_abm_init(struct abm *abm) static bool dce_abm_set_level(struct abm *abm, uint32_t level) { struct dce_abm *abm_dce = TO_DCE_ABM(abm); - struct dc_context *ctx = abm_dce->base.ctx; REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, 100, 800); diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c index 682a3de7ba48..c95b69446ced 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c @@ -74,7 +74,6 @@ static bool dce110_timing_generator_v_disable_crtc(struct timing_generator *tg) static void dce110_timing_generator_v_blank_crtc(struct timing_generator *tg) { - struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); uint32_t addr = mmCRTCV_BLANK_CONTROL; uint32_t value = dm_read_reg(tg->ctx, addr); -- 2.30.2