From 5e91b4507c0010970482099464b44a5404835caa Mon Sep 17 00:00:00 2001 From: Wojciech Dubowik Date: Wed, 19 Apr 2023 08:41:18 +0200 Subject: [PATCH] tfa-layerscape: Change to github and use the latest tag The default location of tfa-layerscape has been changed from codeuaurora to github. Also use the latest tag for Layerscape Linux Development POC from NXP. v2: * restored ls1021a-afrdm board * added platform defines to fiptool so ls-ddr-phy can be built Signed-off-by: Wojciech Dubowik (reset PKG_RELEASE) Signed-off-by: Christian Lamparter --- package/boot/tfa-layerscape/Makefile | 17 +- .../patches/001-fiptool-hostbuild-fixes.patch | 37 ++- ...ix-create_pbl-and-byte_swap-host-bui.patch | 16 +- ...plat-nxp-restore-ls1012afrdm-support.patch | 232 ++++++++++++++++++ 4 files changed, 265 insertions(+), 37 deletions(-) create mode 100644 package/boot/tfa-layerscape/patches/004-plat-nxp-restore-ls1012afrdm-support.patch diff --git a/package/boot/tfa-layerscape/Makefile b/package/boot/tfa-layerscape/Makefile index 2deea4d83f6..c1ef217f479 100644 --- a/package/boot/tfa-layerscape/Makefile +++ b/package/boot/tfa-layerscape/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=tfa-layerscape -PKG_VERSION:=21.08 -PKG_RELEASE:=6 +PKG_VERSION:=lf-6.1.1-1.0.0 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL:=https://source.codeaurora.org/external/qoriq/qoriq-components/atf -PKG_SOURCE_VERSION:=LSDK-21.08 -PKG_MIRROR_HASH:=893f2d28a77dcc9d4413a619b4719ca5f1f4dc78dd824a8488e7d543e66bcf95 +PKG_SOURCE_URL:=https://github.com/nxp-qoriq/atf +PKG_SOURCE_VERSION:=lf-6.1.1-1.0.0 +PKG_MIRROR_HASH:=c0e3c7d0cc9ee5f9ae68cd705ce7f07f714c4fe3fd4a5a79de5699e7865b759f PKG_BUILD_DEPENDS:=tfa-layerscape/host include $(INCLUDE_DIR)/host-build.mk @@ -25,18 +25,19 @@ HOST_CFLAGS += -Wall -Werror -pedantic -std=c99 define Host/Compile $(MAKE) -C \ $(HOST_BUILD_DIR)/tools/fiptool \ + PLAT_FIPTOOL_HELPER_MK="$(HOST_BUILD_DIR)/tools/nxp/plat_fiptool/plat_fiptool.mk" CFLAGS="$(HOST_CFLAGS)" \ LDFLAGS="$(HOST_LDFLAGS)" \ HOSTCCFLAGS="$(HOST_CFLAGS)" $(MAKE) -C \ - $(HOST_BUILD_DIR)/tools/nxp \ + $(HOST_BUILD_DIR)/tools/nxp/create_pbl \ CFLAGS="$(HOST_CFLAGS)" endef define Host/Install $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/fiptool/fiptool $(STAGING_DIR_HOST)/bin/fiptool-layerscape - $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/nxp/create_pbl $(STAGING_DIR_HOST)/bin/tfa-create-pbl - $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/nxp/byte_swap $(STAGING_DIR_HOST)/bin/tfa-byte-swap + $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/nxp/create_pbl/create_pbl $(STAGING_DIR_HOST)/bin/tfa-create-pbl + $(INSTALL_BIN) $(HOST_BUILD_DIR)/tools/nxp/create_pbl/byte_swap $(STAGING_DIR_HOST)/bin/tfa-byte-swap endef define Trusted-Firmware-A/Default diff --git a/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch b/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch index 4b74048754f..8e7375cfa22 100644 --- a/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch +++ b/package/boot/tfa-layerscape/patches/001-fiptool-hostbuild-fixes.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -801,10 +801,6 @@ CRTTOOL ?= ${CRTTOOLPATH}/cert_create$ +@@ -914,10 +914,6 @@ CRTTOOL ?= ${CRTTOOLPATH}/cert_create$ ENCTOOLPATH ?= tools/encrypt_fw ENCTOOL ?= ${ENCTOOLPATH}/encrypt_fw${BIN_EXT} @@ -11,7 +11,7 @@ # Variables for use with sptool SPTOOLPATH ?= tools/sptool SPTOOL ?= ${SPTOOLPATH}/sptool${BIN_EXT} -@@ -1160,13 +1156,6 @@ endif +@@ -1322,13 +1318,6 @@ endif clean: @echo " CLEAN" $(call SHELL_REMOVE_DIR,${BUILD_PLAT}) @@ -25,7 +25,7 @@ ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} clean ${Q}${MAKE} --no-print-directory -C ${ROMLIBPATH} clean -@@ -1175,13 +1164,6 @@ realclean distclean: +@@ -1337,13 +1326,6 @@ realclean distclean: @echo " REALCLEAN" $(call SHELL_REMOVE_DIR,${BUILD_BASE}) $(call SHELL_DELETE_ALL, ${CURDIR}/cscope.*) @@ -39,37 +39,33 @@ ${Q}${MAKE} --no-print-directory -C ${SPTOOLPATH} clean ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${CRTTOOLPATH} clean ${Q}${MAKE} PLAT=${PLAT} --no-print-directory -C ${ENCTOOLPATH} realclean -@@ -1238,7 +1220,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL} +@@ -1400,7 +1382,7 @@ certificates: ${CRT_DEPS} ${CRTTOOL} @${ECHO_BLANK_LINE} endif -${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} ${FIPTOOL} +${BUILD_PLAT}/${FIP_NAME}: ${FIP_DEPS} - ${Q}${FIPTOOL} create ${FIP_ARGS} $@ - ${Q}${FIPTOOL} info $@ - @${ECHO_BLANK_LINE} -@@ -1254,7 +1236,7 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT + $(eval ${CHECK_FIP_CMD}) + ${Q}${FIPTOOL} create ${FIP_ARGS} $@ + ${Q}${FIPTOOL} info $@ +@@ -1417,7 +1399,7 @@ fwu_certificates: ${FWU_CRT_DEPS} ${CRTT @${ECHO_BLANK_LINE} endif -${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} ${FIPTOOL} +${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP_DEPS} - ${Q}${FIPTOOL} create ${FWU_FIP_ARGS} $@ - ${Q}${FIPTOOL} info $@ - @${ECHO_BLANK_LINE} -@@ -1279,24 +1261,10 @@ ${BUILD_PLAT}/${DDR_FIP_NAME}: ${DDR_FIP + $(eval ${CHECK_FWU_FIP_CMD}) + ${Q}${FIPTOOL} create ${FWU_FIP_ARGS} $@ + ${Q}${FIPTOOL} info $@ +@@ -1425,19 +1407,9 @@ ${BUILD_PLAT}/${FWU_FIP_NAME}: ${FWU_FIP @echo "Built $@ successfully" @${ECHO_BLANK_LINE} -fiptool: ${FIPTOOL} fip: ${BUILD_PLAT}/${FIP_NAME} fwu_fip: ${BUILD_PLAT}/${FWU_FIP_NAME} - fip_ddr: ${BUILD_PLAT}/${DDR_FIP_NAME} --.PHONY: ${FIPTOOL} --${FIPTOOL}: -- @${ECHO_BLANK_LINE} -- @echo "Building $@" +-${FIPTOOL}: FORCE -ifdef UNIX_MK - ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" FIPTOOL=${FIPTOOL} --no-print-directory -C ${FIPTOOLPATH} -else @@ -77,14 +73,13 @@ -# to pass the gnumake flags to nmake. - ${Q}set MAKEFLAGS= && ${MSVC_NMAKE} /nologo /f ${FIPTOOLPATH}/Makefile.msvc FIPTOOLPATH=$(subst /,\,$(FIPTOOLPATH)) FIPTOOL=$(subst /,\,$(FIPTOOL)) -endif -- @${ECHO_BLANK_LINE} - sptool: ${SPTOOL} - .PHONY: ${SPTOOL} - ${SPTOOL}: + ${SPTOOL}: FORCE + ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" SPTOOL=${SPTOOL} --no-print-directory -C ${SPTOOLPATH} --- a/tools/fiptool/Makefile +++ b/tools/fiptool/Makefile -@@ -38,7 +38,7 @@ all: ${PROJECT} +@@ -48,7 +48,7 @@ all: ${PROJECT} ${PROJECT}: ${OBJECTS} Makefile @echo " HOSTLD $@" diff --git a/package/boot/tfa-layerscape/patches/003-plat-nxp-tools-fix-create_pbl-and-byte_swap-host-bui.patch b/package/boot/tfa-layerscape/patches/003-plat-nxp-tools-fix-create_pbl-and-byte_swap-host-bui.patch index 167549d55b5..73c5c66cae1 100644 --- a/package/boot/tfa-layerscape/patches/003-plat-nxp-tools-fix-create_pbl-and-byte_swap-host-bui.patch +++ b/package/boot/tfa-layerscape/patches/003-plat-nxp-tools-fix-create_pbl-and-byte_swap-host-bui.patch @@ -11,14 +11,14 @@ Signed-off-by: Biwen Li tools/nxp/pbl_ch3.mk | 5 ----- 2 files changed, 8 deletions(-) ---- a/tools/nxp/pbl_ch2.mk -+++ b/tools/nxp/pbl_ch2.mk +--- a/tools/nxp/create_pbl/pbl_ch2.mk ++++ b/tools/nxp/create_pbl/pbl_ch2.mk @@ -19,8 +19,6 @@ ifeq ($(RCW),"") else # Generate header for bl2.bin $(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE} - # Compile create_pbl tool -- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};\ +- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};\ # Add bl2.bin to RCW ${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\ -o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ;\ @@ -26,18 +26,18 @@ Signed-off-by: Biwen Li ${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}" else # -a option appends the image for Chassis 3 devices in case of non secure boot -- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH}; +- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH}; ${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \ -o ${BUILD_PLAT}/bl2_${BOOT_MODE}.pbl ; # Swapping of RCW is required for QSPi Chassis 2 devices ---- a/tools/nxp/pbl_ch3.mk -+++ b/tools/nxp/pbl_ch3.mk +--- a/tools/nxp/create_pbl/pbl_ch3.mk ++++ b/tools/nxp/create_pbl/pbl_ch3.mk @@ -26,9 +26,6 @@ else # Generate header for bl2.bin $(Q)$(CST_DIR)/create_hdr_isbc --in ${BUILD_PLAT}/bl2.bin --out ${BUILD_PLAT}/hdr_bl2 ${BL2_INPUT_FILE} - # Compile create_pbl tool -- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH};\ +- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH};\ - # Add Block Copy command for bl2.bin to RCW ${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE}\ @@ -46,7 +46,7 @@ Signed-off-by: Biwen Li ifeq ($(RCW),"") ${Q}echo "Platform ${PLAT} requires rcw file. Please set RCW to point to the right RCW file for boot mode ${BOOT_MODE}" else -- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${PLAT_TOOL_PATH}; +- ${Q}${MAKE} CPPFLAGS="-DVERSION='\"${VERSION_STRING}\"'" --no-print-directory -C ${CREATE_PBL_TOOL_PATH}; - # Add Block Copy command and populate boot loc ptrfor bl2.bin to RCW ${CREATE_PBL} -r ${RCW} -i ${BUILD_PLAT}/bl2.bin -b ${BOOT_MODE} -c ${SOC_NUM} -d ${BL2_BASE} -e ${BL2_BASE} \ diff --git a/package/boot/tfa-layerscape/patches/004-plat-nxp-restore-ls1012afrdm-support.patch b/package/boot/tfa-layerscape/patches/004-plat-nxp-restore-ls1012afrdm-support.patch new file mode 100644 index 00000000000..fc9504f82fd --- /dev/null +++ b/package/boot/tfa-layerscape/patches/004-plat-nxp-restore-ls1012afrdm-support.patch @@ -0,0 +1,232 @@ +From 8c6a66feb721f18c930c7df03d1fbb7304107af6 Mon Sep 17 00:00:00 2001 +From: Wojciech Dubowik +Date: Thu, 20 Apr 2023 16:21:25 +0200 +Subject: [PATCH] tfa-layerscape: Restore ls1012afrdm support + +Signed-off-by: Wojciech Dubowik +--- + plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c | 34 +++++++ + plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h | 92 +++++++++++++++++++ + plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk | 25 +++++ + .../soc-ls1012a/ls1012afrdm/platform_def.h | 13 +++ + plat/nxp/soc-ls1012a/ls1012afrdm/policy.h | 16 ++++ + 5 files changed, 180 insertions(+) + create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c + create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h + create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk + create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h + create mode 100644 plat/nxp/soc-ls1012a/ls1012afrdm/policy.h + +diff --git a/plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c b/plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c +new file mode 100644 +index 000000000..8cb518540 +--- /dev/null ++++ b/plat/nxp/soc-ls1012a/ls1012afrdm/ddr_init.c +@@ -0,0 +1,34 @@ ++/* ++ * Copyright 2018-2022 NXP ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#include ++#include ++ ++#include ++ ++long long init_ddr(void) ++{ ++ static const struct fsl_mmdc_info mparam = { ++ .mdctl = U(0x04180000), ++ .mdpdc = U(0x00030035), ++ .mdotc = U(0x12554000), ++ .mdcfg0 = U(0xbabf7954), ++ .mdcfg1 = U(0xdb328f64), ++ .mdcfg2 = U(0x01ff00db), ++ .mdmisc = U(0x00001680), ++ .mdref = U(0x0f3c8000), ++ .mdrwd = U(0x00002000), ++ .mdor = U(0x00bf1023), ++ .mdasp = U(0x0000003f), ++ .mpodtctrl = U(0x0000022a), ++ .mpzqhwctrl = U(0xa1390003), ++ }; ++ ++ mmdc_init(&mparam, NXP_DDR_ADDR); ++ NOTICE("DDR Init Done\n"); ++ ++ return NXP_DRAM0_SIZE; ++} +diff --git a/plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h b/plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h +new file mode 100644 +index 000000000..eb745a0a3 +--- /dev/null ++++ b/plat/nxp/soc-ls1012a/ls1012afrdm/plat_def.h +@@ -0,0 +1,92 @@ ++/* ++ * Copyright 2022 NXP ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef PLAT_DEF_H ++#define PLAT_DEF_H ++ ++#include ++/* ++ * Required without TBBR. ++ * To include the defines for DDR PHY ++ * Images. ++ */ ++#include ++ ++#include ++#include ++ ++/* DDR Related definition */ ++#define PLAT_DEF_DRAM0_SIZE 0x20000000 /* 512 MB */ ++ ++#define NXP_SYSCLK_FREQ 125000000 ++#define NXP_DDRCLK_FREQ 100000000 ++ ++/* UART related definition */ ++#define NXP_CONSOLE_ADDR NXP_UART_ADDR ++#define NXP_CONSOLE_BAUDRATE 115200 ++ ++#define NXP_SPD_EEPROM0 0x51 ++ ++/* Size of cacheable stacks */ ++#if defined(IMAGE_BL2) ++#if defined(TRUSTED_BOARD_BOOT) ++#define PLATFORM_STACK_SIZE 0x2000 ++#else ++#define PLATFORM_STACK_SIZE 0x1000 ++#endif ++#elif defined(IMAGE_BL31) ++#define PLATFORM_STACK_SIZE 0x1000 ++#endif ++ ++/* SD block buffer */ ++#define NXP_SD_BLOCK_BUF_SIZE (0x00100000) ++#define NXP_SD_BLOCK_BUF_ADDR ULL(0x80000000) ++ ++#define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) ++ ++/* IO defines as needed by IO driver framework */ ++#define MAX_IO_DEVICES 3 ++#define MAX_IO_BLOCK_DEVICES 1 ++#define MAX_IO_HANDLES 4 ++ ++/* ++ * FIP image defines - Offset at which FIP Image would be present ++ * Image would include Bl31 , Bl33 and Bl32 (optional) ++ */ ++#ifdef POLICY_FUSE_PROVISION ++#define MAX_FIP_DEVICES 2 ++#endif ++ ++#ifndef MAX_FIP_DEVICES ++#define MAX_FIP_DEVICES 1 ++#endif ++ ++#ifdef PLAT_FIP_OFFSET ++#undef PLAT_FIP_OFFSET ++#endif ++#ifdef PLAT_FIP_MAX_SIZE ++#undef PLAT_FIP_MAX_SIZE ++#endif ++#define PLAT_FIP_OFFSET 0x60000 ++#define PLAT_FIP_MAX_SIZE 0x170000 ++ ++/* ++ * ID of the secure physical generic timer interrupt used by the BL32. ++ */ ++#define BL32_IRQ_SEC_PHY_TIMER 29 ++ ++/* ++ * Define properties of Group 1 Secure and Group 0 interrupts as per GICv3 ++ * terminology. On a GICv2 system or mode, the lists will be merged and treated ++ * as Group 0 interrupts. ++ */ ++#define PLAT_LS_G1S_IRQ_PROPS(grp) \ ++ INTR_PROP_DESC(BL32_IRQ_SEC_PHY_TIMER, GIC_HIGHEST_SEC_PRIORITY, grp, \ ++ GIC_INTR_CFG_LEVEL) ++ ++#define PLAT_LS_G0_IRQ_PROPS(grp) ++ ++#endif +diff --git a/plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk b/plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk +new file mode 100644 +index 000000000..270e92420 +--- /dev/null ++++ b/plat/nxp/soc-ls1012a/ls1012afrdm/platform.mk +@@ -0,0 +1,25 @@ ++# ++# Copyright 2018-2022 NXP ++# ++# SPDX-License-Identifier: BSD-3-Clause ++# ++ ++# board-specific build parameters ++BOOT_MODE := qspi ++BOARD := ls1012afrdm ++ ++# DDR Compilation Configs ++DDRC_NUM_CS := 1 ++ ++# On-Board Flash Details ++QSPI_FLASH_SZ := 0x4000000 ++ ++BL2_SOURCES += ${BOARD_PATH}/ddr_init.c ++ ++SUPPORTED_BOOT_MODE := qspi ++ ++# Adding platform board build info ++include plat/nxp/common/plat_make_helper/plat_common_def.mk ++ ++# Adding SoC build info ++include plat/nxp/soc-ls1012a/soc.mk +diff --git a/plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h b/plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h +new file mode 100644 +index 000000000..7daf1c02c +--- /dev/null ++++ b/plat/nxp/soc-ls1012a/ls1012afrdm/platform_def.h +@@ -0,0 +1,13 @@ ++/* ++ * Copyright 2022 NXP ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef PLATFORM_DEF_H ++#define PLATFORM_DEF_H ++ ++#include ++#include ++ ++#endif /* PLATFORM_DEF_H */ +diff --git a/plat/nxp/soc-ls1012a/ls1012afrdm/policy.h b/plat/nxp/soc-ls1012a/ls1012afrdm/policy.h +new file mode 100644 +index 000000000..a782d01c7 +--- /dev/null ++++ b/plat/nxp/soc-ls1012a/ls1012afrdm/policy.h +@@ -0,0 +1,16 @@ ++/* ++ * Copyright 2018-2022 NXP ++ * ++ * SPDX-License-Identifier: BSD-3-Clause ++ */ ++ ++#ifndef POLICY_H ++#define POLICY_H ++ ++/* ++ * Set this to 0x0 to leave the default SMMU page size in sACR ++ * Set this to 0x1 to change the SMMU page size to 64K ++ */ ++#define POLICY_SMMU_PAGESZ_64K 0x0 ++ ++#endif /* POLICY_H */ +-- +2.34.1 + -- 2.30.2