From 581d92eefc1a060ea5c6eb42028880a37095953d Mon Sep 17 00:00:00 2001 From: Cliff Cai Date: Mon, 7 Dec 2009 08:03:06 +0000 Subject: [PATCH] Blackfin: bfin_spi: round up clock divider If the requested clock cannot be exactly obtained, round it up so that we err on the side of slightly slower rather than slightly faster. Signed-off-by: Cliff Cai Signed-off-by: Mike Frysinger --- drivers/spi/bfin_spi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c index 093166efed..f28d42b489 100644 --- a/drivers/spi/bfin_spi.c +++ b/drivers/spi/bfin_spi.c @@ -85,6 +85,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { struct bfin_spi_slave *bss; + ulong sclk; u32 mmr_base; u32 baud; @@ -105,7 +106,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, default: return NULL; } - baud = get_sclk() / (2 * max_hz); + sclk = get_sclk(); + baud = sclk / (2 * max_hz); + /* baud should be rounded up */ + if (sclk % (2 * max_hz)) + baud += 1; if (baud < 2) baud = 2; else if (baud > (u16)-1) -- 2.30.2