From 53a7d5d614050a38a4e78f5a9e153e7612d587f0 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Wed, 17 Mar 2021 03:39:51 +0000 Subject: [PATCH] ath79: fix RS-485 on Teltonika RUT-955 DTR GPIO isn't actually needed and triggers boot warning. TX pin was off by one (GPIO 19 instead of GPIO 18). Reported-by: @tophirsch Fixes: d1130ad265 ("ath79: add support for Teltonika RUT955") Signed-off-by: Daniel Golle --- .../ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts | 4 ---- target/linux/ath79/dts/ar9344_teltonika_rut955.dts | 4 ---- target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi | 12 ++++++------ 3 files changed, 6 insertions(+), 14 deletions(-) diff --git a/target/linux/ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts b/target/linux/ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts index f61f2bf628..eb9606e58b 100644 --- a/target/linux/ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts +++ b/target/linux/ath79/dts/ar9344_teltonika_rut955-h7v3c0.dts @@ -159,10 +159,6 @@ }; }; -&hs_uart { - dtr-gpios = <&gpio_ext 15 GPIO_ACTIVE_HIGH>; -}; - ð0 { status = "okay"; diff --git a/target/linux/ath79/dts/ar9344_teltonika_rut955.dts b/target/linux/ath79/dts/ar9344_teltonika_rut955.dts index 7914928aa0..ba840a05d3 100644 --- a/target/linux/ath79/dts/ar9344_teltonika_rut955.dts +++ b/target/linux/ath79/dts/ar9344_teltonika_rut955.dts @@ -158,10 +158,6 @@ }; }; -&hs_uart { - dtr-gpios = <&gpio_ext 13 GPIO_ACTIVE_HIGH>; -}; - ð0 { status = "okay"; diff --git a/target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi b/target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi index 88b9170fc0..d9c66d2745 100644 --- a/target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi +++ b/target/linux/ath79/dts/ar9344_teltonika_rut9xx.dtsi @@ -154,20 +154,20 @@ &pinmux { pmx_spi: spi { // SPI_CS1 on GPIO 3 - pinctrl-single,bits = <0x0 0x07000000 0xff000000>; + pinctrl-single,bits = <0x0 0x07000000 0xff000000>; }; pmx_leds_switch: leds_switch { // switch port LEDs on GPIO 1, GPIO 13, GPIO 14 and GPIO 22 - pinctrl-single,bits = <0x0 0x00002d00 0x0000ff00>, - <0xc 0x002c2b00 0x00ffff00>, + pinctrl-single,bits = <0x00 0x00002d00 0x0000ff00>, + <0x0c 0x002c2b00 0x00ffff00>, <0x14 0x002a0000 0x00ff0000>; }; pmx_uart2: uart2 { // UART1_DTR on GPIO 0, UART1_RD on GPIO 11, UART1_TD on GPIO 18 - pinctrl-single,bits = <0x0 0x0 0xff>, - <0x10 0x4f000000 0xff000000>, - <0x3c 0x000b0000 0x00ff0000>; + pinctrl-single,bits = <0x00 0x00000000 0x000000ff>, + <0x10 0x004f0000 0x00ff0000>, + <0x3c 0x000b0000 0x00ff0000>; }; }; -- 2.30.2