From 51d33c2f05edeace67e6f7f0603dc7aa4667e9a6 Mon Sep 17 00:00:00 2001 From: Giovanni Cabiddu Date: Mon, 29 Apr 2019 16:43:18 +0100 Subject: [PATCH] crypto: qat - fix block size for aes ctr mode The block size for aes counter mode was improperly set to AES_BLOCK_SIZE. This sets it to 1 as it is a stream cipher. This problem was found with by the new extra run-time crypto self test. Reviewed-by: Conor Mcloughlin Tested-by: Sergey Portnoy Signed-off-by: Giovanni Cabiddu Signed-off-by: Herbert Xu --- drivers/crypto/qat/qat_common/qat_algs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/qat/qat_common/qat_algs.c b/drivers/crypto/qat/qat_common/qat_algs.c index 6be3e7413beb..5ca5cf9f6be5 100644 --- a/drivers/crypto/qat/qat_common/qat_algs.c +++ b/drivers/crypto/qat/qat_common/qat_algs.c @@ -1273,7 +1273,7 @@ static struct crypto_alg qat_algs[] = { { .cra_driver_name = "qat_aes_ctr", .cra_priority = 4001, .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, - .cra_blocksize = AES_BLOCK_SIZE, + .cra_blocksize = 1, .cra_ctxsize = sizeof(struct qat_alg_ablkcipher_ctx), .cra_alignmask = 0, .cra_type = &crypto_ablkcipher_type, -- 2.30.2