From 5189ea27503d47d640252a57d63527d6ab2f53c0 Mon Sep 17 00:00:00 2001 From: Jerome Forissier Date: Thu, 8 Nov 2018 09:59:29 +0100 Subject: [PATCH] hikey960: Use new console APIs Switch to the new console APIs enabled by setting MULTI_CONSOLE_API=1. Enables building with ERROR_DEPRECATED=1. Signed-off-by: Jerome Forissier --- plat/hisilicon/hikey960/aarch64/hikey960_helpers.S | 6 +++--- plat/hisilicon/hikey960/hikey960_bl1_setup.c | 6 ++++-- plat/hisilicon/hikey960/hikey960_bl2_setup.c | 6 ++++-- plat/hisilicon/hikey960/hikey960_bl31_setup.c | 5 ++++- plat/hisilicon/hikey960/hikey960_pm.c | 7 ++++--- plat/hisilicon/hikey960/platform.mk | 1 + 6 files changed, 20 insertions(+), 11 deletions(-) diff --git a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S index 550c5604..606f2d0f 100644 --- a/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S +++ b/plat/hisilicon/hikey960/aarch64/hikey960_helpers.S @@ -50,7 +50,7 @@ func plat_crash_console_init mov_imm x0, CRASH_CONSOLE_BASE mov_imm x1, PL011_UART_CLK_IN_HZ mov_imm x2, PL011_BAUDRATE - b console_core_init + b console_pl011_core_init endfunc plat_crash_console_init /* --------------------------------------------- @@ -62,7 +62,7 @@ endfunc plat_crash_console_init */ func plat_crash_console_putc mov_imm x1, CRASH_CONSOLE_BASE - b console_core_putc + b console_pl011_core_putc endfunc plat_crash_console_putc /* --------------------------------------------- @@ -75,7 +75,7 @@ endfunc plat_crash_console_putc */ func plat_crash_console_flush mov_imm x0, CRASH_CONSOLE_BASE - b console_core_flush + b console_pl011_core_flush endfunc plat_crash_console_flush /* --------------------------------------------- diff --git a/plat/hisilicon/hikey960/hikey960_bl1_setup.c b/plat/hisilicon/hikey960/hikey960_bl1_setup.c index ea5eb47b..ff2c77a6 100644 --- a/plat/hisilicon/hikey960/hikey960_bl1_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl1_setup.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include @@ -17,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -40,6 +40,7 @@ enum { /* Data structure which holds the extents of the trusted RAM for BL1 */ static meminfo_t bl1_tzram_layout; +static console_pl011_t console; /****************************************************************************** * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 @@ -78,7 +79,8 @@ void bl1_early_platform_setup(void) else uart_base = PL011_UART6_BASE; /* Initialize the console to provide early debug support */ - console_init(uart_base, PL011_UART_CLK_IN_HZ, PL011_BAUDRATE); + console_pl011_register(uart_base, PL011_UART_CLK_IN_HZ, + PL011_BAUDRATE, &console); /* Allow BL1 to see the whole Trusted RAM */ bl1_tzram_layout.total_base = BL1_RW_BASE; diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c index 0e79e0a0..552356f1 100644 --- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include @@ -19,6 +18,7 @@ #ifdef SPD_opteed #include #endif +#include #include #include #include @@ -48,6 +48,7 @@ #define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) static meminfo_t bl2_el3_tzram_layout; +static console_pl011_t console; extern int load_lpm3(void); enum { @@ -296,7 +297,8 @@ void bl2_el3_early_platform_setup(u_register_t arg1, u_register_t arg2, else uart_base = PL011_UART6_BASE; /* Initialize the console to provide early debug support */ - console_init(uart_base, PL011_UART_CLK_IN_HZ, PL011_BAUDRATE); + console_pl011_register(uart_base, PL011_UART_CLK_IN_HZ, + PL011_BAUDRATE, &console); /* * Allow BL2 to see the whole Trusted RAM. */ diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c index d7164ff5..c1be1f62 100644 --- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c +++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -44,6 +45,7 @@ static entry_point_info_t bl32_ep_info; static entry_point_info_t bl33_ep_info; +static console_pl011_t console; /****************************************************************************** * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0 @@ -96,7 +98,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, uart_base = PL011_UART6_BASE; /* Initialize the console to provide early debug support */ - console_init(uart_base, PL011_UART_CLK_IN_HZ, PL011_BAUDRATE); + console_pl011_register(uart_base, PL011_UART_CLK_IN_HZ, + PL011_BAUDRATE, &console); /* Initialize CCI driver */ cci_init(CCI400_REG_BASE, cci_map, ARRAY_SIZE(cci_map)); diff --git a/plat/hisilicon/hikey960/hikey960_pm.c b/plat/hisilicon/hikey960/hikey960_pm.c index ffe7fcf8..f1873eec 100644 --- a/plat/hisilicon/hikey960/hikey960_pm.c +++ b/plat/hisilicon/hikey960/hikey960_pm.c @@ -7,13 +7,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include #include "drivers/pwrc/hisi_pwrc.h" @@ -31,6 +31,7 @@ #define AXI_CONF_BASE 0x820 static unsigned int uart_base; +static console_pl011_t console; static uintptr_t hikey960_sec_entrypoint; static void hikey960_pwr_domain_standby(plat_local_state_t cpu_state) @@ -268,8 +269,8 @@ hikey960_pwr_domain_suspend_finish(const psci_power_state_t *target_state) if (hisi_test_ap_suspend_flag(cluster)) { hikey960_sr_dma_reinit(); gicv2_cpuif_enable(); - console_init(uart_base, PL011_UART_CLK_IN_HZ, - PL011_BAUDRATE); + console_pl011_register(uart_base, PL011_UART_CLK_IN_HZ, + PL011_BAUDRATE, &console); } hikey960_pwr_domain_on_finish(target_state); diff --git a/plat/hisilicon/hikey960/platform.mk b/plat/hisilicon/hikey960/platform.mk index 3b37740b..ff008e77 100644 --- a/plat/hisilicon/hikey960/platform.mk +++ b/plat/hisilicon/hikey960/platform.mk @@ -17,6 +17,7 @@ else $(error "Currently unsupported HIKEY960_TSP_RAM_LOCATION value") endif +MULTI_CONSOLE_API := 1 CRASH_CONSOLE_BASE := PL011_UART6_BASE COLD_BOOT_SINGLE_CPU := 1 PLAT_PL061_MAX_GPIOS := 176 -- 2.30.2