From 49e5bb13adc11fe6e2e40f65c04f3a461aea1fec Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 25 Jul 2018 14:21:32 +0200 Subject: [PATCH] MIPS: mscc: ocelot: fix length of memory address space for MIIM The length of memory address space for MIIM0 is from 0x7107009c to 0x710700bf included which is 36 bytes long in decimal, or 0x24 bytes in hexadecimal and not 0x36. Fixes: 49b031690abe ("MIPS: mscc: Add switch to ocelot") Signed-off-by: Quentin Schulz Acked-by: Alexandre Belloni Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/20013/ Cc: robh+dt@kernel.org Cc: mark.rutland@arm.com Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: thomas.petazzoni@bootlin.com --- arch/mips/boot/dts/mscc/ocelot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi index 4f33dbc67348..7096915f26e0 100644 --- a/arch/mips/boot/dts/mscc/ocelot.dtsi +++ b/arch/mips/boot/dts/mscc/ocelot.dtsi @@ -184,7 +184,7 @@ #address-cells = <1>; #size-cells = <0>; compatible = "mscc,ocelot-miim"; - reg = <0x107009c 0x36>, <0x10700f0 0x8>; + reg = <0x107009c 0x24>, <0x10700f0 0x8>; interrupts = <14>; status = "disabled"; -- 2.30.2