From 428ab280a0754656fa09304017b0ce626744cc77 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 6 Aug 2007 14:02:12 +0100 Subject: [PATCH] [MIPS] SMP: Scatter __cpuinit over the code as needed. MIPS doesn't do CPU hotplugging yet but since many of the functions don't even have an __init let's fix this right. Signed-off-by: Ralf Baechle --- arch/mips/kernel/smp-mt.c | 6 +++--- arch/mips/mips-boards/malta/malta_smtc.c | 6 +++--- arch/mips/mipssim/sim_smp.c | 6 +++--- arch/mips/pmc-sierra/yosemite/smp.c | 6 +++--- arch/mips/qemu/q-smp.c | 6 +++--- arch/mips/sgi-ip27/ip27-smp.c | 4 ++-- arch/mips/sibyte/cfe/smp.c | 6 +++--- 7 files changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 19b30d6f1727..05dcce416325 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -287,7 +287,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * (unsigned long)idle->thread_info the gp * assumes a 1:1 mapping of TC => VPE */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { struct thread_info *gp = task_thread_info(idle); dvpe(); @@ -321,7 +321,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) evpe(EVPE_ENABLE); } -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { /* Enable per-cpu interrupts */ @@ -330,7 +330,7 @@ void prom_init_secondary(void) (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7)); } -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { write_c0_compare(read_c0_count() + (8* mips_hpt_frequency/HZ)); diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c index ea8f3bb8ed81..40d782d7d37f 100644 --- a/arch/mips/mips-boards/malta/malta_smtc.c +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -24,7 +24,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { smtc_boot_secondary(cpu, idle); } @@ -33,7 +33,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { void smtc_init_secondary(void); int myvpe; @@ -75,7 +75,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { smtc_smp_finish(); } diff --git a/arch/mips/mipssim/sim_smp.c b/arch/mips/mipssim/sim_smp.c index 38fa807b99f9..ccbbccac23ef 100644 --- a/arch/mips/mipssim/sim_smp.c +++ b/arch/mips/mipssim/sim_smp.c @@ -53,7 +53,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { #ifdef CONFIG_MIPS_MT_SMTC smtc_boot_secondary(cpu, idle); @@ -64,7 +64,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { #ifdef CONFIG_MIPS_MT_SMTC void smtc_init_secondary(void); @@ -103,7 +103,7 @@ void plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { #ifdef CONFIG_MIPS_MT_SMTC smtc_smp_finish(); diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c index 1c852d6a7654..b0f12cd2968a 100644 --- a/arch/mips/pmc-sierra/yosemite/smp.c +++ b/arch/mips/pmc-sierra/yosemite/smp.c @@ -77,7 +77,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * stack so the first thing we do is throw away that stuff and load useful * values into the registers ... */ -void __init prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { unsigned long gp = (unsigned long) task_thread_info(idle); unsigned long sp = __KSTK_TOS(idle); @@ -97,12 +97,12 @@ void prom_cpus_done(void) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { set_c0_status(ST0_CO | ST0_IE | ST0_IM); } -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { } diff --git a/arch/mips/qemu/q-smp.c b/arch/mips/qemu/q-smp.c index 786bbfa214d1..4b0178d0df0b 100644 --- a/arch/mips/qemu/q-smp.c +++ b/arch/mips/qemu/q-smp.c @@ -22,11 +22,11 @@ void core_send_ipi(int cpu, unsigned int action) * After we've done initial boot, this function is called to allow the * board code to clean up state, if needed */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { } -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { } @@ -43,7 +43,7 @@ void __init prom_prepare_cpus(unsigned int max_cpus) /* * Firmware CPU startup hook */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { } diff --git a/arch/mips/sgi-ip27/ip27-smp.c b/arch/mips/sgi-ip27/ip27-smp.c index 08e79141b47c..fbb27728a76a 100644 --- a/arch/mips/sgi-ip27/ip27-smp.c +++ b/arch/mips/sgi-ip27/ip27-smp.c @@ -171,7 +171,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * set sp to the kernel stack of the newly created idle process, gp to the proc * struct so that current_thread_info() will work. */ -void __init prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { unsigned long gp = (unsigned long)task_thread_info(idle); unsigned long sp = __KSTK_TOS(idle); @@ -191,7 +191,7 @@ void __init prom_cpus_done(void) { } -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { } diff --git a/arch/mips/sibyte/cfe/smp.c b/arch/mips/sibyte/cfe/smp.c index eab20e2db323..5de4cff9d14a 100644 --- a/arch/mips/sibyte/cfe/smp.c +++ b/arch/mips/sibyte/cfe/smp.c @@ -58,7 +58,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) * Setup the PC, SP, and GP of a secondary processor and start it * running! */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { int retval; @@ -72,7 +72,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) /* * Code to run on secondary just after probing the CPU */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) extern void bcm1480_smp_init(void); @@ -89,7 +89,7 @@ void prom_init_secondary(void) * Do any tidying up before marking online and running the idle * loop */ -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) extern void bcm1480_smp_finish(void); -- 2.30.2