From 3f4347fce0f6bcc57de94c5dc898e2a3967bf4a2 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Wed, 8 May 2024 14:51:54 +0100 Subject: [PATCH] mediatek: mt7988a.dtsi: add interrupts to GE switch PHYs The way to register the switch MDIO bus and PHYs on the bus in upstream Linux is more strict and requires each PHY to explicitely state the interrupt instead of assuming it in case the 'interrupts' property in DT is missing. Add missing interrupts for the PHYs of the build-in 4x1GE switch of the MT7988 SoC. Fixes: 4354b34f6f ("generic: 6.6: sync mt7530 DSA driver with upstream") Signed-off-by: Daniel Golle --- .../files-6.6/arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index db2b85c181..af4dcb3581 100644 --- a/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/target/linux/mediatek/files-6.6/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -1282,6 +1282,7 @@ gsw_phy0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + interrupts = <0>; phy-mode = "internal"; nvmem-cells = <&phy_calibration_p0>; nvmem-cell-names = "phy-cal-data"; @@ -1307,6 +1308,7 @@ gsw_phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; + interrupts = <1>; phy-mode = "internal"; nvmem-cells = <&phy_calibration_p1>; nvmem-cell-names = "phy-cal-data"; @@ -1332,6 +1334,7 @@ gsw_phy2: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <2>; + interrupts = <2>; phy-mode = "internal"; nvmem-cells = <&phy_calibration_p2>; nvmem-cell-names = "phy-cal-data"; @@ -1357,6 +1360,7 @@ gsw_phy3: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <3>; + interrupts = <3>; phy-mode = "internal"; nvmem-cells = <&phy_calibration_p3>; nvmem-cell-names = "phy-cal-data"; -- 2.30.2