From 35d1f05094fc6aae0ad3f71d743815d002edc6ee Mon Sep 17 00:00:00 2001 From: Ansuel Smith Date: Mon, 10 Aug 2020 13:46:35 +0200 Subject: [PATCH] ipq806x: replace nvmem qcom patch with upstream version - Replace nvmem qcom patch with upstream version - Update compatible Signed-off-by: Ansuel Smith [refresh patches, minor commit message rewording] Signed-off-by: Adrian Schmutzler Tested-by: Paul Blazejowski [R7800] --- .../083-ipq8064-dtsi-additions.patch | 2 +- ...em-Add-support-for-krait-based-socs.patch} | 181 ++++++++++-------- ...eq-qcom-fix-wrong-compatible-binding.patch | 26 +++ 3 files changed, 123 insertions(+), 86 deletions(-) rename target/linux/ipq806x/patches-5.4/{0038-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch => 092-1-v5.7-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch} (62%) create mode 100644 target/linux/ipq806x/patches-5.4/092-2-v5.7-cpufreq-qcom-fix-wrong-compatible-binding.patch diff --git a/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch index 9db5190dae..221ecd7396 100644 --- a/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch +++ b/target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch @@ -67,7 +67,7 @@ + }; + + opp_table0: opp_table0 { -+ compatible = "operating-points-v2-qcom-cpu"; ++ compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + + opp-384000000 { diff --git a/target/linux/ipq806x/patches-5.4/0038-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch b/target/linux/ipq806x/patches-5.4/092-1-v5.7-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch similarity index 62% rename from target/linux/ipq806x/patches-5.4/0038-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch rename to target/linux/ipq806x/patches-5.4/092-1-v5.7-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch index 1df38578d8..ddc51d241c 100644 --- a/target/linux/ipq806x/patches-5.4/0038-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch +++ b/target/linux/ipq806x/patches-5.4/092-1-v5.7-qcom-cpufreq-nvmem-Add-support-for-krait-based-socs.patch @@ -1,13 +1,7 @@ -Subject: [PATCH v12 14/14] cpufreq: qcom: Add support for krait based socs -Date: Tue, 14 Aug 2018 17:42:33 +0530 -Message-Id: <1534248753-2440-15-git-send-email-sricharan@codeaurora.org> -X-Mailer: git-send-email 1.9.1 -In-Reply-To: <1534248753-2440-1-git-send-email-sricharan@codeaurora.org> -References: <1534248753-2440-1-git-send-email-sricharan@codeaurora.org> -Sender: linux-kernel-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org +From a8811ec764f95a04ba82f6f457e28c5e9e36e36b Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Fri, 13 Mar 2020 18:52:13 +0100 +Subject: cpufreq: qcom: Add support for krait based socs In Certain QCOM SoCs like ipq8064, apq8064, msm8960, msm8974 that has KRAIT processors the voltage/current value of each OPP @@ -18,27 +12,27 @@ the efuse value. This is similar to the existing code for kryo cores. So adding support for krait cores here. Signed-off-by: Sricharan R +Signed-off-by: Ansuel Smith +Signed-off-by: Viresh Kumar --- .../devicetree/bindings/opp/qcom-nvmem-cpufreq.txt | 3 +- drivers/cpufreq/Kconfig.arm | 2 +- drivers/cpufreq/cpufreq-dt-platdev.c | 5 + - drivers/cpufreq/qcom-cpufreq-nvmem.c | 151 +++++++++++++++++++-- - 4 files changed, 149 insertions(+), 12 deletions(-) + drivers/cpufreq/qcom-cpufreq-nvmem.c | 191 +++++++++++++++++++-- + 4 files changed, 183 insertions(+), 18 deletions(-) -# diff --git a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt -# index 6dcdfcd..7bc0f1a 100644 -# --- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt -# +++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt -# @@ -19,7 +19,8 @@ In 'cpus' nodes: +--- a/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt ++++ b/Documentation/devicetree/bindings/opp/qcom-nvmem-cpufreq.txt +@@ -19,7 +19,8 @@ In 'cpu' nodes: -# In 'operating-points-v2' table: -# - compatible: Should be -# - - 'operating-points-v2-qcom-cpu' for apq8096 and msm8996. -# + - 'operating-points-v2-qcom-cpu' for apq8096, msm8996, msm8974, -# + apq8064, msm8960 and ipq8074. -# - nvmem-cells: A phandle pointing to a nvmem-cells node representing the -# efuse registers that has information about the -# speedbin that is used to select the right frequency/voltage + In 'operating-points-v2' table: + - compatible: Should be +- - 'operating-points-v2-kryo-cpu' for apq8096 and msm8996. ++ - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974, ++ apq8064, ipq8064, msm8960 and ipq8074. + + Optional properties: + -------------------- --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -134,7 +134,7 @@ config ARM_OMAP2PLUS_CPUFREQ @@ -77,16 +71,17 @@ Signed-off-by: Sricharan R struct qcom_cpufreq_drv { - struct opp_table **opp_tables; -+ struct opp_table **opp_tables1; -+ struct opp_table **opp_tables2; ++ struct opp_table **names_opp_tables; ++ struct opp_table **hw_opp_tables; struct opp_table **genpd_opp_tables; u32 versions; const struct qcom_cpufreq_match_data *data; -@@ -62,6 +64,79 @@ struct qcom_cpufreq_drv { +@@ -62,6 +64,84 @@ struct qcom_cpufreq_drv { static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev; -+static void get_krait_bin_format_a(int *speed, int *pvs, int *pvs_ver, ++static void get_krait_bin_format_a(struct device *cpu_dev, ++ int *speed, int *pvs, int *pvs_ver, + struct nvmem_cell *pvs_nvmem, u8 *buf) +{ + u32 pte_efuse; @@ -99,9 +94,9 @@ Signed-off-by: Sricharan R + + if (*speed == 0xf) { + *speed = 0; -+ pr_warn("Speed bin: Defaulting to %d\n", *speed); ++ dev_warn(cpu_dev, "Speed bin: Defaulting to %d\n", *speed); + } else { -+ pr_info("Speed bin: %d\n", *speed); ++ dev_dbg(cpu_dev, "Speed bin: %d\n", *speed); + } + + *pvs = (pte_efuse >> 10) & 0x7; @@ -110,39 +105,43 @@ Signed-off-by: Sricharan R + + if (*pvs == 0x7) { + *pvs = 0; -+ pr_warn("PVS bin: Defaulting to %d\n", *pvs); ++ dev_warn(cpu_dev, "PVS bin: Defaulting to %d\n", *pvs); + } else { -+ pr_info("PVS bin: %d\n", *pvs); ++ dev_dbg(cpu_dev, "PVS bin: %d\n", *pvs); + } +} + -+static void get_krait_bin_format_b(int *speed, int *pvs, int *pvs_ver, ++static void get_krait_bin_format_b(struct device *cpu_dev, ++ int *speed, int *pvs, int *pvs_ver, + struct nvmem_cell *pvs_nvmem, u8 *buf) +{ + u32 pte_efuse, redundant_sel; + + pte_efuse = *((u32 *)buf); + redundant_sel = (pte_efuse >> 24) & 0x7; -+ *speed = pte_efuse & 0x7; + -+ /* 4 bits of PVS are in efuse register bits 31, 8-6. */ -+ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); + *pvs_ver = (pte_efuse >> 4) & 0x3; + + switch (redundant_sel) { + case 1: ++ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); + *speed = (pte_efuse >> 27) & 0xf; + break; + case 2: + *pvs = (pte_efuse >> 27) & 0xf; ++ *speed = pte_efuse & 0x7; + break; ++ default: ++ /* 4 bits of PVS are in efuse register bits 31, 8-6. */ ++ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); ++ *speed = pte_efuse & 0x7; + } + + /* Check SPEED_BIN_BLOW_STATUS */ + if (pte_efuse & BIT(3)) { -+ pr_info("Speed bin: %d\n", *speed); ++ dev_dbg(cpu_dev, "Speed bin: %d\n", *speed); + } else { -+ pr_warn("Speed bin not set. Defaulting to 0!\n"); ++ dev_warn(cpu_dev, "Speed bin not set. Defaulting to 0!\n"); + *speed = 0; + } + @@ -150,19 +149,19 @@ Signed-off-by: Sricharan R + pte_efuse = *(((u32 *)buf) + 4); + pte_efuse &= BIT(21); + if (pte_efuse) { -+ pr_info("PVS bin: %d\n", *pvs); ++ dev_dbg(cpu_dev, "PVS bin: %d\n", *pvs); + } else { -+ pr_warn("PVS bin not set. Defaulting to 0!\n"); ++ dev_warn(cpu_dev, "PVS bin not set. Defaulting to 0!\n"); + *pvs = 0; + } + -+ pr_info("PVS version: %d\n", *pvs_ver); ++ dev_dbg(cpu_dev, "PVS version: %d\n", *pvs_ver); +} + static enum _msm8996_version qcom_cpufreq_get_msm_id(void) { size_t len; -@@ -93,11 +168,13 @@ static enum _msm8996_version qcom_cpufre +@@ -93,11 +173,13 @@ static enum _msm8996_version qcom_cpufre static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, struct nvmem_cell *speedbin_nvmem, @@ -176,7 +175,7 @@ Signed-off-by: Sricharan R msm8996_version = qcom_cpufreq_get_msm_id(); if (NUM_OF_MSM8996_VERSIONS == msm8996_version) { -@@ -125,10 +202,44 @@ static int qcom_cpufreq_kryo_name_versio +@@ -125,10 +207,51 @@ static int qcom_cpufreq_kryo_name_versio return 0; } @@ -190,13 +189,20 @@ Signed-off-by: Sricharan R + size_t len; + + speedbin = nvmem_cell_read(speedbin_nvmem, &len); -+ if (len == 4) { -+ get_krait_bin_format_a(&speed, &pvs, &pvs_ver, ++ ++ if (IS_ERR(speedbin)) ++ return PTR_ERR(speedbin); ++ ++ switch (len) { ++ case 4: ++ get_krait_bin_format_a(cpu_dev, &speed, &pvs, &pvs_ver, + speedbin_nvmem, speedbin); -+ } else if (len == 8) { -+ get_krait_bin_format_b(&speed, &pvs, &pvs_ver, ++ break; ++ case 8: ++ get_krait_bin_format_b(cpu_dev, &speed, &pvs, &pvs_ver, + speedbin_nvmem, speedbin); -+ } else { ++ break; ++ default: + dev_err(cpu_dev, "Unable to read nvmem data. Defaulting to 0!\n"); + return -ENODEV; + } @@ -221,7 +227,7 @@ Signed-off-by: Sricharan R static const char *qcs404_genpd_names[] = { "cpr", NULL }; static const struct qcom_cpufreq_match_data match_data_qcs404 = { -@@ -141,6 +252,7 @@ static int qcom_cpufreq_probe(struct pla +@@ -141,6 +264,7 @@ static int qcom_cpufreq_probe(struct pla struct nvmem_cell *speedbin_nvmem; struct device_node *np; struct device *cpu_dev; @@ -229,7 +235,7 @@ Signed-off-by: Sricharan R unsigned cpu; const struct of_device_id *match; int ret; -@@ -153,7 +265,7 @@ static int qcom_cpufreq_probe(struct pla +@@ -153,7 +277,7 @@ static int qcom_cpufreq_probe(struct pla if (!np) return -ENOENT; @@ -238,106 +244,111 @@ Signed-off-by: Sricharan R if (!ret) { of_node_put(np); return -ENOENT; -@@ -181,7 +293,7 @@ static int qcom_cpufreq_probe(struct pla +@@ -181,7 +305,8 @@ static int qcom_cpufreq_probe(struct pla goto free_drv; } - ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv); -+ ret = drv->data->get_version(cpu_dev, speedbin_nvmem, &pvs_name, drv); ++ ret = drv->data->get_version(cpu_dev, ++ speedbin_nvmem, &pvs_name, drv); if (ret) { nvmem_cell_put(speedbin_nvmem); goto free_drv; -@@ -190,12 +302,18 @@ static int qcom_cpufreq_probe(struct pla +@@ -190,12 +315,20 @@ static int qcom_cpufreq_probe(struct pla } of_node_put(np); - drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables), -+ drv->opp_tables1 = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables1), ++ drv->names_opp_tables = kcalloc(num_possible_cpus(), ++ sizeof(*drv->names_opp_tables), GFP_KERNEL); - if (!drv->opp_tables) { -+ if (!drv->opp_tables1) { ++ if (!drv->names_opp_tables) { ret = -ENOMEM; goto free_drv; } -+ drv->opp_tables2 = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables2), ++ drv->hw_opp_tables = kcalloc(num_possible_cpus(), ++ sizeof(*drv->hw_opp_tables), + GFP_KERNEL); -+ if (!drv->opp_tables2) { ++ if (!drv->hw_opp_tables) { + ret = -ENOMEM; -+ goto free_opp1; ++ goto free_opp_names; + } drv->genpd_opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->genpd_opp_tables), -@@ -213,11 +331,22 @@ static int qcom_cpufreq_probe(struct pla +@@ -213,11 +346,23 @@ static int qcom_cpufreq_probe(struct pla } if (drv->data->get_version) { - drv->opp_tables[cpu] = - dev_pm_opp_set_supported_hw(cpu_dev, +- &drv->versions, 1); +- if (IS_ERR(drv->opp_tables[cpu])) { +- ret = PTR_ERR(drv->opp_tables[cpu]); + + if (pvs_name) { -+ drv->opp_tables1[cpu] = dev_pm_opp_set_prop_name(cpu_dev, ++ drv->names_opp_tables[cpu] = dev_pm_opp_set_prop_name( ++ cpu_dev, + pvs_name); -+ if (IS_ERR(drv->opp_tables1[cpu])) { -+ ret = PTR_ERR(drv->opp_tables1[cpu]); ++ if (IS_ERR(drv->names_opp_tables[cpu])) { ++ ret = PTR_ERR(drv->names_opp_tables[cpu]); + dev_err(cpu_dev, "Failed to add OPP name %s\n", + pvs_name); + goto free_opp; + } + } + -+ drv->opp_tables2[cpu] = dev_pm_opp_set_supported_hw(cpu_dev, - &drv->versions, 1); -- if (IS_ERR(drv->opp_tables[cpu])) { -- ret = PTR_ERR(drv->opp_tables[cpu]); -+ if (IS_ERR(drv->opp_tables2[cpu])) { -+ ret = PTR_ERR(drv->opp_tables2[cpu]); ++ drv->hw_opp_tables[cpu] = dev_pm_opp_set_supported_hw( ++ cpu_dev, &drv->versions, 1); ++ if (IS_ERR(drv->hw_opp_tables[cpu])) { ++ ret = PTR_ERR(drv->hw_opp_tables[cpu]); dev_err(cpu_dev, "Failed to set supported hardware\n"); goto free_genpd_opp; -@@ -259,11 +388,18 @@ free_genpd_opp: +@@ -259,11 +404,18 @@ free_genpd_opp: kfree(drv->genpd_opp_tables); free_opp: for_each_possible_cpu(cpu) { - if (IS_ERR_OR_NULL(drv->opp_tables[cpu])) -+ if (IS_ERR_OR_NULL(drv->opp_tables1[cpu])) ++ if (IS_ERR_OR_NULL(drv->names_opp_tables[cpu])) + break; -+ dev_pm_opp_put_prop_name(drv->opp_tables1[cpu]); ++ dev_pm_opp_put_prop_name(drv->names_opp_tables[cpu]); + } + for_each_possible_cpu(cpu) { -+ if (IS_ERR_OR_NULL(drv->opp_tables2[cpu])) ++ if (IS_ERR_OR_NULL(drv->hw_opp_tables[cpu])) break; - dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); -+ dev_pm_opp_put_supported_hw(drv->opp_tables2[cpu]); ++ dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); } - kfree(drv->opp_tables); -+ kfree(drv->opp_tables2); -+free_opp1: -+ kfree(drv->opp_tables1); ++ kfree(drv->hw_opp_tables); ++free_opp_names: ++ kfree(drv->names_opp_tables); free_drv: kfree(drv); -@@ -278,13 +414,16 @@ static int qcom_cpufreq_remove(struct pl +@@ -278,13 +430,16 @@ static int qcom_cpufreq_remove(struct pl platform_device_unregister(cpufreq_dt_pdev); for_each_possible_cpu(cpu) { - if (drv->opp_tables[cpu]) - dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]); -+ if (drv->opp_tables1[cpu]) -+ dev_pm_opp_put_supported_hw(drv->opp_tables1[cpu]); -+ if (drv->opp_tables2[cpu]) -+ dev_pm_opp_put_supported_hw(drv->opp_tables2[cpu]); ++ if (drv->names_opp_tables[cpu]) ++ dev_pm_opp_put_supported_hw(drv->names_opp_tables[cpu]); ++ if (drv->hw_opp_tables[cpu]) ++ dev_pm_opp_put_supported_hw(drv->hw_opp_tables[cpu]); if (drv->genpd_opp_tables[cpu]) dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]); } - kfree(drv->opp_tables); -+ kfree(drv->opp_tables1); -+ kfree(drv->opp_tables2); ++ kfree(drv->names_opp_tables); ++ kfree(drv->hw_opp_tables); kfree(drv->genpd_opp_tables); kfree(drv); -@@ -303,6 +442,10 @@ static const struct of_device_id qcom_cp +@@ -303,6 +458,10 @@ static const struct of_device_id qcom_cp { .compatible = "qcom,apq8096", .data = &match_data_kryo }, { .compatible = "qcom,msm8996", .data = &match_data_kryo }, { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, diff --git a/target/linux/ipq806x/patches-5.4/092-2-v5.7-cpufreq-qcom-fix-wrong-compatible-binding.patch b/target/linux/ipq806x/patches-5.4/092-2-v5.7-cpufreq-qcom-fix-wrong-compatible-binding.patch new file mode 100644 index 0000000000..764a917c1f --- /dev/null +++ b/target/linux/ipq806x/patches-5.4/092-2-v5.7-cpufreq-qcom-fix-wrong-compatible-binding.patch @@ -0,0 +1,26 @@ +From 2dea651680cea1f3a29925de51002f33d1f55711 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Fri, 1 May 2020 00:22:25 +0200 +Subject: cpufreq: qcom: fix wrong compatible binding + +Binding in Documentation is still "operating-points-v2-kryo-cpu". +Restore the old binding to fix the compatibility problem. + +Fixes: a8811ec764f9 ("cpufreq: qcom: Add support for krait based socs") +Signed-off-by: Ansuel Smith +Signed-off-by: Viresh Kumar +--- + drivers/cpufreq/qcom-cpufreq-nvmem.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c ++++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c +@@ -277,7 +277,7 @@ static int qcom_cpufreq_probe(struct pla + if (!np) + return -ENOENT; + +- ret = of_device_is_compatible(np, "operating-points-v2-qcom-cpu"); ++ ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu"); + if (!ret) { + of_node_put(np); + return -ENOENT; -- 2.30.2