From 3490738f9be9e20ac44dff4e76ed63762453ef68 Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Tue, 17 Jul 2018 10:22:37 +0800 Subject: [PATCH] drm/amd/powerplay: enable fclk ss by default Set fclk ss as enabled on default. Signed-off-by: Evan Quan Reviewed-by: Rex Zhu Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c index 32d24a48a947..5f1f7a32ac24 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_processpptables.c @@ -810,7 +810,7 @@ static int append_vbios_pptable(struct pp_hwmgr *hwmgr, PPTable_t *ppsmc_pptable ppsmc_pptable->UclkSpreadPercent = smc_dpm_table->uclkspreadpercent; ppsmc_pptable->UclkSpreadFreq = smc_dpm_table->uclkspreadfreq; - ppsmc_pptable->FclkSpreadEnabled = 0; + ppsmc_pptable->FclkSpreadEnabled = smc_dpm_table->fclkspreadenabled; ppsmc_pptable->FclkSpreadPercent = smc_dpm_table->fclkspreadpercent; ppsmc_pptable->FclkSpreadFreq = smc_dpm_table->fclkspreadfreq; -- 2.30.2