From 2e343d97608ad0ccf6ca083e4bc9427f754ac2e0 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Wed, 25 Aug 2010 19:56:08 +0000 Subject: [PATCH] add 2.6.35 support SVN-Revision: 22800 --- target/linux/brcm63xx/config-2.6.35 | 218 ++++ .../patches-2.6.35/007-usb-ohci-support.patch | 125 +++ .../patches-2.6.35/008-usb-ehci-support.patch | 117 +++ .../010-add_bcm63xx_ohci_controller.patch | 202 ++++ .../011-add_bcm63xx_ehci_controller.patch | 178 ++++ .../patches-2.6.35/020-watchdog.patch | 386 +++++++ .../040-bcm963xx_flashmap.patch | 380 +++++++ ...070_bcm63xx_enet_vlan_incoming_fixed.patch | 11 + .../patches-2.6.35/100-reset_buttons.patch | 98 ++ .../brcm63xx/patches-2.6.35/110-gpiodev.patch | 22 + .../140-new_bcm96348gw_leds.patch | 82 ++ .../patches-2.6.35/150-alice_gate2_leds.patch | 107 ++ .../patches-2.6.35/170-board_livebox.patch | 246 +++++ .../180-udc_preliminary_support.patch | 243 +++++ .../200-extended-platform-devices.patch | 25 + .../211-nxp-74hc164-gpio-chip-driver.patch | 279 +++++ .../patches-2.6.35/220-board-D4PW.patch | 60 ++ .../patches-2.6.35/221-board-NB4.patch | 536 ++++++++++ .../brcm63xx/patches-2.6.35/240-spi.patch | 956 ++++++++++++++++++ .../250-6358-enet1-external-mii-clk.patch | 22 + .../260-no_ehci_over_current_check.patch | 16 + .../patches-2.6.35/300-wl_exports.patch | 34 + 22 files changed, 4343 insertions(+) create mode 100644 target/linux/brcm63xx/config-2.6.35 create mode 100644 target/linux/brcm63xx/patches-2.6.35/007-usb-ohci-support.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/008-usb-ehci-support.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/010-add_bcm63xx_ohci_controller.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/011-add_bcm63xx_ehci_controller.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/020-watchdog.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/040-bcm963xx_flashmap.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/070_bcm63xx_enet_vlan_incoming_fixed.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/100-reset_buttons.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/110-gpiodev.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/140-new_bcm96348gw_leds.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/150-alice_gate2_leds.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/170-board_livebox.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/180-udc_preliminary_support.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/200-extended-platform-devices.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/211-nxp-74hc164-gpio-chip-driver.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/220-board-D4PW.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/221-board-NB4.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/240-spi.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/250-6358-enet1-external-mii-clk.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/260-no_ehci_over_current_check.patch create mode 100644 target/linux/brcm63xx/patches-2.6.35/300-wl_exports.patch diff --git a/target/linux/brcm63xx/config-2.6.35 b/target/linux/brcm63xx/config-2.6.35 new file mode 100644 index 000000000000..519aab1c26b4 --- /dev/null +++ b/target/linux/brcm63xx/config-2.6.35 @@ -0,0 +1,218 @@ +CONFIG_32BIT=y +# CONFIG_64BIT is not set +# CONFIG_ALCHEMY_GPIO_INDIRECT is not set +# CONFIG_AR7 is not set +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ATH_COMMON is not set +CONFIG_AUDIT=y +CONFIG_AUDIT_GENERIC=y +# CONFIG_BATMAN_ADV is not set +# CONFIG_BCM47XX is not set +CONFIG_BCM63XX=y +CONFIG_BCM63XX_CPU_6338=y +CONFIG_BCM63XX_CPU_6345=y +CONFIG_BCM63XX_CPU_6348=y +CONFIG_BCM63XX_CPU_6358=y +CONFIG_BCM63XX_ENET=y +CONFIG_BCM63XX_PHY=y +CONFIG_BCM63XX_WDT=y +CONFIG_BITREVERSE=y +CONFIG_BOARD_BCM963XX=y +# CONFIG_BOARD_LIVEBOX is not set +CONFIG_BSD_PROCESS_ACCT_V3=y +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_CEVT_R4K=y +CONFIG_CEVT_R4K_LIB=y +CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_CPU_BIG_ENDIAN=y +# CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +# CONFIG_CPU_LOONGSON2E is not set +# CONFIG_CPU_LOONGSON2F is not set +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +CONFIG_CPU_MIPSR1=y +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_VR41XX is not set +CONFIG_CRAMFS=y +CONFIG_CSRC_R4K=y +CONFIG_CSRC_R4K_LIB=y +CONFIG_DECOMPRESS_LZMA=y +CONFIG_DEFAULT_SECURITY="" +CONFIG_DEVPORT=y +# CONFIG_DM9000 is not set +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_EARLY_PRINTK=y +CONFIG_ELF_CORE=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_CS5535 is not set +CONFIG_GPIO_DEVICE=y +CONFIG_GPIO_SYSFS=y +# CONFIG_HAMRADIO is not set +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +CONFIG_IMAGE_CMDLINE_HACK=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_IRQ_CPU=y +CONFIG_KEXEC=y +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_LT3593 is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +CONFIG_LOONGSON_UART_BASE=y +# CONFIG_MACH_ALCHEMY is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_MACH_LOONGSON is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MACH_VR41XX is not set +CONFIG_MAGIC_SYSRQ=y +# CONFIG_MIKROTIK_RB532 is not set +CONFIG_MIPS=y +# CONFIG_MIPS_COBALT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_MACHINE is not set +# CONFIG_MIPS_MALTA is not set +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_SIM is not set +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MTD_BCM963XX=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +# CONFIG_NL80211_TESTMODE is not set +# CONFIG_NO_IOPORT is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PHYLIB=y +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_POWERTV is not set +# CONFIG_R8187SE is not set +# CONFIG_RAMZSWAP is not set +CONFIG_RELAY=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +# CONFIG_SCSI_DMA is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_SWARM is not set +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SSB=y +CONFIG_SSB_B43_PCI_BRIDGE=y +# CONFIG_SSB_DRIVER_MIPS is not set +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_SPROM=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +# CONFIG_TC35815 is not set +# CONFIG_TINY_RCU is not set +CONFIG_TRAD_SIGNALS=y +# CONFIG_TREE_PREEMPT_RCU is not set +CONFIG_TREE_RCU=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/brcm63xx/patches-2.6.35/007-usb-ohci-support.patch b/target/linux/brcm63xx/patches-2.6.35/007-usb-ohci-support.patch new file mode 100644 index 000000000000..a70b5012e306 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/007-usb-ohci-support.patch @@ -0,0 +1,125 @@ +The bcm63xx SOC has an integrated OHCI controller, this patch adds +platform device registration and change board code to register ohci +device when necessary. + +Signed-off-by: Maxime Bizon +--- + arch/mips/bcm63xx/Kconfig | 6 ++ + arch/mips/bcm63xx/Makefile | 3 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++ + arch/mips/bcm63xx/dev-usb-ohci.c | 49 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++ + 5 files changed, 67 insertions(+), 1 deletions(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -16,10 +16,16 @@ config BCM63XX_CPU_6345 + config BCM63XX_CPU_6348 + bool "support 6348 CPU" + select HW_HAS_PCI ++ select USB_ARCH_HAS_OHCI ++ select USB_OHCI_BIG_ENDIAN_DESC ++ select USB_OHCI_BIG_ENDIAN_MMIO + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" + select HW_HAS_PCI ++ select USB_ARCH_HAS_OHCI ++ select USB_OHCI_BIG_ENDIAN_DESC ++ select USB_OHCI_BIG_ENDIAN_MMIO + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,5 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ +- dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o ++ dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \ ++ dev-usb-ohci.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + #include + + #define PFX "board_bcm963xx: " +@@ -877,6 +878,9 @@ int __init board_register_devices(void) + !board_get_mac_address(board.enet1.mac_addr)) + bcm63xx_enet_register(1, &board.enet1); + ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); + +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -0,0 +1,49 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2010 Maxime Bizon ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ohci_resources[] = { ++ { ++ /* start & end filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ /* start filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ohci_dmamask = ~(u32)0; ++ ++static struct platform_device bcm63xx_ohci_device = { ++ .name = "bcm63xx_ohci", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(ohci_resources), ++ .resource = ohci_resources, ++ .dev = { ++ .dma_mask = &ohci_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++}; ++ ++int __init bcm63xx_ohci_register(void) ++{ ++ if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358()) ++ return 0; ++ ++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); ++ ohci_resources[0].end = ohci_resources[0].start; ++ ohci_resources[0].end += RSET_OHCI_SIZE - 1; ++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); ++ return platform_device_register(&bcm63xx_ohci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_OHCI_H_ ++#define BCM63XX_DEV_USB_OHCI_H_ ++ ++int bcm63xx_ohci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-2.6.35/008-usb-ehci-support.patch b/target/linux/brcm63xx/patches-2.6.35/008-usb-ehci-support.patch new file mode 100644 index 000000000000..0c236f0b7ca3 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/008-usb-ehci-support.patch @@ -0,0 +1,117 @@ +The bcm63xx SOC has an integrated EHCI controller, this patch adds +platform device registration and change board code to register +EHCI device when necessary. + +Signed-off-by: Maxime Bizon +--- + arch/mips/bcm63xx/Kconfig | 2 + + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++ + arch/mips/bcm63xx/dev-usb-ehci.c | 49 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++ + 5 files changed, 62 insertions(+), 1 deletions(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -26,6 +26,8 @@ config BCM63XX_CPU_6358 + select USB_ARCH_HAS_OHCI + select USB_OHCI_BIG_ENDIAN_DESC + select USB_OHCI_BIG_ENDIAN_MMIO ++ select USB_ARCH_HAS_EHCI ++ select USB_EHCI_BIG_ENDIAN_MMIO + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ + dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \ +- dev-usb-ohci.o ++ dev-usb-ohci.o dev-usb-ehci.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + #include + + #define PFX "board_bcm963xx: " +@@ -878,6 +879,9 @@ int __init board_register_devices(void) + !board_get_mac_address(board.enet1.mac_addr)) + bcm63xx_enet_register(1, &board.enet1); + ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ + if (board.has_ohci0) + bcm63xx_ohci_register(); + +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -0,0 +1,49 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2010 Maxime Bizon ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ehci_resources[] = { ++ { ++ /* start & end filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ /* start filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ehci_dmamask = ~(u32)0; ++ ++static struct platform_device bcm63xx_ehci_device = { ++ .name = "bcm63xx_ehci", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(ehci_resources), ++ .resource = ehci_resources, ++ .dev = { ++ .dma_mask = &ehci_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++}; ++ ++int __init bcm63xx_ehci_register(void) ++{ ++ if (!BCMCPU_IS_6358()) ++ return 0; ++ ++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); ++ ehci_resources[0].end = ehci_resources[0].start; ++ ehci_resources[0].end += RSET_EHCI_SIZE - 1; ++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); ++ return platform_device_register(&bcm63xx_ehci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_EHCI_H_ ++#define BCM63XX_DEV_USB_EHCI_H_ ++ ++int bcm63xx_ehci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-2.6.35/010-add_bcm63xx_ohci_controller.patch b/target/linux/brcm63xx/patches-2.6.35/010-add_bcm63xx_ohci_controller.patch new file mode 100644 index 000000000000..179421ccbf5e --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/010-add_bcm63xx_ohci_controller.patch @@ -0,0 +1,202 @@ +Signed-off-by: Maxime Bizon +--- + drivers/usb/host/ohci-bcm63xx.c | 166 +++++++++++++++++++++++++++++++++++++++ + drivers/usb/host/ohci-hcd.c | 5 + + drivers/usb/host/ohci.h | 2 +- + 3 files changed, 172 insertions(+), 1 deletions(-) + create mode 100644 drivers/usb/host/ohci-bcm63xx.c + +--- /dev/null ++++ b/drivers/usb/host/ohci-bcm63xx.c +@@ -0,0 +1,166 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2010 Maxime Bizon ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct clk *usb_host_clock; ++ ++static int __devinit ohci_bcm63xx_start(struct usb_hcd *hcd) ++{ ++ struct ohci_hcd *ohci = hcd_to_ohci(hcd); ++ int ret; ++ ++ /* ++ * port 2 can be shared with USB slave, but all boards seem to ++ * have only one host port populated, so we can hardcode it ++ */ ++ ohci->num_ports = 1; ++ ++ ret = ohci_init(ohci); ++ if (ret < 0) ++ return ret; ++ ++ ret = ohci_run(ohci); ++ if (ret < 0) { ++ err("can't start %s", hcd->self.bus_name); ++ ohci_stop(hcd); ++ return ret; ++ } ++ return 0; ++} ++ ++static const struct hc_driver ohci_bcm63xx_hc_driver = { ++ .description = hcd_name, ++ .product_desc = "BCM63XX integrated OHCI controller", ++ .hcd_priv_size = sizeof(struct ohci_hcd), ++ ++ .irq = ohci_irq, ++ .flags = HCD_USB11 | HCD_MEMORY, ++ .start = ohci_bcm63xx_start, ++ .stop = ohci_stop, ++ .shutdown = ohci_shutdown, ++ .urb_enqueue = ohci_urb_enqueue, ++ .urb_dequeue = ohci_urb_dequeue, ++ .endpoint_disable = ohci_endpoint_disable, ++ .get_frame_number = ohci_get_frame, ++ .hub_status_data = ohci_hub_status_data, ++ .hub_control = ohci_hub_control, ++ .start_port_reset = ohci_start_port_reset, ++}; ++ ++static int __devinit ohci_hcd_bcm63xx_drv_probe(struct platform_device *pdev) ++{ ++ struct resource *res_mem; ++ struct usb_hcd *hcd; ++ struct ohci_hcd *ohci; ++ u32 reg; ++ int ret, irq; ++ ++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ irq = platform_get_irq(pdev, 0); ++ if (!res_mem || irq < 0) ++ return -ENODEV; ++ ++ if (BCMCPU_IS_6348()) { ++ struct clk *clk; ++ /* enable USB host clock */ ++ clk = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR(clk)) ++ return -ENODEV; ++ ++ clk_enable(clk); ++ usb_host_clock = clk; ++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); ++ ++ } else if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG); ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG); ++ } else ++ return 0; ++ ++ hcd = usb_create_hcd(&ohci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx"); ++ if (!hcd) ++ return -ENOMEM; ++ hcd->rsrc_start = res_mem->start; ++ hcd->rsrc_len = res_mem->end - res_mem->start + 1; ++ ++ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { ++ pr_debug("request_mem_region failed\n"); ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); ++ if (!hcd->regs) { ++ pr_debug("ioremap failed\n"); ++ ret = -EIO; ++ goto out1; ++ } ++ ++ ohci = hcd_to_ohci(hcd); ++ ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC | ++ OHCI_QUIRK_FRAME_NO; ++ ohci_hcd_init(ohci); ++ ++ ret = usb_add_hcd(hcd, irq, IRQF_DISABLED); ++ if (ret) ++ goto out2; ++ ++ platform_set_drvdata(pdev, hcd); ++ return 0; ++ ++out2: ++ iounmap(hcd->regs); ++out1: ++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len); ++out: ++ usb_put_hcd(hcd); ++ return ret; ++} ++ ++static int __devexit ohci_hcd_bcm63xx_drv_remove(struct platform_device *pdev) ++{ ++ struct usb_hcd *hcd; ++ ++ hcd = platform_get_drvdata(pdev); ++ usb_remove_hcd(hcd); ++ iounmap(hcd->regs); ++ usb_put_hcd(hcd); ++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len); ++ if (usb_host_clock) { ++ clk_disable(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++static struct platform_driver ohci_hcd_bcm63xx_driver = { ++ .probe = ohci_hcd_bcm63xx_drv_probe, ++ .remove = __devexit_p(ohci_hcd_bcm63xx_drv_remove), ++ .shutdown = usb_hcd_platform_shutdown, ++ .driver = { ++ .name = "bcm63xx_ohci", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++MODULE_ALIAS("platform:bcm63xx_ohci"); +--- a/drivers/usb/host/ohci-hcd.c ++++ b/drivers/usb/host/ohci-hcd.c +@@ -1061,6 +1061,11 @@ MODULE_LICENSE ("GPL"); + #define PLATFORM_DRIVER ohci_hcd_da8xx_driver + #endif + ++#ifdef CONFIG_BCM63XX ++#include "ohci-bcm63xx.c" ++#define PLATFORM_DRIVER ohci_hcd_bcm63xx_driver ++#endif ++ + #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ + defined(CONFIG_CPU_SUBTYPE_SH7721) || \ + defined(CONFIG_CPU_SUBTYPE_SH7763) || \ +--- a/drivers/usb/host/ohci.h ++++ b/drivers/usb/host/ohci.h +@@ -655,7 +655,7 @@ static inline u32 hc32_to_cpup (const st + * some big-endian SOC implementations. Same thing happens with PSW access. + */ + +-#ifdef CONFIG_PPC_MPC52xx ++#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_BCM63XX) + #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO) + #else + #define big_endian_frame_no_quirk(ohci) 0 diff --git a/target/linux/brcm63xx/patches-2.6.35/011-add_bcm63xx_ehci_controller.patch b/target/linux/brcm63xx/patches-2.6.35/011-add_bcm63xx_ehci_controller.patch new file mode 100644 index 000000000000..331753bd5a98 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/011-add_bcm63xx_ehci_controller.patch @@ -0,0 +1,178 @@ +Signed-off-by: Maxime Bizon +--- + drivers/usb/host/ehci-bcm63xx.c | 154 +++++++++++++++++++++++++++++++++++++++ + drivers/usb/host/ehci-hcd.c | 5 + + 2 files changed, 159 insertions(+), 0 deletions(-) + create mode 100644 drivers/usb/host/ehci-bcm63xx.c + +--- /dev/null ++++ b/drivers/usb/host/ehci-bcm63xx.c +@@ -0,0 +1,154 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++static int ehci_bcm63xx_setup(struct usb_hcd *hcd) ++{ ++ struct ehci_hcd *ehci = hcd_to_ehci(hcd); ++ int retval; ++ ++ retval = ehci_halt(ehci); ++ if (retval) ++ return retval; ++ ++ retval = ehci_init(hcd); ++ if (retval) ++ return retval; ++ ++ ehci_reset(ehci); ++ ehci_port_power(ehci, 0); ++ ++ return retval; ++} ++ ++ ++static const struct hc_driver ehci_bcm63xx_hc_driver = { ++ .description = hcd_name, ++ .product_desc = "BCM63XX integrated EHCI controller", ++ .hcd_priv_size = sizeof(struct ehci_hcd), ++ ++ .irq = ehci_irq, ++ .flags = HCD_MEMORY | HCD_USB2, ++ ++ .reset = ehci_bcm63xx_setup, ++ .start = ehci_run, ++ .stop = ehci_stop, ++ .shutdown = ehci_shutdown, ++ ++ .urb_enqueue = ehci_urb_enqueue, ++ .urb_dequeue = ehci_urb_dequeue, ++ .endpoint_disable = ehci_endpoint_disable, ++ ++ .get_frame_number = ehci_get_frame, ++ ++ .hub_status_data = ehci_hub_status_data, ++ .hub_control = ehci_hub_control, ++ .bus_suspend = ehci_bus_suspend, ++ .bus_resume = ehci_bus_resume, ++ .relinquish_port = ehci_relinquish_port, ++ .port_handed_over = ehci_port_handed_over, ++}; ++ ++static int __devinit ehci_hcd_bcm63xx_drv_probe(struct platform_device *pdev) ++{ ++ struct resource *res_mem; ++ struct usb_hcd *hcd; ++ struct ehci_hcd *ehci; ++ u32 reg; ++ int ret, irq; ++ ++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ irq = platform_get_irq(pdev, 0);; ++ if (!res_mem || irq < 0) ++ return -ENODEV; ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG); ++ ++ /* ++ * The magic value comes for the original vendor BSP and is ++ * needed for USB to work. Datasheet does not help, so the ++ * magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG); ++ ++ hcd = usb_create_hcd(&ehci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx"); ++ if (!hcd) ++ return -ENOMEM; ++ hcd->rsrc_start = res_mem->start; ++ hcd->rsrc_len = res_mem->end - res_mem->start + 1; ++ ++ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { ++ pr_debug("request_mem_region failed\n"); ++ ret = -EBUSY; ++ goto out; ++ } ++ ++ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); ++ if (!hcd->regs) { ++ pr_debug("ioremap failed\n"); ++ ret = -EIO; ++ goto out1; ++ } ++ ++ ehci = hcd_to_ehci(hcd); ++ ehci->big_endian_mmio = 1; ++ ehci->big_endian_desc = 0; ++ ehci->caps = hcd->regs; ++ ehci->regs = hcd->regs + ++ HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); ++ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); ++ ehci->sbrn = 0x20; ++ ++ ret = usb_add_hcd(hcd, irq, IRQF_DISABLED); ++ if (ret) ++ goto out2; ++ ++ platform_set_drvdata(pdev, hcd); ++ return 0; ++ ++out2: ++ iounmap(hcd->regs); ++out1: ++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len); ++out: ++ usb_put_hcd(hcd); ++ return ret; ++} ++ ++static int __devexit ehci_hcd_bcm63xx_drv_remove(struct platform_device *pdev) ++{ ++ struct usb_hcd *hcd; ++ ++ hcd = platform_get_drvdata(pdev); ++ usb_remove_hcd(hcd); ++ iounmap(hcd->regs); ++ usb_put_hcd(hcd); ++ release_mem_region(hcd->rsrc_start, hcd->rsrc_len); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++static struct platform_driver ehci_hcd_bcm63xx_driver = { ++ .probe = ehci_hcd_bcm63xx_drv_probe, ++ .remove = __devexit_p(ehci_hcd_bcm63xx_drv_remove), ++ .shutdown = usb_hcd_platform_shutdown, ++ .driver = { ++ .name = "bcm63xx_ehci", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++MODULE_ALIAS("platform:bcm63xx_ehci"); +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -1158,6 +1158,11 @@ MODULE_LICENSE ("GPL"); + #define PLATFORM_DRIVER ehci_atmel_driver + #endif + ++#ifdef CONFIG_BCM63XX ++#include "ehci-bcm63xx.c" ++#define PLATFORM_DRIVER ehci_hcd_bcm63xx_driver ++#endif ++ + #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ + !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \ + !defined(XILINX_OF_PLATFORM_DRIVER) diff --git a/target/linux/brcm63xx/patches-2.6.35/020-watchdog.patch b/target/linux/brcm63xx/patches-2.6.35/020-watchdog.patch new file mode 100644 index 000000000000..2a75d06a6048 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/020-watchdog.patch @@ -0,0 +1,386 @@ +--- a/drivers/watchdog/Makefile ++++ b/drivers/watchdog/Makefile +@@ -114,6 +114,7 @@ obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt + obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o + obj-$(CONFIG_AR7_WDT) += ar7_wdt.o + obj-$(CONFIG_TXX9_WDT) += txx9wdt.o ++obj-$(CONFIG_BCM63XX_WDT) += bcm63xx_wdt.o + + # PARISC Architecture + +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -875,6 +875,16 @@ config TXX9_WDT + help + Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs. + ++config BCM63XX_WDT ++ tristate "Broadcom BCM63xx hardware watchdog" ++ depends on BCM63XX ++ help ++ Watchdog driver for the built in watchdog hardware in Broadcom ++ BCM63xx SoC. ++ ++ To compile thi driver as a loadable module, choose M here. ++ The module will be called bcm63xx_wdt. ++ + # PARISC Architecture + + # POWERPC Architecture +--- /dev/null ++++ b/drivers/watchdog/bcm63xx_wdt.c +@@ -0,0 +1,354 @@ ++/* ++ * Broadcom BCM63xx SoC watchdog driver ++ * ++ * Copyright (C) 2007, Miguel Gaio ++ * Copyright (C) 2008, Florian Fainelli ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#define PFX KBUILD_MODNAME ++ ++#define WDT_HZ 50000000 /* Fclk */ ++#define WDT_DEFAULT_TIME 30 /* seconds */ ++#define WDT_MAX_TIME 256 /* seconds */ ++ ++static struct { ++ void __iomem *regs; ++ struct timer_list timer; ++ int default_ticks; ++ unsigned long inuse; ++ atomic_t ticks; ++} bcm63xx_wdt_device; ++ ++static int expect_close; ++ ++static int wdt_time = WDT_DEFAULT_TIME; ++static int nowayout = WATCHDOG_NOWAYOUT; ++module_param(nowayout, int, 0); ++MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" ++ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); ++ ++/* HW functions */ ++static void bcm63xx_wdt_hw_start(void) ++{ ++ bcm_writel(0xfffffffe, bcm63xx_wdt_device.regs + WDT_DEFVAL_REG); ++ bcm_writel(WDT_START_1, bcm63xx_wdt_device.regs + WDT_CTL_REG); ++ bcm_writel(WDT_START_2, bcm63xx_wdt_device.regs + WDT_CTL_REG); ++} ++ ++static void bcm63xx_wdt_hw_stop(void) ++{ ++ bcm_writel(WDT_STOP_1, bcm63xx_wdt_device.regs + WDT_CTL_REG); ++ bcm_writel(WDT_STOP_2, bcm63xx_wdt_device.regs + WDT_CTL_REG); ++} ++ ++static void bcm63xx_wdt_isr(void *data) ++{ ++ struct pt_regs *regs = get_irq_regs(); ++ ++ die(PFX " fire", regs); ++} ++ ++static void bcm63xx_timer_tick(unsigned long unused) ++{ ++ if (!atomic_dec_and_test(&bcm63xx_wdt_device.ticks)) { ++ bcm63xx_wdt_hw_start(); ++ mod_timer(&bcm63xx_wdt_device.timer, jiffies + HZ); ++ } else ++ printk(KERN_CRIT PFX ": watchdog will restart system\n"); ++} ++ ++static void bcm63xx_wdt_pet(void) ++{ ++ atomic_set(&bcm63xx_wdt_device.ticks, wdt_time); ++} ++ ++static void bcm63xx_wdt_start(void) ++{ ++ bcm63xx_wdt_pet(); ++ bcm63xx_timer_tick(0); ++} ++ ++static void bcm63xx_wdt_pause(void) ++{ ++ del_timer_sync(&bcm63xx_wdt_device.timer); ++ bcm63xx_wdt_hw_stop(); ++} ++ ++static int bcm63xx_wdt_settimeout(int new_time) ++{ ++ if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) ++ return -EINVAL; ++ ++ wdt_time = new_time; ++ ++ return 0; ++} ++ ++static int bcm63xx_wdt_open(struct inode *inode, struct file *file) ++{ ++ if (test_and_set_bit(0, &bcm63xx_wdt_device.inuse)) ++ return -EBUSY; ++ ++ bcm63xx_wdt_start(); ++ return nonseekable_open(inode, file); ++} ++ ++static int bcm63xx_wdt_release(struct inode *inode, struct file *file) ++{ ++ if (expect_close == 42) ++ bcm63xx_wdt_pause(); ++ else { ++ printk(KERN_CRIT PFX ++ ": Unexpected close, not stopping watchdog!\n"); ++ bcm63xx_wdt_start(); ++ } ++ clear_bit(0, &bcm63xx_wdt_device.inuse); ++ expect_close = 0; ++ return 0; ++} ++ ++static ssize_t bcm63xx_wdt_write(struct file *file, const char *data, ++ size_t len, loff_t *ppos) ++{ ++ if (len) { ++ if (!nowayout) { ++ size_t i; ++ ++ /* In case it was set long ago */ ++ expect_close = 0; ++ ++ for (i = 0; i != len; i++) { ++ char c; ++ if (get_user(c, data + i)) ++ return -EFAULT; ++ if (c == 'V') ++ expect_close = 42; ++ } ++ } ++ bcm63xx_wdt_pet(); ++ } ++ return len; ++} ++ ++static struct watchdog_info bcm63xx_wdt_info = { ++ .identity = PFX, ++ .options = WDIOF_SETTIMEOUT | ++ WDIOF_KEEPALIVEPING | ++ WDIOF_MAGICCLOSE, ++}; ++ ++ ++static long bcm63xx_wdt_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ void __user *argp = (void __user *)arg; ++ int __user *p = argp; ++ int new_value, retval = -EINVAL; ++ ++ switch (cmd) { ++ case WDIOC_GETSUPPORT: ++ return copy_to_user(argp, &bcm63xx_wdt_info, ++ sizeof(bcm63xx_wdt_info)) ? -EFAULT : 0; ++ ++ case WDIOC_GETSTATUS: ++ case WDIOC_GETBOOTSTATUS: ++ return put_user(0, p); ++ ++ case WDIOC_SETOPTIONS: ++ if (get_user(new_value, p)) ++ return -EFAULT; ++ ++ if (new_value & WDIOS_DISABLECARD) { ++ bcm63xx_wdt_pause(); ++ retval = 0; ++ } ++ if (new_value & WDIOS_ENABLECARD) { ++ bcm63xx_wdt_start(); ++ retval = 0; ++ } ++ ++ return retval; ++ ++ case WDIOC_KEEPALIVE: ++ bcm63xx_wdt_pet(); ++ return 0; ++ ++ case WDIOC_SETTIMEOUT: ++ if (get_user(new_value, p)) ++ return -EFAULT; ++ ++ if (bcm63xx_wdt_settimeout(new_value)) ++ return -EINVAL; ++ ++ bcm63xx_wdt_pet(); ++ ++ case WDIOC_GETTIMEOUT: ++ return put_user(wdt_time, p); ++ ++ default: ++ return -ENOTTY; ++ ++ } ++} ++ ++static int bcm63xx_wdt_notify_sys(struct notifier_block *this, ++ unsigned long code, void *unused) ++{ ++ if (code == SYS_DOWN || code == SYS_HALT) ++ bcm63xx_wdt_pause(); ++ return NOTIFY_DONE; ++} ++ ++static const struct file_operations bcm63xx_wdt_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .write = bcm63xx_wdt_write, ++ .unlocked_ioctl = bcm63xx_wdt_ioctl, ++ .open = bcm63xx_wdt_open, ++ .release = bcm63xx_wdt_release, ++}; ++ ++static struct miscdevice bcm63xx_wdt_miscdev = { ++ .minor = WATCHDOG_MINOR, ++ .name = "watchdog", ++ .fops = &bcm63xx_wdt_fops, ++}; ++ ++static struct notifier_block bcm63xx_wdt_notifier = { ++ .notifier_call = bcm63xx_wdt_notify_sys, ++}; ++ ++ ++static int bcm63xx_wdt_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct resource *r; ++ ++ setup_timer(&bcm63xx_wdt_device.timer, bcm63xx_timer_tick, 0L); ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!r) { ++ printk(KERN_ERR PFX ++ "failed to retrieve resources\n"); ++ return -ENODEV; ++ } ++ ++ bcm63xx_wdt_device.regs = ioremap_nocache(r->start, r->end - r->start); ++ if (!bcm63xx_wdt_device.regs) { ++ printk(KERN_ERR PFX ++ "failed to remap I/O resources\n"); ++ return -ENXIO; ++ } ++ ++ ret = bcm63xx_timer_register(TIMER_WDT_ID, bcm63xx_wdt_isr, NULL); ++ if (ret < 0) { ++ printk(KERN_ERR PFX ++ "failed to register wdt timer isr\n"); ++ goto unmap; ++ } ++ ++ if (bcm63xx_wdt_settimeout(wdt_time)) { ++ bcm63xx_wdt_settimeout(WDT_DEFAULT_TIME); ++ printk(KERN_INFO PFX ++ ": wdt_time value must be 1 <= wdt_time <= 256, using %d\n", ++ wdt_time); ++ } ++ ++ ret = register_reboot_notifier(&bcm63xx_wdt_notifier); ++ if (ret) { ++ printk(KERN_ERR PFX ++ "failed to register reboot_notifier\n"); ++ goto unregister_timer; ++ } ++ ++ ret = misc_register(&bcm63xx_wdt_miscdev); ++ if (ret < 0) { ++ printk(KERN_ERR PFX ++ "failed to register watchdog device\n"); ++ goto unregister_reboot_notifier; ++ } ++ ++ printk(KERN_INFO PFX " started, timer margin: %d sec\n", WDT_DEFAULT_TIME); ++ ++ return 0; ++ ++unregister_reboot_notifier: ++ unregister_reboot_notifier(&bcm63xx_wdt_notifier); ++unregister_timer: ++ bcm63xx_timer_unregister(TIMER_WDT_ID); ++unmap: ++ iounmap(bcm63xx_wdt_device.regs); ++ return ret; ++} ++ ++static int bcm63xx_wdt_remove(struct platform_device *pdev) ++{ ++ if (!nowayout) ++ bcm63xx_wdt_pause(); ++ ++ misc_deregister(&bcm63xx_wdt_miscdev); ++ ++ iounmap(bcm63xx_wdt_device.regs); ++ ++ unregister_reboot_notifier(&bcm63xx_wdt_notifier); ++ bcm63xx_timer_unregister(TIMER_WDT_ID); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm63xx_wdt = { ++ .probe = bcm63xx_wdt_probe, ++ .remove = bcm63xx_wdt_remove, ++ .driver = { ++ .name = "bcm63xx-wdt", ++ } ++}; ++ ++static int __init bcm63xx_wdt_init(void) ++{ ++ return platform_driver_register(&bcm63xx_wdt); ++} ++ ++static void __exit bcm63xx_wdt_exit(void) ++{ ++ platform_driver_unregister(&bcm63xx_wdt); ++} ++ ++module_init(bcm63xx_wdt_init); ++module_exit(bcm63xx_wdt_exit); ++ ++MODULE_AUTHOR("Miguel Gaio "); ++MODULE_AUTHOR("Florian Fainelli "); ++MODULE_DESCRIPTION("Driver for the Broadcom BCM63xx SoC watchdog"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); ++MODULE_ALIAS("platform:bcm63xx-wdt"); diff --git a/target/linux/brcm63xx/patches-2.6.35/040-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-2.6.35/040-bcm963xx_flashmap.patch new file mode 100644 index 000000000000..ad7d73ad1cf8 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/040-bcm963xx_flashmap.patch @@ -0,0 +1,380 @@ +From e734ace5baa04e0e8af1d4483475fbd6bd2b32a1 Mon Sep 17 00:00:00 2001 +From: Axel Gembe +Date: Mon, 12 May 2008 18:54:09 +0200 +Subject: [PATCH] bcm963xx: flashmap support + + +Signed-off-by: Axel Gembe +--- + drivers/mtd/maps/Kconfig | 7 +++++++ + drivers/mtd/maps/Makefile | 1 + + drivers/mtd/redboot.c | 13 ++++++++++--- + 3 files changed, 18 insertions(+), 3 deletions(-) + +--- a/drivers/mtd/maps/Kconfig ++++ b/drivers/mtd/maps/Kconfig +@@ -251,6 +251,13 @@ config MTD_NETtel + help + Support for flash chips on NETtel/SecureEdge/SnapGear boards. + ++config MTD_BCM963XX ++ tristate "BCM963xx Flash device" ++ depends on MIPS && BCM63XX ++ help ++ Flash memory access on BCM963xx boards. Currently only works with ++ RedBoot and CFE. ++ + config MTD_DILNETPC + tristate "CFI Flash device mapped on DIL/Net PC" + depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN +--- a/drivers/mtd/redboot.c ++++ b/drivers/mtd/redboot.c +@@ -39,7 +39,7 @@ static inline int redboot_checksum(struc + return 1; + } + +-static int parse_redboot_partitions(struct mtd_info *master, ++int parse_redboot_partitions(struct mtd_info *master, + struct mtd_partition **pparts, + unsigned long fis_origin) + { +@@ -162,6 +162,14 @@ static int parse_redboot_partitions(stru + goto out; + } + ++ if (!fis_origin) { ++ for (i = 0; i < numslots; i++) { ++ if (!strncmp(buf[i].name, "RedBoot", 8)) { ++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1); ++ } ++ } ++ } ++ + for (i = 0; i < numslots; i++) { + struct fis_list *new_fl, **prev; + +@@ -184,9 +192,8 @@ static int parse_redboot_partitions(stru + new_fl->img = &buf[i]; + if (fis_origin) { + buf[i].flash_base -= fis_origin; +- } else { +- buf[i].flash_base &= master->size-1; + } ++ buf[i].flash_base &= (master->size << 1) - 1; + + /* I'm sure the JFFS2 code has done me permanent damage. + * I now think the following is _normal_ +--- a/drivers/mtd/maps/Makefile ++++ b/drivers/mtd/maps/Makefile +@@ -59,3 +59,4 @@ obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-asy + obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o + obj-$(CONFIG_MTD_VMU) += vmu-flash.o + obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o ++obj-$(CONFIG_MTD_BCM963XX) += bcm963xx-flash.o +--- /dev/null ++++ b/drivers/mtd/maps/bcm963xx-flash.c +@@ -0,0 +1,267 @@ ++/* ++ * Copyright (C) 2006-2008 Florian Fainelli ++ * Mike Albon ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define BUSWIDTH 2 /* Buswidth */ ++#define EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ ++ ++#define PFX KBUILD_MODNAME ": " ++ ++extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long fis_origin); ++static struct mtd_partition *parsed_parts; ++ ++static struct mtd_info *bcm963xx_mtd_info; ++ ++static struct map_info bcm963xx_map = { ++ .name = "bcm963xx", ++ .bankwidth = BUSWIDTH, ++}; ++ ++ ++static int parse_cfe_partitions( struct mtd_info *master, struct mtd_partition **pparts) ++{ ++ int nrparts = 3, curpart = 0; /* CFE,NVRAM and global LINUX are always present. */ ++ struct bcm_tag *buf; ++ struct mtd_partition *parts; ++ int ret; ++ size_t retlen; ++ unsigned int rootfsaddr, kerneladdr, spareaddr; ++ unsigned int rootfslen, kernellen, sparelen, totallen; ++ int namelen = 0; ++ int i; ++ char *boardid; ++ char *tagversion; ++ ++ /* Allocate memory for buffer */ ++ buf = vmalloc(sizeof(struct bcm_tag)); ++ if (!buf) ++ return -ENOMEM; ++ ++ /* Get the tag */ ++ ret = master->read(master, master->erasesize, sizeof(struct bcm_tag), &retlen, (void *)buf); ++ if (retlen != sizeof(struct bcm_tag)){ ++ vfree(buf); ++ return -EIO; ++ } ++ ++ sscanf(buf->kernelAddress, "%u", &kerneladdr); ++ sscanf(buf->kernelLength, "%u", &kernellen); ++ sscanf(buf->totalLength, "%u", &totallen); ++ tagversion = &(buf->tagVersion[0]); ++ boardid = &(buf->boardid[0]); ++ ++ printk(KERN_INFO PFX "CFE boot tag found with version %s and board type %s\n",tagversion, boardid); ++ ++ kerneladdr = kerneladdr - EXTENDED_SIZE; ++ rootfsaddr = kerneladdr + kernellen; ++ spareaddr = roundup(totallen, master->erasesize) + master->erasesize; ++ sparelen = master->size - spareaddr - master->erasesize; ++ rootfslen = spareaddr - rootfsaddr; ++ ++ /* Determine number of partitions */ ++ namelen = 8; ++ if (rootfslen > 0){ ++ nrparts++; ++ namelen =+ 6; ++ }; ++ if (kernellen > 0) { ++ nrparts++; ++ namelen =+ 6; ++ }; ++ ++ /* Ask kernel for more memory */ ++ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); ++ if (!parts) { ++ vfree(buf); ++ return -ENOMEM; ++ }; ++ ++ /* Start building partition list */ ++ parts[curpart].name = "CFE"; ++ parts[curpart].offset = 0; ++ parts[curpart].size = master->erasesize; ++ curpart++; ++ ++ if (kernellen > 0) { ++ parts[curpart].name = "kernel"; ++ parts[curpart].offset = kerneladdr; ++ parts[curpart].size = kernellen; ++ curpart++; ++ }; ++ ++ if (rootfslen > 0) { ++ parts[curpart].name = "rootfs"; ++ parts[curpart].offset = rootfsaddr; ++ parts[curpart].size = rootfslen; ++ if (sparelen > 0) ++ parts[curpart].size += sparelen; ++ curpart++; ++ }; ++ ++ parts[curpart].name = "nvram"; ++ parts[curpart].offset = master->size - master->erasesize; ++ parts[curpart].size = master->erasesize; ++ ++ /* Global partition "linux" to make easy firmware upgrade */ ++ curpart++; ++ parts[curpart].name = "linux"; ++ parts[curpart].offset = parts[0].size; ++ parts[curpart].size = master->size - parts[0].size - parts[3].size; ++ ++ for (i = 0; i < nrparts; i++) ++ printk(KERN_INFO PFX "Partition %d is %s offset %lx and length %lx\n", i, parts[i].name, (long unsigned int)(parts[i].offset), (long unsigned int)(parts[i].size)); ++ ++ printk(KERN_INFO PFX "Spare partition is %x offset and length %x\n", spareaddr, sparelen); ++ *pparts = parts; ++ vfree(buf); ++ ++ return nrparts; ++}; ++ ++static int bcm963xx_detect_cfe(struct mtd_info *master) ++{ ++ int idoffset = 0x4e0; ++ static char idstring[8] = "CFE1CFE1"; ++ char buf[9]; ++ int ret; ++ size_t retlen; ++ ++ ret = master->read(master, idoffset, 8, &retlen, (void *)buf); ++ buf[retlen] = 0; ++ printk(KERN_INFO PFX "Read Signature value of %s\n", buf); ++ ++ return strncmp(idstring, buf, 8); ++} ++ ++static int bcm963xx_probe(struct platform_device *pdev) ++{ ++ int err = 0; ++ int parsed_nr_parts = 0; ++ char *part_type; ++ struct resource *r; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ bcm963xx_map.phys = r->start; ++ bcm963xx_map.size = (r->end - r->start) + 1; ++ bcm963xx_map.virt = ioremap(r->start, r->end - r->start + 1); ++ ++ if (!bcm963xx_map.virt) { ++ printk(KERN_ERR PFX "Failed to ioremap\n"); ++ return -EIO; ++ } ++ printk(KERN_INFO PFX "0x%08lx at 0x%08x\n", bcm963xx_map.size, bcm963xx_map.phys); ++ ++ simple_map_init(&bcm963xx_map); ++ ++ bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map); ++ if (!bcm963xx_mtd_info) { ++ printk(KERN_ERR PFX "Failed to probe using CFI\n"); ++ err = -EIO; ++ goto err_probe; ++ } ++ ++ bcm963xx_mtd_info->owner = THIS_MODULE; ++ ++ /* This is mutually exclusive */ ++ if (bcm963xx_detect_cfe(bcm963xx_mtd_info) == 0) { ++ printk(KERN_INFO PFX "CFE bootloader detected\n"); ++ if (parsed_nr_parts == 0) { ++ int ret = parse_cfe_partitions(bcm963xx_mtd_info, &parsed_parts); ++ if (ret > 0) { ++ part_type = "CFE"; ++ parsed_nr_parts = ret; ++ } ++ } ++ } else { ++ printk(KERN_INFO PFX "assuming RedBoot bootloader\n"); ++ if (bcm963xx_mtd_info->size > 0x00400000) { ++ printk(KERN_INFO PFX "Support for extended flash memory size : 0x%lx ; ONLY 64MBIT SUPPORT\n", bcm963xx_mtd_info->size); ++ bcm963xx_map.virt = (u32)(EXTENDED_SIZE); ++ } ++ ++#ifdef CONFIG_MTD_REDBOOT_PARTS ++ if (parsed_nr_parts == 0) { ++ int ret = parse_redboot_partitions(bcm963xx_mtd_info, &parsed_parts, 0); ++ if (ret > 0) { ++ part_type = "RedBoot"; ++ parsed_nr_parts = ret; ++ } ++ } ++#endif ++ } ++ ++ return add_mtd_partitions(bcm963xx_mtd_info, parsed_parts, parsed_nr_parts); ++ ++err_probe: ++ iounmap(bcm963xx_map.virt); ++ return err; ++} ++ ++static int bcm963xx_remove(struct platform_device *pdev) ++{ ++ if (bcm963xx_mtd_info) { ++ del_mtd_partitions(bcm963xx_mtd_info); ++ map_destroy(bcm963xx_mtd_info); ++ } ++ ++ if (bcm963xx_map.virt) { ++ iounmap(bcm963xx_map.virt); ++ bcm963xx_map.virt = 0; ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver bcm63xx_mtd_dev = { ++ .probe = bcm963xx_probe, ++ .remove = bcm963xx_remove, ++ .driver = { ++ .name = "bcm963xx-flash", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init bcm963xx_mtd_init(void) ++{ ++ return platform_driver_register(&bcm63xx_mtd_dev); ++} ++ ++static void __exit bcm963xx_mtd_exit(void) ++{ ++ platform_driver_unregister(&bcm63xx_mtd_dev); ++} ++ ++module_init(bcm963xx_mtd_init); ++module_exit(bcm963xx_mtd_exit); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Broadcom BCM63xx MTD partition parser/mapping for CFE and RedBoot"); ++MODULE_AUTHOR("Florian Fainelli "); ++MODULE_AUTHOR("Mike Albon "); +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -816,20 +816,6 @@ void __init board_setup(void) + panic("unexpected CPU for bcm963xx board"); + } + +-static struct mtd_partition mtd_partitions[] = { +- { +- .name = "cfe", +- .offset = 0x0, +- .size = 0x40000, +- } +-}; +- +-static struct physmap_flash_data flash_data = { +- .width = 2, +- .nr_parts = ARRAY_SIZE(mtd_partitions), +- .parts = mtd_partitions, +-}; +- + static struct resource mtd_resources[] = { + { + .start = 0, /* filled at runtime */ +@@ -839,12 +825,9 @@ static struct resource mtd_resources[] = + }; + + static struct platform_device mtd_dev = { +- .name = "physmap-flash", ++ .name = "bcm963xx-flash", + .resource = mtd_resources, + .num_resources = ARRAY_SIZE(mtd_resources), +- .dev = { +- .platform_data = &flash_data, +- }, + }; + + static struct gpio_led_platform_data bcm63xx_led_data; diff --git a/target/linux/brcm63xx/patches-2.6.35/070_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-2.6.35/070_bcm63xx_enet_vlan_incoming_fixed.patch new file mode 100644 index 000000000000..e9fe0d9144b0 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/070_bcm63xx_enet_vlan_incoming_fixed.patch @@ -0,0 +1,11 @@ +--- a/drivers/net/bcm63xx_enet.c ++++ b/drivers/net/bcm63xx_enet.c +@@ -1520,7 +1520,7 @@ static int compute_hw_mtu(struct bcm_ene + actual_mtu = mtu; + + /* add ethernet header + vlan tag size */ +- actual_mtu += VLAN_ETH_HLEN; ++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN; + + if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU) + return -EINVAL; diff --git a/target/linux/brcm63xx/patches-2.6.35/100-reset_buttons.patch b/target/linux/brcm63xx/patches-2.6.35/100-reset_buttons.patch new file mode 100644 index 000000000000..786c18b77712 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/100-reset_buttons.patch @@ -0,0 +1,98 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -15,6 +15,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -296,6 +298,16 @@ static struct board_info __initdata boar + .active_low = 1, + }, + }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 33, ++ .active_low = 1, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ }, + }; + + static struct board_info __initdata board_96348gw = { +@@ -354,6 +366,16 @@ static struct board_info __initdata boar + .active_low = 1, + }, + }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 36, ++ .active_low = 1, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ }, + }; + + static struct board_info __initdata board_FAST2404 = { +@@ -838,12 +860,23 @@ static struct platform_device bcm63xx_gp + .dev.platform_data = &bcm63xx_led_data, + }; + ++static struct gpio_buttons_platform_data bcm63xx_gpio_buttons_data = { ++ .poll_interval = 20, ++}; ++ ++static struct platform_device bcm63xx_gpio_buttons_device = { ++ .name = "gpio-buttons", ++ .id = 0, ++ .dev.platform_data = &bcm63xx_gpio_buttons_data, ++}; ++ + /* + * third stage init callback, register all board devices. + */ + int __init board_register_devices(void) + { + u32 val; ++ int button_count = 0; + + if (board.has_uart0) + bcm63xx_uart_register(0); +@@ -888,5 +921,16 @@ int __init board_register_devices(void) + + platform_device_register(&bcm63xx_gpio_leds); + ++ /* count number of BUTTONs defined by this device */ ++ while (button_count < ARRAY_SIZE(board.buttons) && board.buttons[button_count].desc) ++ button_count++; ++ ++ if (button_count) { ++ bcm63xx_gpio_buttons_data.nbuttons = button_count; ++ bcm63xx_gpio_buttons_data.buttons = board.buttons; ++ ++ platform_device_register(&bcm63xx_gpio_buttons_device); ++ } ++ + return 0; + } +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -57,6 +57,9 @@ struct board_info { + + /* GPIO LEDs */ + struct gpio_led leds[5]; ++ ++ /* Buttons */ ++ struct gpio_button buttons[2]; + }; + + #endif /* ! BOARD_BCM963XX_H_ */ diff --git a/target/linux/brcm63xx/patches-2.6.35/110-gpiodev.patch b/target/linux/brcm63xx/patches-2.6.35/110-gpiodev.patch new file mode 100644 index 000000000000..99ee29f91041 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/110-gpiodev.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -852,6 +852,10 @@ static struct platform_device mtd_dev = + .num_resources = ARRAY_SIZE(mtd_resources), + }; + ++static struct resource gpiodev_resource = { ++ .start = 0xFFFFFFFF, ++}; ++ + static struct gpio_led_platform_data bcm63xx_led_data; + + static struct platform_device bcm63xx_gpio_leds = { +@@ -916,6 +920,8 @@ int __init board_register_devices(void) + + platform_device_register(&mtd_dev); + ++ platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); ++ + bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); + bcm63xx_led_data.leds = board.leds; + diff --git a/target/linux/brcm63xx/patches-2.6.35/140-new_bcm96348gw_leds.patch b/target/linux/brcm63xx/patches-2.6.35/140-new_bcm96348gw_leds.patch new file mode 100644 index 000000000000..5d3fcfd0f516 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/140-new_bcm96348gw_leds.patch @@ -0,0 +1,82 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -345,24 +345,39 @@ static struct board_info __initdata boar + .active_low = 1, + }, + { +- .name = "ppp", +- .gpio = 3, ++ .name = "power", ++ .gpio = 0, + .active_low = 1, ++ .default_trigger = "default-on", + }, + { +- .name = "ppp-fail", ++ .name = "stop", ++ .gpio = 1, ++ .active_low = 1, ++ }, ++ { ++ .name = "line1", + .gpio = 4, + .active_low = 1, + }, + { +- .name = "power", +- .gpio = 0, ++ .name = "line2", ++ .gpio = 5, + .active_low = 1, +- .default_trigger = "default-on", + }, + { +- .name = "stop", +- .gpio = 1, ++ .name = "line3", ++ .gpio = 6, ++ .active_low = 1, ++ }, ++ { ++ .name = "tel", ++ .gpio = 7, ++ .active_low = 1, ++ }, ++ { ++ .name = "eth", ++ .gpio = 35, + .active_low = 1, + }, + }, +@@ -880,6 +895,7 @@ static struct platform_device bcm63xx_gp + int __init board_register_devices(void) + { + u32 val; ++ int led_count = 0; + int button_count = 0; + + if (board.has_uart0) +@@ -922,7 +938,11 @@ int __init board_register_devices(void) + + platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); + +- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); ++ /* count number of LEDs defined by this device */ ++ while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name) ++ led_count++; ++ ++ bcm63xx_led_data.num_leds = led_count; + bcm63xx_led_data.leds = board.leds; + + platform_device_register(&bcm63xx_gpio_leds); +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -56,7 +56,7 @@ struct board_info { + struct bcm63xx_dsp_platform_data dsp; + + /* GPIO LEDs */ +- struct gpio_led leds[5]; ++ struct gpio_led leds[8]; + + /* Buttons */ + struct gpio_button buttons[2]; diff --git a/target/linux/brcm63xx/patches-2.6.35/150-alice_gate2_leds.patch b/target/linux/brcm63xx/patches-2.6.35/150-alice_gate2_leds.patch new file mode 100644 index 000000000000..a13a9434cf41 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/150-alice_gate2_leds.patch @@ -0,0 +1,107 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -603,6 +603,93 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + .has_ehci0 = 1, ++ ++ .leds = { ++ /*Each led on alice gate is bi-color */ ++ { ++ .name = "power:red", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++ { ++ .name = "power:green", ++ .gpio = 4, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ }, ++ { ++ .name = "service:red", ++ .gpio = 7, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 6, ++ .active_low = 1, ++ }, ++ { ++ .name = "adsl:red", ++ .gpio = 9, ++ .active_low = 1, ++ }, ++ { ++ .name = "adsl:green", ++ .gpio = 10, ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi:red", ++ .gpio = 23, ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi:green", ++ .gpio = 22, ++ .active_low = 1, ++ }, ++ { ++ .name = "internet:red", ++ .gpio = 25, ++ .active_low = 1, ++ }, ++ { ++ .name = "internet:green", ++ .gpio = 24, ++ .active_low = 1, ++ }, ++ { ++ .name = "usr1:red", ++ .gpio = 27, ++ .active_low = 1, ++ }, ++ { ++ .name = "usr1:green", ++ .gpio = 26, ++ .active_low = 1, ++ }, ++ { ++ .name = "usr2:red", ++ .gpio = 30, ++ .active_low = 1, ++ }, ++ { ++ .name = "usr2:green", ++ .gpio = 29, ++ .active_low = 1, ++ }, ++ }, ++ ++ .buttons = { ++ { ++ .desc = "sw2", ++ .gpio = 37, ++ .active_low = 1, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ }, ++ /* sw1 is connected to gpio34*/ + }; + + static struct board_info __initdata board_DWVS0 = { +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -56,7 +56,7 @@ struct board_info { + struct bcm63xx_dsp_platform_data dsp; + + /* GPIO LEDs */ +- struct gpio_led leds[8]; ++ struct gpio_led leds[14]; + + /* Buttons */ + struct gpio_button buttons[2]; diff --git a/target/linux/brcm63xx/patches-2.6.35/170-board_livebox.patch b/target/linux/brcm63xx/patches-2.6.35/170-board_livebox.patch new file mode 100644 index 000000000000..02354d573c04 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/170-board_livebox.patch @@ -0,0 +1,246 @@ +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -8,4 +8,10 @@ config BOARD_BCM963XX + select SSB + help + ++config BOARD_LIVEBOX ++ bool "Inventel Livebox(es) boards" ++ select SSB ++ help ++ Inventel Livebox boards using the RedBoot bootloader. ++ + endchoice +--- a/arch/mips/bcm63xx/boards/Makefile ++++ b/arch/mips/bcm63xx/boards/Makefile +@@ -1,3 +1,4 @@ + obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o ++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o + + EXTRA_CFLAGS += -Werror +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_livebox.c +@@ -0,0 +1,223 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PFX "board_livebox: " ++ ++static unsigned int mac_addr_used = 0; ++static struct board_info board; ++ ++/* ++ * known 6348 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6348 ++static struct board_info __initdata board_livebox = { ++ .name = "Livebox", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++}; ++#endif ++ ++/* ++ * all boards ++ */ ++static const struct board_info __initdata *bcm963xx_boards[] = { ++#ifdef CONFIG_BCM63XX_CPU_6348 ++ &board_livebox ++#endif ++}; ++ ++/* ++ * early init callback ++ */ ++void __init board_prom_init(void) ++{ ++ u32 val; ++ ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ ++ /* assume board is a Livebox */ ++ memcpy(&board, bcm963xx_boards[0], sizeof(board)); ++ ++ /* setup pin multiplexing depending on board enabled device, ++ * this has to be done this early since PCI init is done ++ * inside arch_initcall */ ++ val = 0; ++ ++ if (board.has_pci) { ++ bcm63xx_pci_enabled = 1; ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G2_PCI; ++ } ++ ++ if (board.has_pccard) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G1_MII_PCCARD; ++ } ++ ++ if (board.has_enet0 && !board.enet0.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ if (board.has_enet1 && !board.enet1.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ bcm_gpio_writel(val, GPIO_MODE_REG); ++} ++ ++/* ++ * second stage init callback, good time to panic if we couldn't ++ * identify on which board we're running since early printk is working ++ */ ++void __init board_setup(void) ++{ ++ if (!board.name[0]) ++ panic("unable to detect bcm963xx board"); ++ printk(KERN_INFO PFX "board name: %s\n", board.name); ++ ++ /* make sure we're running on expected cpu */ ++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id) ++ panic("unexpected CPU for bcm963xx board"); ++} ++ ++/* ++ * return board name for /proc/cpuinfo ++ */ ++const char *board_get_name(void) ++{ ++ return board.name; ++} ++ ++/* ++ * register & return a new board mac address ++ */ ++ ++static int board_get_mac_address(u8 *mac) ++{ ++ u8 default_mac[ETH_ALEN] = {0x00, 0x07, 0x3A, 0x00, 0x00, 0x00}; ++ u8 *p; ++ int count; ++ ++ memcpy(mac, default_mac, ETH_ALEN); ++ ++ p = mac + ETH_ALEN - 1; ++ count = mac_addr_used; ++ ++ while (count--) { ++ do { ++ (*p)++; ++ if (*p != 0) ++ break; ++ p--; ++ } while (p != mac); ++ } ++ ++ if (p == mac) { ++ printk(KERN_ERR PFX "unable to fetch mac address\n"); ++ return -ENODEV; ++ } ++ mac_addr_used++; ++ ++ return 0; ++} ++ ++static struct resource mtd_resources[] = { ++ { ++ .start = 0, /* filled at runtime */ ++ .end = 0, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ } ++}; ++ ++static struct platform_device mtd_dev = { ++ .name = "bcm963xx-flash", ++ .resource = mtd_resources, ++ .num_resources = ARRAY_SIZE(mtd_resources), ++}; ++ ++ ++/* ++ * third stage init callback, register all board devices. ++ */ ++int __init board_register_devices(void) ++{ ++ u32 val; ++ ++ if (board.has_pccard) ++ bcm63xx_pcmcia_register(); ++ ++ if (board.has_enet0 && ++ !board_get_mac_address(board.enet0.mac_addr)) ++ bcm63xx_enet_register(0, &board.enet0); ++ ++ if (board.has_enet1 && ++ !board_get_mac_address(board.enet1.mac_addr)) ++ bcm63xx_enet_register(1, &board.enet1); ++ ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ ++ ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ mtd_resources[0].start = val; ++ mtd_resources[0].end = 0x1FFFFFFF; ++ ++ platform_device_register(&mtd_dev); ++ ++ return 0; ++} ++ diff --git a/target/linux/brcm63xx/patches-2.6.35/180-udc_preliminary_support.patch b/target/linux/brcm63xx/patches-2.6.35/180-udc_preliminary_support.patch new file mode 100644 index 000000000000..57016d510cc3 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/180-udc_preliminary_support.patch @@ -0,0 +1,243 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -29,6 +29,7 @@ + #include + #include + #include ++#include + #include + + #define PFX "board_bcm963xx: " +@@ -415,6 +416,8 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, ++ ++ .has_udc0 = 1, + }; + + static struct board_info __initdata board_rta1025w_16 = { +@@ -913,6 +916,9 @@ void __init board_prom_init(void) + + bcm_gpio_writel(val, GPIO_MODE_REG); + ++ if (board.has_udc0) ++ bcm63xx_udc_register(); ++ + /* Generate MAC address for WLAN and + * register our SPROM */ + #ifdef CONFIG_SSB_PCIHOST +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-udc.c +@@ -0,0 +1,58 @@ ++/* ++ * Copyright (C) 2009 Henk Vergonet ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. ++ */ ++#include ++#include ++#include ++#include ++ ++static struct resource udc_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 udc_dmamask = ~(u32)0; ++ ++static struct platform_device bcm63xx_udc_device = { ++ .name = "bcm63xx-udc", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(udc_resources), ++ .resource = udc_resources, ++ .dev = { ++ .dma_mask = &udc_dmamask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++}; ++ ++int __init bcm63xx_udc_register(void) ++{ ++ if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348()) ++ return 0; ++ ++ udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0); ++ udc_resources[0].end = udc_resources[0].start; ++ udc_resources[0].end += RSET_UDC_SIZE - 1; ++ udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0); ++ return platform_device_register(&bcm63xx_udc_device); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -127,7 +127,7 @@ enum bcm63xx_regs_set { + #define BCM_6338_UART1_BASE (0xdeadbeef) + #define BCM_6338_GPIO_BASE (0xfffe0400) + #define BCM_6338_SPI_BASE (0xfffe0c00) +-#define BCM_6338_UDC0_BASE (0xdeadbeef) ++#define BCM_6338_UDC0_BASE (0xfffe3000) + #define BCM_6338_USBDMA_BASE (0xfffe2400) + #define BCM_6338_OHCI0_BASE (0xdeadbeef) + #define BCM_6338_OHCI_PRIV_BASE (0xfffe3000) +@@ -158,7 +158,7 @@ enum bcm63xx_regs_set { + #define BCM_6345_UART1_BASE (0xdeadbeef) + #define BCM_6345_GPIO_BASE (0xfffe0400) + #define BCM_6345_SPI_BASE (0xdeadbeef) +-#define BCM_6345_UDC0_BASE (0xdeadbeef) ++#define BCM_6345_UDC0_BASE (0xfffe2100) + #define BCM_6345_USBDMA_BASE (0xfffe2800) + #define BCM_6345_ENET0_BASE (0xfffe1800) + #define BCM_6345_ENETDMA_BASE (0xfffe2800) +@@ -215,7 +215,7 @@ enum bcm63xx_regs_set { + #define BCM_6358_UART1_BASE (0xfffe0120) + #define BCM_6358_GPIO_BASE (0xfffe0080) + #define BCM_6358_SPI_BASE (0xdeadbeef) +-#define BCM_6358_UDC0_BASE (0xfffe0800) ++#define BCM_6358_UDC0_BASE (0xfffe0400) + #define BCM_6358_OHCI0_BASE (0xfffe1400) + #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) + #define BCM_6358_USBH_PRIV_BASE (0xfffe1500) +@@ -444,6 +444,7 @@ enum bcm63xx_irq { + IRQ_UART0, + IRQ_UART1, + IRQ_DSL, ++ IRQ_UDC0, + IRQ_ENET0, + IRQ_ENET1, + IRQ_ENET_PHY, +@@ -486,7 +487,7 @@ enum bcm63xx_irq { + #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2) + #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3) + #define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4) +-#define BCM_6345_USB_IRQ (IRQ_INTERNAL_BASE + 5) ++#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5) + #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) + #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1) +@@ -508,10 +509,17 @@ enum bcm63xx_irq { + #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) + #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) + #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) ++#define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6) + #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) + #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) + #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6348_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 14) ++#define BCM_6348_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 15) ++#define BCM_6348_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 16) ++#define BCM_6348_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 17) ++#define BCM_6348_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 18) ++#define BCM_6348_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 19) + #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20) + #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21) + #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22) +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_udc.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_UDC_H_ ++#define BCM63XX_DEV_USB_UDC_H_ ++ ++int bcm63xx_udc_register(void); ++ ++#endif /* BCM63XX_DEV_USB_UDC_H_ */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -47,6 +47,7 @@ struct board_info { + unsigned int has_dsp:1; + unsigned int has_uart0:1; + unsigned int has_uart1:1; ++ unsigned int has_udc0:1; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ + dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \ +- dev-usb-ohci.o dev-usb-ehci.o ++ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -141,6 +141,30 @@ static struct clk clk_usbh = { + }; + + /* ++ * USB slave clock ++ */ ++static void usbs_set(struct clk *clk, int enable) ++{ ++ u32 mask; ++ ++ switch(bcm63xx_get_cpu_id()) { ++ case BCM6338_CPU_ID: ++ mask = CKCTL_6338_USBS_EN; ++ break; ++ case BCM6348_CPU_ID: ++ mask = CKCTL_6348_USBS_EN; ++ break; ++ default: ++ return; ++ } ++ bcm_hwclock_set(mask, enable); ++} ++ ++static struct clk clk_usbs = { ++ .set = usbs_set, ++}; ++ ++/* + * SPI clock + */ + static void spi_set(struct clk *clk, int enable) +@@ -208,6 +232,8 @@ struct clk *clk_get(struct device *dev, + return &clk_ephy; + if (!strcmp(id, "usbh")) + return &clk_usbh; ++ if (!strcmp(id, "usbs")) ++ return &clk_usbs; + if (!strcmp(id, "spi")) + return &clk_spi; + if (!strcmp(id, "periph")) +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -7,6 +7,7 @@ config BCM63XX_CPU_6338 + select USB_ARCH_HAS_OHCI + select USB_OHCI_BIG_ENDIAN_DESC + select USB_OHCI_BIG_ENDIAN_MMIO ++ select USB_ARCH_HAS_UDC + + config BCM63XX_CPU_6345 + bool "support 6345 CPU" +@@ -19,6 +20,7 @@ config BCM63XX_CPU_6348 + select USB_ARCH_HAS_OHCI + select USB_OHCI_BIG_ENDIAN_DESC + select USB_OHCI_BIG_ENDIAN_MMIO ++ select USB_ARCH_HAS_UDC + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" diff --git a/target/linux/brcm63xx/patches-2.6.35/200-extended-platform-devices.patch b/target/linux/brcm63xx/patches-2.6.35/200-extended-platform-devices.patch new file mode 100644 index 000000000000..ebff6d1ba930 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/200-extended-platform-devices.patch @@ -0,0 +1,25 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1051,5 +1051,9 @@ int __init board_register_devices(void) + platform_device_register(&bcm63xx_gpio_buttons_device); + } + ++ if (board.num_devs) { ++ platform_add_devices(board.devs, board.num_devs); ++ } ++ + return 0; + } +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -61,6 +61,10 @@ struct board_info { + + /* Buttons */ + struct gpio_button buttons[2]; ++ ++ /* Additional platform devices */ ++ struct platform_device **devs; ++ unsigned int num_devs; + }; + + #endif /* ! BOARD_BCM963XX_H_ */ diff --git a/target/linux/brcm63xx/patches-2.6.35/211-nxp-74hc164-gpio-chip-driver.patch b/target/linux/brcm63xx/patches-2.6.35/211-nxp-74hc164-gpio-chip-driver.patch new file mode 100644 index 000000000000..db88c16963d9 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/211-nxp-74hc164-gpio-chip-driver.patch @@ -0,0 +1,279 @@ +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -343,4 +343,12 @@ config GPIO_JANZ_TTL + This driver provides support for driving the pins in output + mode only. Input mode is not supported. + ++comment "Other GPIO expanders" ++ ++config GPIO_NXP_74HC164 ++ tristate "NXP 74HC164 Output expanders" ++ help ++ Platform driver for NXP 74HC164 8-output Expanders. This ++ provides a GPIO interface supporting outputs. ++ + endif +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_MAX7301) += max7301.o + obj-$(CONFIG_GPIO_MAX732X) += max732x.o + obj-$(CONFIG_GPIO_MC33880) += mc33880.o + obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o ++obj-$(CONFIG_GPIO_NXP_74HC164) += nxp_74hc164.o + obj-$(CONFIG_GPIO_PCA953X) += pca953x.o + obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o + obj-$(CONFIG_GPIO_PL061) += pl061.o +--- /dev/null ++++ b/drivers/gpio/nxp_74hc164.c +@@ -0,0 +1,226 @@ ++/* ++ * NXP 74HC164 - output expander GPIO driver ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * Copyright (C) 2010 Miguel Gaio ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Copy from nxp_74hc153.c code ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NXP_74HC164_NUM_GPIOS 8 ++ ++struct nxp_74hc164_chip { ++ struct device *parent; ++ struct gpio_chip gpio_chip; ++ struct mutex lock; ++ long mask; ++}; ++ ++static void nxp_74hc164_set_value(struct gpio_chip *, unsigned, int); ++ ++static struct nxp_74hc164_chip *gpio_to_nxp(struct gpio_chip *gc) ++{ ++ return container_of(gc, struct nxp_74hc164_chip, gpio_chip); ++} ++ ++static int nxp_74hc164_direction_input(struct gpio_chip *gc, unsigned offset) ++{ ++ WARN_ON(1); ++ return -EINVAL; ++} ++ ++static int nxp_74hc164_direction_output(struct gpio_chip *gc, ++ unsigned offset, int val) ++{ ++ nxp_74hc164_set_value(gc, offset, val); ++ return 0; ++} ++ ++static int nxp_74hc164_get_value(struct gpio_chip *gc, unsigned offset) ++{ ++ struct nxp_74hc164_chip *nxp = gpio_to_nxp(gc); ++ int ret; ++ ++ mutex_lock(&nxp->lock); ++ ret = test_bit(offset, &nxp->mask); ++ mutex_unlock(&nxp->lock); ++ ++ return ret; ++} ++ ++static void nxp_74hc164_set_value(struct gpio_chip *gc, ++ unsigned offset, int val) ++{ ++ struct nxp_74hc164_chip *nxp; ++ struct nxp_74hc164_platform_data *pdata; ++ long mask; ++ int refresh; ++ int i; ++ ++ nxp = gpio_to_nxp(gc); ++ pdata = nxp->parent->platform_data; ++ ++ mutex_lock(&nxp->lock); ++ if (val) ++ refresh = (test_and_set_bit(offset, &nxp->mask) != val); ++ else ++ refresh = (test_and_clear_bit(offset, &nxp->mask) != val); ++ ++ if (refresh) { ++ mask = nxp->mask; ++ for (i = 8; i > 0; --i, mask <<= 1) { ++ gpio_set_value(pdata->gpio_pin_data, mask & 0x80); ++ gpio_set_value(pdata->gpio_pin_clk, 1); ++ gpio_set_value(pdata->gpio_pin_clk, 0); ++ } ++ } ++ mutex_unlock(&nxp->lock); ++} ++ ++static int __devinit nxp_74hc164_probe(struct platform_device *pdev) ++{ ++ struct nxp_74hc164_platform_data *pdata; ++ struct nxp_74hc164_chip *nxp; ++ struct gpio_chip *gc; ++ int err; ++ ++ pdata = pdev->dev.platform_data; ++ if (pdata == NULL) { ++ dev_dbg(&pdev->dev, "no platform data specified\n"); ++ return -EINVAL; ++ } ++ ++ nxp = kzalloc(sizeof(struct nxp_74hc164_chip), GFP_KERNEL); ++ if (nxp == NULL) { ++ dev_err(&pdev->dev, "no memory for private data\n"); ++ return -ENOMEM; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_clk, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_clk, err); ++ goto err_free_nxp; ++ } ++ ++ err = gpio_request(pdata->gpio_pin_data, dev_name(&pdev->dev)); ++ if (err) { ++ dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", ++ pdata->gpio_pin_data, err); ++ goto err_free_clk; ++ } ++ ++ err = gpio_direction_output(pdata->gpio_pin_clk, 0); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_clk, err); ++ goto err_free_data; ++ } ++ ++ err = gpio_direction_output(pdata->gpio_pin_data, 0); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to set direction of gpio %u, err=%d\n", ++ pdata->gpio_pin_data, err); ++ goto err_free_data; ++ } ++ ++ nxp->parent = &pdev->dev; ++ mutex_init(&nxp->lock); ++ ++ gc = &nxp->gpio_chip; ++ ++ gc->direction_input = nxp_74hc164_direction_input; ++ gc->direction_output = nxp_74hc164_direction_output; ++ gc->get = nxp_74hc164_get_value; ++ gc->set = nxp_74hc164_set_value; ++ gc->can_sleep = 1; ++ ++ gc->base = pdata->gpio_base; ++ gc->ngpio = NXP_74HC164_NUM_GPIOS; ++ gc->label = dev_name(nxp->parent); ++ gc->dev = nxp->parent; ++ gc->owner = THIS_MODULE; ++ ++ err = gpiochip_add(&nxp->gpio_chip); ++ if (err) { ++ dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err); ++ goto err_free_data; ++ } ++ ++ platform_set_drvdata(pdev, nxp); ++ return 0; ++ ++ err_free_data: ++ gpio_free(pdata->gpio_pin_data); ++ err_free_clk: ++ gpio_free(pdata->gpio_pin_clk); ++ err_free_nxp: ++ kfree(nxp); ++ return err; ++} ++ ++static int nxp_74hc164_remove(struct platform_device *pdev) ++{ ++ struct nxp_74hc164_chip *nxp = platform_get_drvdata(pdev); ++ struct nxp_74hc164_platform_data *pdata = pdev->dev.platform_data; ++ ++ if (nxp) { ++ int err; ++ ++ err = gpiochip_remove(&nxp->gpio_chip); ++ if (err) { ++ dev_err(&pdev->dev, ++ "unable to remove gpio chip, err=%d\n", ++ err); ++ return err; ++ } ++ ++ gpio_free(pdata->gpio_pin_clk); ++ gpio_free(pdata->gpio_pin_data); ++ ++ kfree(nxp); ++ platform_set_drvdata(pdev, NULL); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver nxp_74hc164_driver = { ++ .probe = nxp_74hc164_probe, ++ .remove = __devexit_p(nxp_74hc164_remove), ++ .driver = { ++ .name = NXP_74HC164_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init nxp_74hc164_init(void) ++{ ++ return platform_driver_register(&nxp_74hc164_driver); ++} ++subsys_initcall(nxp_74hc164_init); ++ ++static void __exit nxp_74hc164_exit(void) ++{ ++ platform_driver_unregister(&nxp_74hc164_driver); ++} ++module_exit(nxp_74hc164_exit); ++ ++MODULE_AUTHOR("Gabor Juhos "); ++MODULE_AUTHOR("Miguel Gaio "); ++MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC164"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" NXP_74HC164_DRIVER_NAME); +--- /dev/null ++++ b/include/linux/nxp_74hc164.h +@@ -0,0 +1,22 @@ ++/* ++ * NXP 74HC164 - Dual 4-input multiplexer defines ++ * ++ * Copyright (C) 2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef _NXP_74HC164_H ++#define _NXP_74HC164_H ++ ++#define NXP_74HC164_DRIVER_NAME "nxp-74hc164" ++ ++struct nxp_74hc164_platform_data { ++ unsigned gpio_base; ++ unsigned gpio_pin_data; ++ unsigned gpio_pin_clk; ++}; ++ ++#endif /* _NXP_74HC164_H */ diff --git a/target/linux/brcm63xx/patches-2.6.35/220-board-D4PW.patch b/target/linux/brcm63xx/patches-2.6.35/220-board-D4PW.patch new file mode 100644 index 000000000000..b1d022cfd0b4 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/220-board-D4PW.patch @@ -0,0 +1,60 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -479,6 +479,49 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_96348_D4PW = { ++ .name = "D-4P-W", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .leds = { ++ { ++ .name = "ppp", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ { ++ .name = "ppp-fail", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++ { ++ .name = "power", ++ .gpio = 0, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ ++ }, ++ }, ++ ++}; ++ + #endif + + /* +@@ -737,6 +780,7 @@ static const struct board_info __initdat + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, ++ &board_96348_D4PW, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 diff --git a/target/linux/brcm63xx/patches-2.6.35/221-board-NB4.patch b/target/linux/brcm63xx/patches-2.6.35/221-board-NB4.patch new file mode 100644 index 000000000000..c2c93d20e648 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/221-board-NB4.patch @@ -0,0 +1,536 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -34,6 +35,12 @@ + + #define PFX "board_bcm963xx: " + ++#define NEUFBOX4_PID_OFFSET 0xff80 ++#define NEUFBOX4_EXP_GPIO_BASE 64 ++#define NEUFBOX4_GPIO_74HC164_DATA 7 ++#define NEUFBOX4_GPIO_74HC164_CLK 6 ++#define NXP_74HC64_GPIO(X) (NEUFBOX4_EXP_GPIO_BASE + (X)) ++ + static struct bcm963xx_nvram nvram; + static unsigned int mac_addr_used; + static struct board_info board; +@@ -758,6 +765,471 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct nxp_74hc164_platform_data neufbox4_74hc164_data = { ++ .gpio_base = NEUFBOX4_EXP_GPIO_BASE, ++ .gpio_pin_data = NEUFBOX4_GPIO_74HC164_DATA, ++ .gpio_pin_clk = NEUFBOX4_GPIO_74HC164_CLK, ++ ++}; ++ ++static struct platform_device neufbox4_74hc164 = { ++ .name = NXP_74HC164_DRIVER_NAME, ++ .id = -1, ++ .dev = { ++ .platform_data = &neufbox4_74hc164_data, ++ } ++}; ++ ++static struct platform_device * __initdata neufbox4_devices[] = { ++ &neufbox4_74hc164, ++}; ++ ++static struct board_info __initdata board_nb4_ser_r0 = { ++ .name = "NB4-SER-r0", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .has_udc0 = 1, ++ ++ .leds = { ++ { ++ .name = "adsl", ++ .gpio = NXP_74HC64_GPIO(4), ++ .active_low = 1, ++ }, ++ { ++ .name = "traffic", ++ .gpio = 2, ++ .active_low = 1, ++ }, ++ { ++ .name = "tel", ++ .gpio = NXP_74HC64_GPIO(3), ++ .active_low = 1, ++ }, ++ { ++ .name = "tv", ++ .gpio = NXP_74HC64_GPIO(2), ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi", ++ .gpio = 15, ++ .active_low = 1, ++ }, ++ { ++ .name = "alarm", ++ .gpio = NXP_74HC64_GPIO(0), ++ .active_low = 1, ++ }, ++ { ++ .name = "service:red", ++ .gpio = 29, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 30, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:blue", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 34, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ { ++ .desc = "wps", ++ .gpio = 37, ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .threshold = 3, ++ }, ++ }, ++ .devs = neufbox4_devices, ++ .num_devs = ARRAY_SIZE(neufbox4_devices), ++}; ++ ++static struct board_info __initdata board_nb4_ser_r1 = { ++ .name = "NB4-SER-r1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .has_udc0 = 1, ++ ++ .leds = { ++ { ++ .name = "adsl", ++ .gpio = NXP_74HC64_GPIO(4), ++ .active_low = 1, ++ }, ++ { ++ .name = "traffic", ++ .gpio = 2, ++ .active_low = 1, ++ }, ++ { ++ .name = "tel", ++ .gpio = NXP_74HC64_GPIO(3), ++ .active_low = 1, ++ }, ++ { ++ .name = "tv", ++ .gpio = NXP_74HC64_GPIO(2), ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi", ++ .gpio = 15, ++ .active_low = 1, ++ }, ++ { ++ .name = "alarm", ++ .gpio = NXP_74HC64_GPIO(0), ++ .active_low = 1, ++ }, ++ { ++ .name = "service:red", ++ .gpio = 29, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 30, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:blue", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 34, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ { ++ .desc = "wps", ++ .gpio = 37, ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .threshold = 3, ++ }, ++ }, ++ .devs = neufbox4_devices, ++ .num_devs = ARRAY_SIZE(neufbox4_devices), ++}; ++ ++static struct board_info __initdata board_nb4_ser_r2 = { ++ .name = "NB4-SER-r2", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .leds = { ++ { ++ .name = "adsl", ++ .gpio = NXP_74HC64_GPIO(4), ++ .active_low = 1, ++ }, ++ { ++ .name = "traffic", ++ .gpio = 2, ++ .active_low = 1, ++ }, ++ { ++ .name = "tel", ++ .gpio = NXP_74HC64_GPIO(3), ++ .active_low = 1, ++ }, ++ { ++ .name = "tv", ++ .gpio = NXP_74HC64_GPIO(2), ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi", ++ .gpio = 15, ++ .active_low = 1, ++ }, ++ { ++ .name = "alarm", ++ .gpio = NXP_74HC64_GPIO(0), ++ .active_low = 1, ++ }, ++ { ++ .name = "service:red", ++ .gpio = 29, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 30, ++ .active_low = 1, ++ }, ++ { ++ .name = "service:blue", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 34, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ { ++ .desc = "wps", ++ .gpio = 37, ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .threshold = 3, ++ }, ++ }, ++ .devs = neufbox4_devices, ++ .num_devs = ARRAY_SIZE(neufbox4_devices), ++}; ++ ++static struct board_info __initdata board_nb4_fxc_r1 = { ++ .name = "NB4-FXC-r1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .has_udc0 = 1, ++ ++ .leds = { ++ { ++ .name = "adsl", ++ .gpio = NXP_74HC64_GPIO(4), ++ .active_low = 1, ++ }, ++ { ++ .name = "traffic", ++ .gpio = 2, ++ }, ++ { ++ .name = "tel", ++ .gpio = NXP_74HC64_GPIO(3), ++ .active_low = 1, ++ }, ++ { ++ .name = "tv", ++ .gpio = NXP_74HC64_GPIO(2), ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi", ++ .gpio = 15, ++ }, ++ { ++ .name = "alarm", ++ .gpio = NXP_74HC64_GPIO(0), ++ .active_low = 1, ++ }, ++ { ++ .name = "service:red", ++ .gpio = 29, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 30, ++ }, ++ { ++ .name = "service:blue", ++ .gpio = 4, ++ }, ++ }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 34, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ { ++ .desc = "wps", ++ .gpio = 37, ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .threshold = 3, ++ }, ++ }, ++ .devs = neufbox4_devices, ++ .num_devs = ARRAY_SIZE(neufbox4_devices), ++}; ++ ++static struct board_info __initdata board_nb4_fxc_r2 = { ++ .name = "NB4-FXC-r2", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .leds = { ++ { ++ .name = "adsl", ++ .gpio = NXP_74HC64_GPIO(4), ++ .active_low = 1, ++ }, ++ { ++ .name = "traffic", ++ .gpio = 2, ++ }, ++ { ++ .name = "tel", ++ .gpio = NXP_74HC64_GPIO(3), ++ .active_low = 1, ++ }, ++ { ++ .name = "tv", ++ .gpio = NXP_74HC64_GPIO(2), ++ .active_low = 1, ++ }, ++ { ++ .name = "wifi", ++ .gpio = 15, ++ }, ++ { ++ .name = "alarm", ++ .gpio = NXP_74HC64_GPIO(0), ++ .active_low = 1, ++ }, ++ { ++ .name = "service:red", ++ .gpio = 29, ++ }, ++ { ++ .name = "service:green", ++ .gpio = 30, ++ }, ++ { ++ .name = "service:blue", ++ .gpio = 4, ++ }, ++ }, ++ .buttons = { ++ { ++ .desc = "reset", ++ .gpio = 34, ++ .type = EV_KEY, ++ .code = KEY_RESTART, ++ .threshold = 3, ++ }, ++ { ++ .desc = "wps", ++ .gpio = 37, ++ .type = EV_KEY, ++ .code = KEY_WPS_BUTTON, ++ .threshold = 3, ++ }, ++ }, ++ .devs = neufbox4_devices, ++ .num_devs = ARRAY_SIZE(neufbox4_devices), ++}; + #endif + + /* +@@ -788,9 +1260,30 @@ static const struct board_info __initdat + &board_96358vw2, + &board_AGPFS0, + &board_DWVS0, ++ &board_nb4_ser_r0, ++ &board_nb4_ser_r1, ++ &board_nb4_ser_r2, ++ &board_nb4_fxc_r1, ++ &board_nb4_fxc_r2, + #endif + }; + ++static void __init neufbox4_nvram_fixup(void) ++{ ++ u8 *boot_addr, *p; ++ u32 val; ++ ++ if (BCMCPU_IS_6358() && (!strcmp(nvram.name, "96358VW"))) { ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ boot_addr = (u8 *)KSEG1ADDR(val); ++ /* Extract neufbox4 PID */ ++ p = boot_addr + NEUFBOX4_PID_OFFSET; ++ if (!memcmp(p, "NB4-", 4)) ++ memcpy(nvram.name, p, sizeof("NB4-XXX-rX")); ++ } ++} ++ + /* + * Register a sane SPROMv2 to make the on-board + * bcm4318 WLAN work +@@ -908,6 +1401,9 @@ void __init board_prom_init(void) + return; + } + ++ /* Fixup broken neufbox4 board name */ ++ neufbox4_nvram_fixup(); ++ + /* find board by name */ + for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { + if (strncmp(nvram.name, bcm963xx_boards[i]->name, diff --git a/target/linux/brcm63xx/patches-2.6.35/240-spi.patch b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch new file mode 100644 index 000000000000..79e7ac630585 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/240-spi.patch @@ -0,0 +1,956 @@ +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -56,6 +56,7 @@ static const unsigned long bcm96338_regs + + static const int bcm96338_irqs[] = { + [IRQ_TIMER] = BCM_6338_TIMER_IRQ, ++ [IRQ_SPI] = BCM_6338_SPI_IRQ, + [IRQ_UART0] = BCM_6338_UART0_IRQ, + [IRQ_DSL] = BCM_6338_DSL_IRQ, + [IRQ_ENET0] = BCM_6338_ENET0_IRQ, +@@ -130,6 +131,7 @@ static const unsigned long bcm96348_regs + + static const int bcm96348_irqs[] = { + [IRQ_TIMER] = BCM_6348_TIMER_IRQ, ++ [IRQ_SPI] = BCM_6348_SPI_IRQ, + [IRQ_UART0] = BCM_6348_UART0_IRQ, + [IRQ_DSL] = BCM_6348_DSL_IRQ, + [IRQ_ENET0] = BCM_6348_ENET0_IRQ, +@@ -173,6 +175,7 @@ static const unsigned long bcm96358_regs + + static const int bcm96358_irqs[] = { + [IRQ_TIMER] = BCM_6358_TIMER_IRQ, ++ [IRQ_SPI] = BCM_6358_SPI_IRQ, + [IRQ_UART0] = BCM_6358_UART0_IRQ, + [IRQ_UART1] = BCM_6358_UART1_IRQ, + [IRQ_DSL] = BCM_6358_DSL_IRQ, +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-spi.c +@@ -0,0 +1,60 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2009 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++static struct resource spi_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct bcm63xx_spi_pdata spi_pdata = { ++ .bus_num = 0, ++ .num_chipselect = 4, ++ .speed_hz = 50000000, /* Fclk */ ++}; ++ ++static struct platform_device bcm63xx_spi_device = { ++ .name = "bcm63xx-spi", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(spi_resources), ++ .resource = spi_resources, ++ .dev = { ++ .platform_data = &spi_pdata, ++ }, ++}; ++ ++int __init bcm63xx_spi_register(void) ++{ ++ spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); ++ spi_resources[0].end = spi_resources[0].start; ++ spi_resources[0].end += RSET_SPI_SIZE - 1; ++ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); ++ ++ /* Fill in platform data */ ++ if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) ++ spi_pdata.fifo_size = SPI_BCM_6338_SPI_MSG_DATA_SIZE; ++ ++ if (BCMCPU_IS_6358()) ++ spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE; ++ ++ return platform_device_register(&bcm63xx_spi_device); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -109,6 +109,7 @@ enum bcm63xx_regs_set { + #define RSET_WDT_SIZE 12 + #define RSET_ENET_SIZE 2048 + #define RSET_ENETDMA_SIZE 2048 ++#define RSET_SPI_SIZE 256 + #define RSET_UART_SIZE 24 + #define RSET_UDC_SIZE 256 + #define RSET_OHCI_SIZE 256 +@@ -214,7 +215,7 @@ enum bcm63xx_regs_set { + #define BCM_6358_UART0_BASE (0xfffe0100) + #define BCM_6358_UART1_BASE (0xfffe0120) + #define BCM_6358_GPIO_BASE (0xfffe0080) +-#define BCM_6358_SPI_BASE (0xdeadbeef) ++#define BCM_6358_SPI_BASE (0xfffe0800) + #define BCM_6358_UDC0_BASE (0xfffe0400) + #define BCM_6358_OHCI0_BASE (0xfffe1400) + #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) +@@ -441,6 +442,7 @@ static inline unsigned long bcm63xx_regs + */ + enum bcm63xx_irq { + IRQ_TIMER = 0, ++ IRQ_SPI, + IRQ_UART0, + IRQ_UART1, + IRQ_DSL, +@@ -507,6 +509,7 @@ enum bcm63xx_irq { + * 6348 irqs + */ + #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) ++#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1) + #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) + #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) + #define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6) +@@ -531,6 +534,7 @@ enum bcm63xx_irq { + * 6358 irqs + */ + #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) ++#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1) + #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) + #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3) + #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -769,4 +769,116 @@ + #define DMIPSPLLCFG_N2_SHIFT 29 + #define DMIPSPLLCFG_N2_MASK (0x7 << DMIPSPLLCFG_N2_SHIFT) + ++/************************************************************************* ++ * _REG relative to RSET_SPI ++ *************************************************************************/ ++ ++/* BCM 6338 SPI core */ ++#define SPI_BCM_6338_SPI_CMD 0x00 /* 16-bits register */ ++#define SPI_BCM_6338_SPI_INT_STATUS 0x02 ++#define SPI_BCM_6338_SPI_MASK_INT_ST 0x03 ++#define SPI_BCM_6338_SPI_INT_MASK 0x04 ++#define SPI_BCM_6338_SPI_ST 0x05 ++#define SPI_BCM_6338_SPI_CLK_CFG 0x06 ++#define SPI_BCM_6338_SPI_FILL_BYTE 0x07 ++#define SPI_BCM_6338_SPI_MSG_TAIL 0x09 ++#define SPI_BCM_6338_SPI_RX_TAIL 0x0b ++#define SPI_BCM_6338_SPI_MSG_CTL 0x40 ++#define SPI_BCM_6338_SPI_MSG_DATA 0x41 ++#define SPI_BCM_6338_SPI_MSG_DATA_SIZE 0x3f ++#define SPI_BCM_6338_SPI_RX_DATA 0x80 ++#define SPI_BCM_6338_SPI_RX_DATA_SIZE 0x3f ++ ++/* BCM 6348 SPI core */ ++#define SPI_BCM_6348_SPI_MASK_INT_ST 0x00 ++#define SPI_BCM_6348_SPI_INT_STATUS 0x01 ++#define SPI_BCM_6348_SPI_CMD 0x02 /* 16-bits register */ ++#define SPI_BCM_6348_SPI_FILL_BYTE 0x04 ++#define SPI_BCM_6348_SPI_CLK_CFG 0x05 ++#define SPI_BCM_6348_SPI_ST 0x06 ++#define SPI_BCM_6348_SPI_INT_MASK 0x07 ++#define SPI_BCM_6348_SPI_RX_TAIL 0x08 ++#define SPI_BCM_6348_SPI_MSG_TAIL 0x10 ++#define SPI_BCM_6348_SPI_MSG_DATA 0x40 ++#define SPI_BCM_6348_SPI_MSG_CTL 0x42 ++#define SPI_BCM_6348_SPI_MSG_DATA_SIZE 0x3f ++#define SPI_BCM_6348_SPI_RX_DATA 0x80 ++#define SPI_BCM_6348_SPI_RX_DATA_SIZE 0x3f ++ ++/* BCM 6358 SPI core */ ++#define SPI_BCM_6358_MSG_CTL 0x00 /* 16-bits register */ ++ ++#define SPI_BCM_6358_SPI_MSG_DATA 0x02 ++#define SPI_BCM_6358_SPI_MSG_DATA_SIZE 0x21e ++ ++#define SPI_BCM_6358_SPI_RX_DATA 0x400 ++#define SPI_BCM_6358_SPI_RX_DATA_SIZE 0x220 ++ ++#define SPI_BCM_6358_SPI_CMD 0x700 /* 16-bits register */ ++ ++#define SPI_BCM_6358_SPI_INT_STATUS 0x702 ++#define SPI_BCM_6358_SPI_MASK_INT_ST 0x703 ++ ++#define SPI_BCM_6358_SPI_INT_MASK 0x704 ++ ++#define SPI_BCM_6358_SPI_STATUS 0x705 ++ ++#define SPI_BCM_6358_SPI_CLK_CFG 0x706 ++ ++#define SPI_BCM_6358_SPI_FILL_BYTE 0x707 ++#define SPI_BCM_6358_SPI_MSG_TAIL 0x709 ++#define SPI_BCM_6358_SPI_RX_TAIL 0x70B ++ ++/* Shared SPI definitions */ ++ ++/* Message configuration */ ++#define SPI_FD_RW 0x00 ++#define SPI_HD_W 0x01 ++#define SPI_HD_R 0x02 ++#define SPI_BYTE_CNT_SHIFT 0 ++#define SPI_MSG_TYPE_SHIFT 14 ++ ++/* Command */ ++#define SPI_CMD_NOOP 0x01 ++#define SPI_CMD_SOFT_RESET 0x02 ++#define SPI_CMD_HARD_RESET 0x04 ++#define SPI_CMD_START_IMMEDIATE 0x08 ++#define SPI_CMD_COMMAND_SHIFT 0 ++#define SPI_CMD_COMMAND_MASK 0x000f ++#define SPI_CMD_DEVICE_ID_SHIFT 4 ++#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8 ++#define SPI_CMD_ONE_BYTE_SHIFT 11 ++#define SPI_CMD_ONE_WIRE_SHIFT 12 ++#define SPI_DEV_ID_0 0 ++#define SPI_DEV_ID_1 1 ++#define SPI_DEV_ID_2 2 ++#define SPI_DEV_ID_3 3 ++ ++/* Interrupt mask */ ++#define SPI_INTR_CMD_DONE 0x01 ++#define SPI_INTR_RX_OVERFLOW 0x02 ++#define SPI_INTR_TX_UNDERFLOW 0x04 ++#define SPI_INTR_TX_OVERFLOW 0x08 ++#define SPI_INTR_RX_UNDERFLOW 0x10 ++#define SPI_INTR_CLEAR_ALL 0x1f ++ ++/* Status */ ++#define SPI_RX_EMPTY 0x02 ++#define SPI_CMD_BUSY 0x04 ++#define SPI_SERIAL_BUSY 0x08 ++ ++/* Clock configuration */ ++#define SPI_CLK_20MHZ 0x00 ++#define SPI_CLK_0_391MHZ 0x01 ++#define SPI_CLK_0_781MHZ 0x02 /* default */ ++#define SPI_CLK_1_563MHZ 0x03 ++#define SPI_CLK_3_125MHZ 0x04 ++#define SPI_CLK_6_250MHZ 0x05 ++#define SPI_CLK_12_50MHZ 0x06 ++#define SPI_CLK_25MHZ 0x07 ++#define SPI_CLK_MASK 0x07 ++#define SPI_SSOFFTIME_MASK 0x38 ++#define SPI_SSOFFTIME_SHIFT 3 ++#define SPI_BYTE_SWAP 0x80 ++ + #endif /* BCM63XX_REGS_H_ */ +--- /dev/null ++++ b/drivers/spi/bcm63xx_spi.c +@@ -0,0 +1,628 @@ ++/* ++ * Broadcom BCM63xx SPI controller support ++ * ++ * Copyright (C) 2009 Florian Fainelli ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the ++ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define PFX KBUILD_MODNAME ++#define DRV_VER "0.1.2" ++ ++enum bcm63xx_regs_spi { ++ SPI_CMD, ++ SPI_INT_STATUS, ++ SPI_INT_MASK_ST, ++ SPI_INT_MASK, ++ SPI_ST, ++ SPI_CLK_CFG, ++ SPI_FILL_BYTE, ++ SPI_MSG_TAIL, ++ SPI_RX_TAIL, ++ SPI_MSG_CTL, ++ SPI_MSG_DATA, ++ SPI_RX_DATA, ++}; ++ ++/* ++ * register offsets ++ */ ++static const unsigned long bcm96338_regs_spi[] = { ++ [SPI_CMD] = SPI_BCM_6338_SPI_CMD, ++ [SPI_INT_STATUS] = SPI_BCM_6338_SPI_INT_STATUS, ++ [SPI_INT_MASK_ST] = SPI_BCM_6338_SPI_MASK_INT_ST, ++ [SPI_INT_MASK] = SPI_BCM_6338_SPI_INT_MASK, ++ [SPI_ST] = SPI_BCM_6338_SPI_ST, ++ [SPI_CLK_CFG] = SPI_BCM_6338_SPI_CLK_CFG, ++ [SPI_FILL_BYTE] = SPI_BCM_6338_SPI_FILL_BYTE, ++ [SPI_MSG_TAIL] = SPI_BCM_6338_SPI_MSG_TAIL, ++ [SPI_RX_TAIL] = SPI_BCM_6338_SPI_RX_TAIL, ++ [SPI_MSG_CTL] = SPI_BCM_6338_SPI_MSG_CTL, ++ [SPI_MSG_DATA] = SPI_BCM_6338_SPI_MSG_DATA, ++ [SPI_RX_DATA] = SPI_BCM_6338_SPI_RX_DATA, ++}; ++ ++static const unsigned long bcm96348_regs_spi[] = { ++ [SPI_CMD] = SPI_BCM_6348_SPI_CMD, ++ [SPI_INT_STATUS] = SPI_BCM_6348_SPI_INT_STATUS, ++ [SPI_INT_MASK_ST] = SPI_BCM_6348_SPI_MASK_INT_ST, ++ [SPI_INT_MASK] = SPI_BCM_6348_SPI_INT_MASK, ++ [SPI_ST] = SPI_BCM_6348_SPI_ST, ++ [SPI_CLK_CFG] = SPI_BCM_6348_SPI_CLK_CFG, ++ [SPI_FILL_BYTE] = SPI_BCM_6348_SPI_FILL_BYTE, ++ [SPI_MSG_TAIL] = SPI_BCM_6348_SPI_MSG_TAIL, ++ [SPI_RX_TAIL] = SPI_BCM_6348_SPI_RX_TAIL, ++ [SPI_MSG_CTL] = SPI_BCM_6348_SPI_MSG_CTL, ++ [SPI_MSG_DATA] = SPI_BCM_6348_SPI_MSG_DATA, ++ [SPI_RX_DATA] = SPI_BCM_6348_SPI_RX_DATA, ++}; ++ ++static const unsigned long bcm96358_regs_spi[] = { ++ [SPI_CMD] = SPI_BCM_6358_SPI_CMD, ++ [SPI_INT_STATUS] = SPI_BCM_6358_SPI_INT_STATUS, ++ [SPI_INT_MASK_ST] = SPI_BCM_6358_SPI_MASK_INT_ST, ++ [SPI_INT_MASK] = SPI_BCM_6358_SPI_INT_MASK, ++ [SPI_ST] = SPI_BCM_6358_SPI_STATUS, ++ [SPI_CLK_CFG] = SPI_BCM_6358_SPI_CLK_CFG, ++ [SPI_FILL_BYTE] = SPI_BCM_6358_SPI_FILL_BYTE, ++ [SPI_MSG_TAIL] = SPI_BCM_6358_SPI_MSG_TAIL, ++ [SPI_RX_TAIL] = SPI_BCM_6358_SPI_RX_TAIL, ++ [SPI_MSG_CTL] = SPI_BCM_6358_MSG_CTL, ++ [SPI_MSG_DATA] = SPI_BCM_6358_SPI_MSG_DATA, ++ [SPI_RX_DATA] = SPI_BCM_6358_SPI_RX_DATA, ++}; ++ ++ ++#ifdef BCMCPU_RUNTIME_DETECT ++static const unsigned long *bcm63xx_regs_spi; ++ ++static __init void bcm63xx_spi_regs_init(void) ++{ ++ if (BCMCPU_IS_6338()) ++ bcm63xx_regs_spi = bcm96338_regs_spi; ++ if (BCMCPU_IS_6348()) ++ bcm63xx_regs_spi = bcm96348_regs_spi; ++ if (BCMCPU_IS_6358()) ++ bcm63xx_regs_spi = bcm96358_regs_spi; ++} ++#else ++static __init void bcm63xx_spi_regs_init(void) { } ++#endif ++ ++static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg) ++{ ++#ifdef BCMCPU_RUNTIME_DETECT ++ return bcm63xx_regs_spi[reg]; ++#else ++#ifdef CONFIG_BCM63XX_CPU_6338 ++switch (reg) { ++ case SPI_CMD: ++ return SPI_BCM_6338_SPI_CMD; ++ case SPI_INT_STATUS: ++ return SPI_BCM_6338_SPI_INT_STATUS; ++ case SPI_INT_MASK_ST: ++ return SPI_BCM_6338_SPI_MASK_INT_ST; ++ case SPI_INT_MASK: ++ return SPI_BCM_6338_SPI_INT_MASK; ++ case SPI_ST: ++ return SPI_BCM_6338_SPI_ST; ++ case SPI_CLK_CFG: ++ return SPI_BCM_6338_SPI_CLK_CFG; ++ case SPI_FILL_BYTE: ++ return SPI_BCM_6338_SPI_FILL_BYTE; ++ case SPI_MSG_TAIL: ++ return SPI_BCM_6338_SPI_MSG_TAIL; ++ case SPI_RX_TAIL: ++ return SPI_BCM_6338_SPI_RX_TAIL; ++ case SPI_MSG_CTL: ++ return SPI_BCM_6338_SPI_MSG_CTL; ++ case SPI_MSG_DATA: ++ return SPI_BCM_6338_SPI_MSG_DATA; ++ case SPI_RX_DATA: ++ return SPI_BCM_6338_SPI_RX_DATA; ++} ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6348 ++switch (reg) { ++ case SPI_CMD: ++ return SPI_BCM_6348_SPI_CMD; ++ case SPI_INT_MASK_ST: ++ return SPI_BCM_6348_SPI_MASK_INT_ST; ++ case SPI_INT_MASK: ++ return SPI_BCM_6348_SPI_INT_MASK; ++ case SPI_INT_STATUS: ++ return SPI_BCM_6348_SPI_INT_STATUS; ++ case SPI_ST: ++ return SPI_BCM_6348_SPI_ST; ++ case SPI_CLK_CFG: ++ return SPI_BCM_6348_SPI_CLK_CFG; ++ case SPI_FILL_BYTE: ++ return SPI_BCM_6348_SPI_FILL_BYTE; ++ case SPI_MSG_TAIL: ++ return SPI_BCM_6348_SPI_MSG_TAIL; ++ case SPI_RX_TAIL: ++ return SPI_BCM_6348_SPI_RX_TAIL; ++ case SPI_MSG_CTL: ++ return SPI_BCM_6348_SPI_MSG_CTL; ++ case SPI_MSG_DATA: ++ return SPI_BCM_6348_SPI_MSG_DATA; ++ case SPI_RX_DATA: ++ return SPI_BCM_6348_SPI_RX_DATA; ++} ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6358 ++switch (reg) { ++ case SPI_CMD: ++ return SPI_BCM_6358_SPI_CMD; ++ case SPI_INT_STATUS: ++ return SPI_BCM_6358_SPI_INT_STATUS; ++ case SPI_INT_MASK_ST: ++ return SPI_BCM_6358_SPI_MASK_INT_ST; ++ case SPI_INT_MASK: ++ return SPI_BCM_6358_SPI_INT_MASK; ++ case SPI_ST: ++ return SPI_BCM_6358_SPI_STATUS; ++ case SPI_CLK_CFG: ++ return SPI_BCM_6358_SPI_CLK_CFG; ++ case SPI_FILL_BYTE: ++ return SPI_BCM_6358_SPI_FILL_BYTE; ++ case SPI_MSG_TAIL: ++ return SPI_BCM_6358_SPI_MSG_TAIL; ++ case SPI_RX_TAIL: ++ return SPI_BCM_6358_SPI_RX_TAIL; ++ case SPI_MSG_CTL: ++ return SPI_BCM_6358_MSG_CTL; ++ case SPI_MSG_DATA: ++ return SPI_BCM_6358_SPI_MSG_DATA; ++ case SPI_RX_DATA: ++ return SPI_BCM_6358_SPI_RX_DATA; ++} ++#endif ++#endif ++ return 0; ++} ++ ++/* ++ * helpers for the SPI register sets ++ */ ++#define bcm_spi_readb(b,o) bcm_readb((b) + bcm63xx_spireg(o)) ++#define bcm_spi_readw(b,o) bcm_readw((b) + bcm63xx_spireg(o)) ++#define bcm_spi_writeb(v,b,o) bcm_writeb((v), (b) + bcm63xx_spireg(o)) ++#define bcm_spi_writew(v,b,o) bcm_writew((v), (b) + bcm63xx_spireg(o)) ++ ++struct bcm63xx_spi { ++ /* bitbang has to be first */ ++ struct spi_bitbang bitbang; ++ struct completion done; ++ ++ void __iomem *regs; ++ int irq; ++ ++ /* Platform data */ ++ u32 speed_hz; ++ unsigned fifo_size; ++ ++ /* Data buffers */ ++ const unsigned char *tx_ptr; ++ unsigned char *rx_ptr; ++ int remaining_bytes; ++ ++ struct clk *clk; ++ struct resource *ioarea; ++ struct platform_device *pdev; ++}; ++ ++static void bcm63xx_spi_chipselect(struct spi_device *spi, int is_on) ++{ ++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); ++ u16 val; ++ ++ val = bcm_spi_readw(bs->regs, SPI_CMD); ++ if (is_on == BITBANG_CS_INACTIVE) ++ val |= SPI_CMD_NOOP; ++ else if (is_on == BITBANG_CS_ACTIVE) ++ val |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); ++ ++ bcm_spi_writew(val, bs->regs, SPI_CMD); ++} ++ ++static int bcm63xx_spi_setup_transfer(struct spi_device *spi, ++ struct spi_transfer *t) ++{ ++ u8 bits_per_word; ++ u8 clk_cfg; ++ u32 hz; ++ unsigned int div; ++ ++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); ++ ++ bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word; ++ hz = (t) ? t->speed_hz : spi->max_speed_hz; ++ if (bits_per_word != 8) { ++ dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", ++ __func__, bits_per_word); ++ return -EINVAL; ++ } ++ ++ if (spi->chip_select > spi->master->num_chipselect) { ++ dev_err(&spi->dev, "%s, unsupported slave %d\n", ++ __func__, spi->chip_select); ++ return -EINVAL; ++ } ++ ++ /* Check clock setting */ ++ div = (bs->speed_hz / hz); ++ switch (div) { ++ case 2: ++ clk_cfg = SPI_CLK_25MHZ; ++ break; ++ case 4: ++ clk_cfg = SPI_CLK_12_50MHZ; ++ break; ++ case 8: ++ clk_cfg = SPI_CLK_6_250MHZ; ++ break; ++ case 16: ++ clk_cfg = SPI_CLK_3_125MHZ; ++ break; ++ case 32: ++ clk_cfg = SPI_CLK_1_563MHZ; ++ break; ++ case 128: ++ clk_cfg = SPI_CLK_0_781MHZ; ++ break; ++ case 64: ++ default: ++ /* Set to slowest mode for compatibility */ ++ clk_cfg = SPI_CLK_0_781MHZ; ++ break; ++ } ++ ++ bcm_spi_writeb(clk_cfg, bs->regs, SPI_CLK_CFG); ++ dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n", ++ div, hz, clk_cfg); ++ ++ return 0; ++} ++ ++/* the spi->mode bits understood by this driver: */ ++#define MODEBITS (SPI_CPOL | SPI_CPHA) ++ ++static int bcm63xx_spi_setup(struct spi_device *spi) ++{ ++ struct spi_bitbang *bitbang; ++ struct bcm63xx_spi *bs; ++ int retval; ++ ++ bs = spi_master_get_devdata(spi->master); ++ bitbang = &bs->bitbang; ++ ++ if (!spi->bits_per_word) ++ spi->bits_per_word = 8; ++ ++ if (spi->mode & ~MODEBITS) { ++ dev_err(&spi->dev, "%s, unsupported mode bits %x\n", ++ __func__, spi->mode & ~MODEBITS); ++ return -EINVAL; ++ } ++ ++ retval = bcm63xx_spi_setup_transfer(spi, NULL); ++ if (retval < 0) { ++ dev_err(&spi->dev, "setup: unsupported mode bits %x\n", ++ spi->mode & ~MODEBITS); ++ return retval; ++ } ++ ++ dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", ++ __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); ++ ++ return 0; ++} ++ ++/* Fill the TX FIFO with as many bytes as possible */ ++static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs) ++{ ++ u8 tail; ++ ++ /* Fill the Tx FIFO with as many bytes as possible */ ++ tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); ++ while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) { ++ if (bs->tx_ptr) ++ bcm_spi_writeb(*bs->tx_ptr++, bs->regs, SPI_MSG_DATA); ++ else ++ bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA); ++ bs->remaining_bytes--; ++ tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); ++ } ++} ++ ++static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) ++{ ++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); ++ u8 msg_ctl; ++ u16 cmd; ++ ++ dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", ++ t->tx_buf, t->rx_buf, t->len); ++ ++ /* Transmitter is inhibited */ ++ bs->tx_ptr = t->tx_buf; ++ bs->rx_ptr = t->rx_buf; ++ bs->remaining_bytes = t->len; ++ init_completion(&bs->done); ++ ++ bcm63xx_spi_fill_tx_fifo(bs); ++ ++ /* Enable the command done interrupt which ++ * we use to determine completion of a command */ ++ bcm_spi_writeb(SPI_INTR_CMD_DONE, bs->regs, SPI_INT_MASK); ++ ++ /* Fill in the Message control register */ ++ msg_ctl = bcm_spi_readb(bs->regs, SPI_MSG_CTL); ++ msg_ctl |= (t->len << SPI_BYTE_CNT_SHIFT); ++ msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT); ++ bcm_spi_writeb(msg_ctl, bs->regs, SPI_MSG_CTL); ++ ++ /* Issue the transfer */ ++ cmd = bcm_spi_readw(bs->regs, SPI_CMD); ++ cmd |= SPI_CMD_START_IMMEDIATE; ++ cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); ++ bcm_spi_writew(cmd, bs->regs, SPI_CMD); ++ ++ wait_for_completion(&bs->done); ++ ++ /* Disable the CMD_DONE interrupt */ ++ bcm_spi_writeb(~(SPI_INTR_CMD_DONE), bs->regs, SPI_INT_MASK); ++ ++ return t->len - bs->remaining_bytes; ++} ++ ++/* This driver supports single master mode only. Hence ++ * CMD_DONE is the only interrupt we care about ++ */ ++static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) ++{ ++ struct spi_master *master = (struct spi_master *)dev_id; ++ struct bcm63xx_spi *bs = spi_master_get_devdata(master); ++ u8 intr; ++ u16 cmd; ++ ++ /* Read interupts and clear them immediately */ ++ intr = bcm_spi_readb(bs->regs, SPI_INT_STATUS); ++ bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK); ++ ++ /* A tansfer completed */ ++ if (intr & SPI_INTR_CMD_DONE) { ++ u8 rx_empty; ++ ++ rx_empty = bcm_spi_readb(bs->regs, SPI_ST); ++ /* Read out all the data */ ++ while ((rx_empty & SPI_RX_EMPTY) == 0) { ++ u8 data; ++ ++ data = bcm_spi_readb(bs->regs, SPI_RX_DATA); ++ if (bs->rx_ptr) ++ *bs->rx_ptr++ = data; ++ ++ rx_empty = bcm_spi_readb(bs->regs, SPI_RX_EMPTY); ++ } ++ ++ /* See if there is more data to send */ ++ if (bs->remaining_bytes > 0) { ++ bcm63xx_spi_fill_tx_fifo(bs); ++ ++ /* Start the transfer */ ++ cmd = bcm_spi_readw(bs->regs, SPI_CMD); ++ cmd |= SPI_CMD_START_IMMEDIATE; ++ cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); ++ bcm_spi_writew(cmd, bs->regs, SPI_CMD); ++ } else ++ complete(&bs->done); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++ ++static int __init bcm63xx_spi_probe(struct platform_device *pdev) ++{ ++ struct resource *r; ++ struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data; ++ int irq; ++ struct spi_master *master; ++ struct clk *clk; ++ struct bcm63xx_spi *bs; ++ int ret; ++ ++ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!r) { ++ ret = -ENXIO; ++ goto out; ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ ret = -ENXIO; ++ goto out; ++ } ++ ++ bcm63xx_spi_regs_init(); ++ ++ clk = clk_get(&pdev->dev, "spi"); ++ if (IS_ERR(clk)) { ++ dev_err(&pdev->dev, "No clock for device\n"); ++ ret = -ENODEV; ++ goto out; ++ } ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(struct bcm63xx_spi)); ++ if (!master) { ++ ret = -ENOMEM; ++ goto out_free; ++ } ++ ++ bs = spi_master_get_devdata(master); ++ bs->bitbang.master = spi_master_get(master); ++ bs->bitbang.chipselect = bcm63xx_spi_chipselect; ++ bs->bitbang.setup_transfer = bcm63xx_spi_setup_transfer; ++ bs->bitbang.txrx_bufs = bcm63xx_txrx_bufs; ++ bs->bitbang.master->setup = bcm63xx_spi_setup; ++ init_completion(&bs->done); ++ ++ platform_set_drvdata(pdev, master); ++ bs->pdev = pdev; ++ ++ if (!request_mem_region(r->start, ++ r->end - r->start, PFX)) { ++ ret = -ENXIO; ++ goto out_free; ++ } ++ ++ bs->regs = ioremap_nocache(r->start, r->end - r->start); ++ if (!bs->regs) { ++ printk(KERN_ERR PFX " unable to ioremap regs\n"); ++ ret = -ENOMEM; ++ goto out_free; ++ } ++ bs->irq = irq; ++ bs->clk = clk; ++ bs->fifo_size = pdata->fifo_size; ++ ++ ret = request_irq(irq, bcm63xx_spi_interrupt, 0, ++ pdev->name, master); ++ if (ret) { ++ printk(KERN_ERR PFX " unable to request irq\n"); ++ goto out_unmap; ++ } ++ ++ master->bus_num = pdata->bus_num; ++ master->num_chipselect = pdata->num_chipselect; ++ bs->speed_hz = pdata->speed_hz; ++ ++ /* Initialize hardware */ ++ clk_enable(bs->clk); ++ bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK); ++ ++ dev_info(&pdev->dev, " at 0x%08x (irq %d, FIFOs size %d) v%s\n", ++ r->start, irq, bs->fifo_size, DRV_VER); ++ ++ ret = spi_bitbang_start(&bs->bitbang); ++ if (ret) { ++ dev_err(&pdev->dev, "spi_bitbang_start FAILED\n"); ++ goto out_reset_hw; ++ } ++ ++ return ret; ++ ++out_reset_hw: ++ clk_disable(clk); ++ free_irq(irq, master); ++out_unmap: ++ iounmap(bs->regs); ++out_free: ++ clk_put(clk); ++ spi_master_put(master); ++out: ++ return ret; ++} ++ ++static int __exit bcm63xx_spi_remove(struct platform_device *pdev) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_spi *bs = spi_master_get_devdata(master); ++ ++ spi_bitbang_stop(&bs->bitbang); ++ clk_disable(bs->clk); ++ clk_put(bs->clk); ++ free_irq(bs->irq, master); ++ iounmap(bs->regs); ++ platform_set_drvdata(pdev, 0); ++ spi_master_put(bs->bitbang.master); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int bcm63xx_spi_suspend(struct platform_device *pdev, pm_message_t mesg) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_spi *bs = spi_master_get_devdata(master); ++ ++ clk_disable(bs->clk); ++ ++ return 0; ++} ++ ++static int bcm63xx_spi_resume(struct platform_device *pdev) ++{ ++ struct bcm63xx_spi *bs = spi_master_get_devdata(master); ++ struct bcm63xx_spi *bs = spi_master_get_devdata(master); ++ ++ clk_enable(bs->clk); ++ ++ return 0; ++} ++#else ++#define bcm63xx_spi_suspend NULL ++#define bcm63xx_spi_resume NULL ++#endif ++ ++static struct platform_driver bcm63xx_spi_driver = { ++ .driver = { ++ .name = "bcm63xx-spi", ++ .owner = THIS_MODULE, ++ }, ++ .probe = bcm63xx_spi_probe, ++ .remove = bcm63xx_spi_remove, ++ .suspend = bcm63xx_spi_suspend, ++ .resume = bcm63xx_spi_resume, ++}; ++ ++ ++static int __init bcm63xx_spi_init(void) ++{ ++ return platform_driver_register(&bcm63xx_spi_driver); ++} ++ ++static void __exit bcm63xx_spi_exit(void) ++{ ++ platform_driver_unregister(&bcm63xx_spi_driver); ++} ++ ++module_init(bcm63xx_spi_init); ++module_exit(bcm63xx_spi_exit); ++ ++MODULE_ALIAS("platform:bcm63xx_spi"); ++MODULE_AUTHOR("Florian Fainelli "); ++MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver"); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION(DRV_VER); +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -60,6 +60,13 @@ config SPI_ATMEL + This selects a driver for the Atmel SPI Controller, present on + many AT32 (AVR32) and AT91 (ARM) chips. + ++config SPI_BCM63XX ++ tristate "Broadcom BCM63xx SPI controller" ++ depends on BCM63XX ++ select SPI_BITBANG ++ help ++ This is the SPI controller master driver for Broadcom BCM63xx SoC. ++ + config SPI_BFIN + tristate "SPI controller driver for ADI Blackfin5xx" + depends on BLACKFIN +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -48,6 +48,7 @@ obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci. + obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o + obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o + obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o ++obj-$(CONFIG_SPI_BCM63XX) += bcm63xx_spi.o + + # special build for s3c24xx spi driver with fiq support + spi_s3c24xx_hw-y := spi_s3c24xx.o +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h +@@ -0,0 +1,15 @@ ++#ifndef BCM63XX_DEV_SPI_H ++#define BCM63XX_DEV_SPI_H ++ ++#include ++ ++int __init bcm63xx_spi_register(void); ++ ++struct bcm63xx_spi_pdata { ++ unsigned int fifo_size; ++ int bus_num; ++ int num_chipselect; ++ u32 speed_hz; ++}; ++ ++#endif /* BCM63XX_DEV_SPI_H */ +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ + dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \ +- dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o ++ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o dev-spi.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + #include + + #define PFX "board_bcm963xx: " +@@ -1459,6 +1460,9 @@ void __init board_prom_init(void) + if (board.has_udc0) + bcm63xx_udc_register(); + ++ if (!BCMCPU_IS_6345()) ++ bcm63xx_spi_register(); ++ + /* Generate MAC address for WLAN and + * register our SPROM */ + #ifdef CONFIG_SSB_PCIHOST diff --git a/target/linux/brcm63xx/patches-2.6.35/250-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-2.6.35/250-6358-enet1-external-mii-clk.patch new file mode 100644 index 000000000000..07b97311f084 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/250-6358-enet1-external-mii-clk.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1453,6 +1453,8 @@ void __init board_prom_init(void) + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G3_EXT_MII | + GPIO_MODE_6348_G0_EXT_MII; ++ else if (BCMCPU_IS_6358()) ++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV; + } + + bcm_gpio_writel(val, GPIO_MODE_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -402,6 +402,8 @@ + #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) + #define GPIO_MODE_6358_SERIAL_LED (1 << 10) + #define GPIO_MODE_6358_UTOPIA (1 << 12) ++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 30) ++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 31) + + + /************************************************************************* diff --git a/target/linux/brcm63xx/patches-2.6.35/260-no_ehci_over_current_check.patch b/target/linux/brcm63xx/patches-2.6.35/260-no_ehci_over_current_check.patch new file mode 100644 index 000000000000..c060710a8ee3 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/260-no_ehci_over_current_check.patch @@ -0,0 +1,16 @@ +--- a/drivers/usb/host/ehci-hub.c ++++ b/drivers/usb/host/ehci-hub.c +@@ -837,11 +837,13 @@ static int ehci_hub_control ( + * power switching; they're allowed to just limit the + * current. khubd will turn the power back on. + */ ++#ifndef CONFIG_BCM63XX + if (HCS_PPC (ehci->hcs_params)){ + ehci_writel(ehci, + temp & ~(PORT_RWC_BITS | PORT_POWER), + status_reg); + } ++#endif + } + + /* whoever resumes must GetPortStatus to complete it!! */ diff --git a/target/linux/brcm63xx/patches-2.6.35/300-wl_exports.patch b/target/linux/brcm63xx/patches-2.6.35/300-wl_exports.patch new file mode 100644 index 000000000000..d9f7547fa599 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.35/300-wl_exports.patch @@ -0,0 +1,34 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -47,6 +47,13 @@ static unsigned int mac_addr_used; + static struct board_info board; + + /* ++ * Required export for WL ++ */ ++#define NVRAM_SPACE 0x8000 ++char nvram_buf[NVRAM_SPACE]; ++EXPORT_SYMBOL(nvram_buf); ++ ++/* + * known 6338 boards + */ + #ifdef CONFIG_BCM63XX_CPU_6338 +@@ -1387,6 +1394,7 @@ void __init board_prom_init(void) + + /* extract nvram data */ + memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram)); ++ memcpy(&nvram_buf, boot_addr + BCM963XX_NVRAM_OFFSET, NVRAM_SPACE); + + /* check checksum before using data */ + if (nvram.version <= 4) +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -52,6 +52,7 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT */ + -- 2.30.2