From 2bc00e016e4c1440f3004776e26357f46eb6690a Mon Sep 17 00:00:00 2001 From: huang lin Date: Tue, 17 Nov 2015 14:20:18 +0800 Subject: [PATCH] rockchip: rk3036: Add Soc reset driver We can reset the Soc using some CRU (clock/reset unit) register. Add support for this. Signed-off-by: Lin Huang Acked-by: Simon Glass --- arch/arm/mach-rockchip/rk3036/Makefile | 10 +++++ arch/arm/mach-rockchip/rk3036/reset_rk3036.c | 45 ++++++++++++++++++++ 2 files changed, 55 insertions(+) create mode 100644 arch/arm/mach-rockchip/rk3036/Makefile create mode 100644 arch/arm/mach-rockchip/rk3036/reset_rk3036.c diff --git a/arch/arm/mach-rockchip/rk3036/Makefile b/arch/arm/mach-rockchip/rk3036/Makefile new file mode 100644 index 0000000000..a483347335 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/Makefile @@ -0,0 +1,10 @@ +# +# (C) Copyright 2015 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifndef CONFIG_SPL_BUILD +obj-y += reset_rk3036.o +endif + diff --git a/arch/arm/mach-rockchip/rk3036/reset_rk3036.c b/arch/arm/mach-rockchip/rk3036/reset_rk3036.c new file mode 100644 index 0000000000..fefb568f7a --- /dev/null +++ b/arch/arm/mach-rockchip/rk3036/reset_rk3036.c @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +int rk3036_reset_request(struct udevice *dev, enum reset_t type) +{ + struct rk3036_cru *cru = rockchip_get_cru(); + + if (IS_ERR(cru)) + return PTR_ERR(cru); + switch (type) { + case RESET_WARM: + writel(0xeca8, &cru->cru_glb_srst_snd_value); + break; + case RESET_COLD: + writel(0xfdb9, &cru->cru_glb_srst_fst_value); + break; + default: + return -EPROTONOSUPPORT; + } + + return -EINPROGRESS; +} + +static struct reset_ops rk3036_reset = { + .request = rk3036_reset_request, +}; + +U_BOOT_DRIVER(reset_rk3036) = { + .name = "rk3036_reset", + .id = UCLASS_RESET, + .ops = &rk3036_reset, +}; -- 2.30.2