From 2a2ed4752108a641651bb103542000810d5d89b4 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 23 Jul 2019 18:56:31 +0300 Subject: [PATCH] pinctrl: denverton: Provide Interrupt Status register offset Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-denverton.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/pinctrl-denverton.c b/drivers/pinctrl/intel/pinctrl-denverton.c index 3a4932b557b4..fde83cd4aac5 100644 --- a/drivers/pinctrl/intel/pinctrl-denverton.c +++ b/drivers/pinctrl/intel/pinctrl-denverton.c @@ -15,8 +15,9 @@ #include "pinctrl-intel.h" #define DNV_PAD_OWN 0x020 -#define DNV_HOSTSW_OWN 0x0C0 #define DNV_PADCFGLOCK 0x090 +#define DNV_HOSTSW_OWN 0x0C0 +#define DNV_GPI_IS 0x100 #define DNV_GPI_IE 0x120 #define DNV_GPP(n, s, e) \ @@ -32,6 +33,7 @@ .padown_offset = DNV_PAD_OWN, \ .padcfglock_offset = DNV_PADCFGLOCK, \ .hostown_offset = DNV_HOSTSW_OWN, \ + .is_offset = DNV_GPI_IS, \ .ie_offset = DNV_GPI_IE, \ .pin_base = (s), \ .npins = ((e) - (s) + 1), \ -- 2.30.2