From 2a195703d6e62172e532ffae05a79e9d12f602bc Mon Sep 17 00:00:00 2001 From: Guillaume GARDET Date: Wed, 2 Jan 2019 14:31:41 +0100 Subject: [PATCH] exynos: allow SPL to build in thumb mode Building peach-pi smdk5420 and peach-pit with thumb mode for SPL ends-up in the following error: Error: Thumb encoding does not support an immediate here -- `msr cpsr_c,#0x13|0xC0' Use an intermediate register to be able to use thumb for exynos5 SPL. Signed-off-by: Guillaume GARDET Cc: Albert Aribaud Cc: Minkyu Kang Cc: Tom Rini Signed-off-by: Minkyu Kang --- arch/arm/mach-exynos/include/mach/system.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h index 4837781957..81fa9800b4 100644 --- a/arch/arm/mach-exynos/include/mach/system.h +++ b/arch/arm/mach-exynos/include/mach/system.h @@ -58,7 +58,8 @@ struct exynos5_sysreg { /* Move 0xd3 value to CPSR register to enable SVC mode */ #define svc32_mode_en() __asm__ __volatile__ \ ("@ I&F disable, Mode: 0x13 - SVC\n\t" \ - "msr cpsr_c, #0x13|0xC0\n\t" : : ) + "mov r0, #0x13|0xC0\n\t" \ + "msr cpsr_c, r0\n\t" : : ) /* Set program counter with the given value */ #define set_pc(x) __asm__ __volatile__ ("mov pc, %0\n\t" : : "r"(x)) -- 2.30.2