From 27e947b0e13835cb782aa267b7d77e1f5a028e87 Mon Sep 17 00:00:00 2001 From: Zeyu Fan Date: Fri, 10 Feb 2017 11:59:31 -0500 Subject: [PATCH] drm/amd/display: Fix program pix clk logic to unblock deep color set. Signed-off-by: Zeyu Fan Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c index a9f39218ce82..87eba4be3249 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c @@ -854,16 +854,16 @@ static bool dce110_program_pix_clk( if (clock_source->id != CLOCK_SOURCE_ID_EXTERNAL && pix_clk_params->flags.ENABLE_SS && !dc_is_dp_signal( pix_clk_params->signal_type)) { - if (!enable_spread_spectrum(clk_src, pix_clk_params->signal_type, pll_settings)) return false; - /* Resync deep color DTO */ - dce110_program_pixel_clk_resync(clk_src, - pix_clk_params->signal_type, - pix_clk_params->color_depth); } + /* Resync deep color DTO */ + dce110_program_pixel_clk_resync(clk_src, + pix_clk_params->signal_type, + pix_clk_params->color_depth); + break; case DCE_VERSION_11_2: if (clock_source->id != CLOCK_SOURCE_ID_DP_DTO) { -- 2.30.2