From 260ae46f271a2552371847c3dc2da20d0287756e Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Fri, 18 Mar 2016 13:01:12 -0700 Subject: [PATCH] Tegra: memmap BL31's TZDRAM carveout This patch maps the TZDRAM carveout used by the BL31. In the near future BL31 would be running from the TZRAM for security and performance reasons. The only downside to this solution is that the TZRAM loses its state in System Suspend. So, we map the TZDRAM carveout that the BL31 would use to save its state before entering System Suspend. Change-Id: Id5bda7e9864afd270cf86418c703fa61c2cb095f Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/common/tegra_bl31_setup.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index ba599cbe..72da4b3c 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -225,6 +225,7 @@ void bl31_plat_arch_setup(void) #if USE_COHERENT_MEM unsigned long coh_start, coh_size; #endif + plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); /* add memory regions */ mmap_add_region(total_base, total_base, @@ -234,6 +235,14 @@ void bl31_plat_arch_setup(void) ro_size, MT_MEMORY | MT_RO | MT_SECURE); + /* map TZDRAM used by BL31 as coherent memory */ + if (TEGRA_TZRAM_BASE == tegra_bl31_phys_base) { + mmap_add_region(params_from_bl2->tzdram_base, + params_from_bl2->tzdram_base, + BL31_SIZE, + MT_DEVICE | MT_RW | MT_SECURE); + } + #if USE_COHERENT_MEM coh_start = total_base + (BL_COHERENT_RAM_BASE - BL31_RO_BASE); coh_size = BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE; -- 2.30.2