From 25db2eaf1097ff6b9169d288e9532072069adb7c Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Wed, 12 Dec 2018 11:17:20 -0800 Subject: [PATCH] drm/i915: Don't forget to reset blocks when testing lower wm levels MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit During DDB allocation, we try to distribute enough blocks for each plane to hit the highest watermark level; if that fails, we retry each lower level (which should require fewer blocks) until we find one that's possible (or until the whole commit is rejected as impossible). We need to reset our running block count when trying each lower level, otherwise all lower levels will fail as well. Cc: Ville Syrjälä Fixes: d8e8749802 ("drm/i915: Switch to level-based DDB allocation algorithm (v5)") Signed-off-by: Matt Roper Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20181212191720.3706-1-matthew.d.roper@intel.com --- drivers/gpu/drm/i915/intel_pm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6d074f2e69d3..a6c7c11d2c0e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4365,6 +4365,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, * requirement of active planes. */ for (level = ilk_wm_max_level(dev_priv); level >= 0; level--) { + blocks = 0; for_each_plane_id_on_crtc(intel_crtc, plane_id) { if (plane_id == PLANE_CURSOR) continue; -- 2.30.2